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Allow fractional support in DDR tools.
Signed-off-by: Patrick Delaunay <[email protected]>
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Component Notification DDR controller errata (3.00a):9001313030
Synchronization Time Waited After De-assertion of presetn is
128 pclk Cycles.
Signed-off-by: Patrick Delaunay <[email protected]>
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Regression introduced by rebase, when loop
was replaced by readl_poll_timeout() function.
Signed-off-by: Patrick Delaunay <[email protected]>
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For STM32MP, the watchdog is based on DM and the function watchod_reset
call the function uclass_get_device(UCLASS_WDT) to found the driver
associated IWDG2.
As this reset is not mandatory in debug putc (the uart fifo will be
empty after some us), we can simplify the code by removing this call.
And this patch avoid issue when putc is called before initialization
of DM core, before the parsing of the device tree parsing and each
node bound to driver; that also avoid memory leak.
Signed-off-by: Patrick Delaunay <[email protected]>
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Remove the trace indicating the end of the DEBUG initialization
Signed-off-by: Patrick Delaunay <[email protected]>
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Add the DDRPHYC support for clk_set_rate, used in DDR interactive mode
Signed-off-by: Patrick Delaunay <[email protected]>
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This avoids useless loops inside the I2C timing algorithm.
Actually, we support only one possible solution per prescaler value.
So after finding a solution with a prescaler, the algorithm can
switch directly to the next prescaler value.
Signed-off-by: Nicolas Le Bayon <[email protected]>
Reviewed-by: Patrick DELAUNAY <[email protected]>
Signed-off-by: Patrick Delaunay <[email protected]>
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It conforms with Reference Manual I2C timing section.
Signed-off-by: Nicolas Le Bayon <[email protected]>
Reviewed-by: Patrick DELAUNAY <[email protected]>
Signed-off-by: Patrick Delaunay <[email protected]>
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PowerPC supports 32 bit address.
So adopt 32 bit addr in fsl_esdhc for CONFIG_PPC.
Signed-off-by: Yinbo Zhu <[email protected]>
Reviewed-by: Prabhakar Kushwaha <[email protected]>
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Signed-off-by: Yinbo Zhu <[email protected]>
Reviewed-by: Prabhakar Kushwaha <[email protected]>
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Various DM fixes
Addition of ofnode_get_addr_size_index()
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sp805 is watchdog on some NXP layerscape SoCs, adding
it's driver. Configs CONFIG_WDT_SP805, CONFIG_WDT, CONFIG_CMD_WDT
needs to be enabled to use it.
Signed-off-by: Zhao Qiang <[email protected]>
Reviewed-by: Prabhakar Kushwaha <[email protected]>
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Distinguish the ecc val by chassis version and move the ecc addr to dts.
Add ls1028a soc support.
Signed-off-by: Peng Ma <[email protected]>
Reviewed-by: Michal Simek <[email protected]>
Reviewed-by: Prabhakar Kushwaha <[email protected]>
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Add the infrastructure for Layerscape SoCs PCIe Gen4 controller
to update device tree nodes to convey SMMU stream IDs in the
device tree.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Prabhakar Kushwaha <[email protected]>
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Add PCIe Gen4 driver for the NXP Layerscape SoCs. This PCIe
controller is based on the Mobiveil IP, which is compatible
with the PCI Express™ Base Specification, Revision 4.0.
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Bao Xiaowei <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Prabhakar Kushwaha <[email protected]>
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This function takes an argument, blob,
but never uses it, instead uses gd->fdt_blob directly.
Fixes: e81c98649b7a ("dm: core: add clocks node scan")
Reported-by: AKASHI Takahiro <[email protected]>
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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It was returning an int, which doesn't work if the u32 it is reading,
or the default value, will overflow a signed int.
While it could be made to work, when using a C standard/compiler where
casting negative signed values to unsigned has a defined behavior,
combined with careful casting, it seems obvious one is meant to use
ofnode_read_s32_default() with signed values.
Cc: Simon Glass <[email protected]>
Signed-off-by: Trent Piepho <[email protected]>
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Add ofnode_get_addr_size_index function to fetch the address
and size of the reg space based on index.
Signed-off-by: Keerthy <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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In some cases it is necessary to read the keyboard in early phases of
U-Boot. The cros_ec keyboard is kept in the misc directory. Update the
config to allow this.
Signed-off-by: Simon Glass <[email protected]>
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Since Gen3 SDHI has an internal DS signal AC-spec violation in HS400 mode,
CRC-error may occur in read command in HS400 mode. This phoenomenon occurs
at low/high temperature.
To fix this, after completion of HS400 tuning, enable manual calibration.
However, Gen3 M3 Ver.1.2 or earlier and H3 1.x does not support HS400.
These SoC forcibly use HS200 mode by SoC attribute.
The DT adjustment of the tuning parameters is not supported until the
DT property names become clear.
Signed-off-by: Marek Vasut <[email protected]>
Adapted from a patch by Takeshi Saito <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Peng Fan <[email protected]>
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Clean up the whitespaces in macros, no functional change.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Peng Fan <[email protected]>
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Add driver for the Renesas RCar PCIe controller present on Gen3 SoCs.
The PCIe on Gen3 is used both to connect external PCIe peripherals.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
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- Update MPC83xx platform support to current best practices, etc.
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"Please pull mmc-5-20 for v2019.07, this is to avoid break i.MX53 boot."
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- update for using splashfile instead of location->name
when loading the splash image from a FIT
- updates for loading internal and external splash data from FIT
- DM_GPIO/DM_VIDEO migration for mx53 cx9020 board
- fix boot issue on mx6sabresd board after DM_VIDEO migration
- increase the max preallocated framebuffer BPP to 32 in ipuv3
driver to prepare for configurations with higher color depth
- allow to use vidconsole_put_string() in board code for text
output on LCD displays
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The single channel detection in the gazerbeam board driver was not
implemented correctly.
Fix the detection.
Signed-off-by: Mario Six <[email protected]>
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For the DM case, use the proper parameter for the regmap_init_mem call
(which is the ofnode, not the udevice).
Signed-off-by: Mario Six <[email protected]>
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Make the gdsys_rxaui_ctrl polarity setting function return the old
state to comply with the API requirements.
Signed-off-by: Mario Six <[email protected]>
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Improve the error handling and reporting of the IHS I2C driver.
Signed-off-by: Mario Six <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Since the IHS I2C driver want upstream, the surrounding infrastructure
has changed quite a bit (notably, the fpgamap driver was replaced with a
regmap driver).
Update the driver to work with these changes.
Signed-off-by: Mario Six <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Some DM drivers have hardcoded clk_enable calls when handling
clocks (for example the fsl_esdhc driver).
To work with these drivers, add an enable method to the MCP83xx clock
driver (which does nothing, because the clocks are always enabled).
Signed-off-by: Mario Six <[email protected]>
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CONFIG_SYS_DDR_SDRAM_BASE is set to the same value as
CONFIG_SYS_SDRAM_BASE on all existing boards. Just use
CONFIG_SYS_SDRAM_BASE instead.
Signed-off-by: Mario Six <[email protected]>
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Migrate the BR/OR settings to Kconfig. These must be known at compile
time, so cannot be configured via DT.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Signed-off-by: Mario Six <[email protected]>
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vme8349.h contains two separate boards: The vme8349 itself, and the
caddy2 board. The caddy2 board is chosen by setting certain config
variables. Create a proper config file for the caddy2 board to make
Kconfig migration easier.
Furthermore, simplify the vme8349 and caddy2 configs by keeping only the
options necessary for each board.
Signed-off-by: Mario Six <[email protected]>
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CONFIG_TARGET_VME8349 can replace CONFIG_VME8349. Hence, replace
CONFIG_VME8349 with CONFIG_TARGET_VME8349, and remove CONFIG_VME8349.
Signed-off-by: Mario Six <[email protected]>
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Replace CONFIG_MPC837x with a proper CONFIG_ARCH_MPC837X Kconfig option.
Signed-off-by: Mario Six <[email protected]>
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Replace CONFIG_MPC836* with proper CONFIG_ARCH_MPC836* Kconfig options.
Signed-off-by: Mario Six <[email protected]>
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Replace CONFIG_MPC834* with proper CONFIG_ARCH_MPC834* Kconfig options.
Signed-off-by: Mario Six <[email protected]>
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Replace CONFIG_MPC833* with proper CONFIG_ARCH_MPC833* Kconfig options.
Signed-off-by: Mario Six <[email protected]>
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Replace CONFIG_MPC830* with proper CONFIG_ARCH_MPC830* Kconfig options.
Signed-off-by: Mario Six <[email protected]>
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- Fix for mxc_i2c driver in DM mode, thanks to Trent!
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Pull the vidconsole_put_string() function from DM tests, make it
available to e.g. boards that want to display information on the
LCD on boot.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Anatolij Gustschin <[email protected]>
Reviewed-by: Anatolij Gustschin <[email protected]>
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The IPUv3 can handle 1920x1080x32bpp displays , set the max preallocated
framebuffer BPP to 32 to cater for all eventualities.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Anatolij Gustschin <[email protected]>
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This code also works with imx53 ipus so we can enable it for them.
Signed-off-by: Steffen Dirkwinkel <[email protected]>
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This reverts commit 72a89e0da5ac6a4ab929b15a2b656f04f50767f6, which
causes the imx53 HSC to hang as the eMMC is not working properly anymore.
The exact error message:
MMC write: dev # 0, block # 2, count 927 ... mmc write failed
0 blocks written: ERROR
imx53 is not using the DDR mode.
Debugging of pre_div and div generation showed that those values are
generated in a way, which is not matching the ones from working setup.
As the original patch was performing code refactoring, let's revert this
change, so all imx53 boards would work again.
Signed-off-by: Lukasz Majewski <[email protected]>
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- Allow coreboot to process unhandled tags
- Enable NVMe on QEMU x86_64 target
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When dma_addr_t is u32 in 64-bit, there are some warnings when
building NVME driver. Fix it by doing an additional (long) cast.
Signed-off-by: Bin Meng <[email protected]>
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Also get rid of ahci_setup_port(..).
Signed-off-by: Christian Gmeiner <[email protected]>
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The function bcm6345_wdt_start use the argument timeout
as tick but it should be used as milliseconds.
A clock is added as requirement for this driver.
The frequency of the clock is then used to convert the
millisecond to ticks in the function bcm6345_wdt_start.
Signed-off-by: Philippe Reynes <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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While converting CONFIG_SYS_[DI]CACHE_OFF to Kconfig, there are instances
where these configuration items are conditional on SPL. This commit adds SPL
variants of these configuration items, uses CONFIG_IS_ENABLED(), and updates
the configurations as required.
Acked-by: Alexey Brodkin <[email protected]>
Signed-off-by: Trevor Woerner <[email protected]>
[trini: Make the default depend on the setting for full U-Boot, update
more zynq hardware]
Signed-off-by: Tom Rini <[email protected]>
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