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This merges the CRC16-CCITT headers into u-boot/crc.h to prepare for
rolling CRC16 into the hash infrastructure. Given that CRC8, CRC32
and CRC32-C already have their prototypes in a single header file, it
seems a good idea to also include CRC16-CCITT in the same.
Signed-off-by: Philipp Tomsich <[email protected]>
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This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-18.09 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
Specifically this syncs with commit 99d772547314 ("Bump mv_ddr to
release armada-18.09.2").
The complete log of changes is best obtained from the mv-ddr-marvell.git
repository but some relevant highlights are:
ddr3: add missing txsdll parameter
ddr3: fix tfaw timimg parameter
ddr3: fix trrd timimg parameter
merge ddr3 topology header file with mv_ddr_topology one
mv_ddr: a38x: fix zero memory size scrubbing issue
The upstream code is incorporated omitting the portions not relevant to
Armada-38x and DDR3. After that a semi-automated step is used to drop
unused features with unifdef
find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
-UCONFIG_APN806 -UCONFIG_MC_STATIC \
-UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
-UCONFIG_64BIT -UCONFIG_A3700 -UA3900 -UA80X0 \
-UA70X0
Signed-off-by: Chris Packham <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Tested-by: Baruch Siach <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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- Various axp209 fixes
- Fixes for OLinuXino-A20-Lime2 / OLinuXino-A20-Lime2-eMMC
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Two fixes for the Amlogic Pinctrl driver :
- bad usage of clrsetbits_le32
- bad pin definition for AXG Family
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Some boards feature a capacitance on LDO3's output that is too large,
causing inrush currents which as a result, shut down the AXP209. This
has been reported before, without knowing the actual cause.
A fix appeared to be done with
commit 0e6e34ac8dbb ("sunxi: Olimex A20 boards: Enable LDO3 and LDO4 regulators").
The description there is a bit misleading, the kernel does not hang
during AXP209 initialization, the PMIC shuts down, causing voltages to
drop and thus the whole system freezes.
While the AXP209 does have the ability to ramp up the voltage slowly, to
reduce these inrush currents, the voltage rate control (VRC) however is
not applicable when switching on the LDO3 output. Only when going from
an enabled lower voltage setting, to a higher voltage setting is the VRC
in effect.
To work around this problem, we set LDO3 to the lowest possible setting
of 0.7 V if it was not yet enabled, and then let the VRC (if enabled) do
its thing. It should be noted, that for some undocumented reason, there
is a short delay needed between setting the LDO3 voltage register and
enabling the power. One would expect that this delay ought to be just
after enabling the output power at 0.7 V, but this did not work.
Signed-off-by: Olliver Schinagl <[email protected]>
Signed-off-by: Priit Laes <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
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The AXP209 LDO3 regulator supports voltage rate control, or can set a
slew rate.
This allows for the power to gradually rise up to the desired voltage,
instead of spiking up as fast as possible. Reason to have this can be
to reduce the inrush currents for example.
There are 3 slopes to choose from, the default, 'none' is a voltage rise
of 0.0167 V/uS, a 1.6 mV/uS and a 0.8 mV/uS voltage rise.
In ideal world (where vendors follow the recommended design guidelines)
this setting should not be enabled by default. Unless of course AXP209
crashes instead of reporting overcurrent condition as it normally should
do in this case.
Signed-off-by: Olliver Schinagl <[email protected]>
Signed-off-by: Priit Laes <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
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The AXP209 has a few 'magisc-ish' values that are better served with
clear defines.
Signed-off-by: Olliver Schinagl <[email protected]>
Signed-off-by: Priit Laes <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
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Use a define for the chip version mask on the axp209.
Signed-off-by: Olliver Schinagl <[email protected]>
Signed-off-by: Priit Laes <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
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Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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This drivers supports the USB2 PHY found on omap5 and dra7 SOCs.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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Add support to handle USB3 PHYs present on AM57xx/DRA7xx SoCs. This is
needed to move AM57xx to DM_USB.
Signed-off-by: Vignesh R <[email protected]>
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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syscon_regmap_lookup_by_phandle() can be used to get the regmap of a syscon
device from a reference in the DTS. It operates similarly to the linux
version of the namesake function.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The error is:
In file included from include/part.h:10:0,
from include/usb.h:18,
from include/linux/usb/gadget.h:22,
from drivers/usb/dwc3/ep0.c:20:
include/ide.h:62:14: error: unknown type name ‘uchar’
void ide_led(uchar led, uchar status);
Fixing it by including common.h that defines the uchar type.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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The select_dr_mode operation is executed when the glue driver is probed.
The role of this optional function is to configure the operating mode
of the controller at the glue level.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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This make the driver more generic. At this point this driver can replace
the dwc3-of-simple implementation.
Make the description in the Kconfig more generic too.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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UCLASS_USB_DEV_GENERIC was meant for USB devices connected to host
controllers, not gadget devices.
Adding a new UCLASS for gadget devices alone.
Also move the generic DM code for USB gadgets in a separate file for
clarity.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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Those operations can be used for peripheral operation as well as host
operation.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
# Conflicts:
# drivers/usb/dwc3/core.c
# drivers/usb/host/xhci-dwc3.c
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The driver will be probed when usb_gadget_initialize() is called.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
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usb_gadget_initialize()/_release()/_handle_interrupt()
When DM_USB_GADGET the platform code for the USB device must be replaced by
calls to a USB device driver.
usb_gadget_initialize() probes the USB device driver.
usb_gadget_release() removes the USB device driver.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
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Using CONFIG_DM_USB for this purpose prevents using DM_USB for host and not
for device.
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
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Add 2 functions to wrap the calls to board_usb_init() and
board_usb_cleanup().
This is a preparatory work for DM support for UDC drivers (DM_USB_GADGET).
Signed-off-by: Jean-Jacques Hiblot <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
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This patch adds code missing when CONFIG_DEBUG_UART_OMAP is enabled as
early debugging UART. The code is basically copied from the ns16550
driver.
Signed-off-by: Felix Brack <[email protected]>
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Due to gpio holes management, stm32_pinctrl_get_gpio_dev() must
be updated.
stm32_pinctrl_get_gpio_dev() returns from a given pin selectors
the corresponding bank gpio device and the gpio_offset inside this
gpio bank.
Update also all functions which makes usage of stm32_pinctrl_get_gpio_dev.
Signed-off-by: Patrice Chotard <[email protected]>
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As all STM32 SoCs supports CONFIG_CLK flag,
it becomes useless in this driver, remove it.
Signed-off-by: Patrice Chotard <[email protected]>
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To allow access to this define by other driver, move
it into gpio.h
Signed-off-by: Patrice Chotard <[email protected]>
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In some STM32 SoC packages, GPIO bank has not always 16 gpios.
Several cases can occur, gpio hole can be located at the beginning,
middle or end of the gpio bank or a combination of these 3
configurations.
For that, gpio bindings offer the gpio-ranges DT property which
described the gpio bank mapping.
Signed-off-by: Patrice Chotard <[email protected]>
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Move gpio_dev list filling outside probe() to speed-up U-boot
boot sequence execution. This list is populated only when needed.
Signed-off-by: Patrice Chotard <[email protected]>
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Signed-off-by: Álvaro Fernández Rojas <[email protected]>
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Signed-off-by: Álvaro Fernández Rojas <[email protected]>
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Add a sandbox DMA driver implementation (provider) and corresponding DM
test.
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Grygorii Strashko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Álvaro Fernández Rojas <[email protected]>
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This adds channels support for dma controllers that have multiple channels
which can transfer data to/from different devices (enet, usb...).
DMA channle API:
dma_get_by_index()
dma_get_by_name()
dma_request()
dma_free()
dma_enable()
dma_disable()
dma_prepare_rcv_buf()
dma_receive()
dma_send()
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
[[email protected]: drop unused dma_get_by_index_platdata(),
add metadata to send/receive ops, add dma_prepare_rcv_buf(),
minor clean up]
Signed-off-by: Grygorii Strashko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Move dma_ops to a separate header file, following other uclass
implementations. While doing so, this patch also improves dma_ops
documentation.
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
Signed-off-by: Grygorii Strashko <[email protected]>
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The pin number (first and last) in the bank definition is missing the
pin base offset shifting. This is causing a miscalculation when
retrieving the register and pin offsets in the GPIO driver causing the
'gpio' command to drive the wrong pins / GPIOs in the second GPIO chip
(the AO bank is driven correctly because the shifting is already 0).
Signed-off-by: Carlo Caione <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
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Protect configuration registers with a hardware spinlock.
If a hwspinlock is defined in the device-tree node used it
to be sure that none of the others processors on the SoC could
change the configuration at the same time.
Signed-off-by: Benjamin Gaignard <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Implement hardware spinlock support for STM32MP1.
Signed-off-by: Benjamin Gaignard <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Add hardware spinlock in the list of the clocks.
Signed-off-by: Benjamin Gaignard <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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This is uclass for Hardware Spinlocks.
It implements two mandatory operations: lock and unlock
and one optional relax operation.
Signed-off-by: Benjamin Gaignard <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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In commit e5e06b65ad65 ("clk: Allow clock defaults to be set also
during re-reloc state") the earlier guard against setting clock
defaults in pre-reloc state was removed. While it is easy to filter
'assigned-clocks' properties for SPL using CONFIG_OF_SPL_REMOVE_PROPS,
no such mechanism exists for the pre-reloc stage of the full U-Boot.
With the default defconfig for the RK3399-Q7 (which filter the
'assigned-clocks' property for the DTS used by SPL anyway), this
caused a pause during startup of the full U-Boot stage that lasted for
almost 10s (due to the CPU not having been clocked up yet).
This reintroduces the guard from commit f4fcba5c5baa ("clk: Allow
clock defaults to be set also during re-reloc state") and extends it
to only apply outside of a TPL/SPL build: i.e. clk_set_defaults will
now run in pre-reloc state for SPL, but only after reloc for the full
U-Boot.
References: commit f4fcba5c5baa ("clk: implement clk_set_defaults()")
References: commit e5e06b65ad65 ("clk: Allow clock defaults to be set
also during re-reloc state")
Signed-off-by: Philipp Tomsich <[email protected]>
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LX2160A Soc is based on Layerscape Chassis Generation 3.2
architecture with features:
16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC,
2 64-bit DDR4 memory controller, RGMII, 8 I2C controllers,
3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs,
4 TZASC instances, etc.
SoC personalites:
LX2120A is SoC with Twelve 64-bit ARM v8 Cortex-A72 CPUs
LX2080A is SoC with Eight 64-bit ARM v8 Cortex-A72 CPUs
Signed-off-by: Bao Xiaowei <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Meenakshi Aggarwal <[email protected]>
Signed-off-by: Vabhav Sharma <[email protected]>
Signed-off-by: Sriram Dash <[email protected]>
Signed-off-by: Priyanka Jain <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Add ahci compatible support for ls2080a soc.
Signed-off-by: Peng Ma <[email protected]>
Acked-by: Michal Simek <[email protected]>
[YS: add fallthrough comment]
Reviewed-by: York Sun <[email protected]>
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Add ahci compatible support for ls1088a soc.
Signed-off-by: Peng Ma <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Add ahci compatible support for ls1046a soc.
Signed-off-by: Peng Ma <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Adds TFABOOT support and allows to pick QE firmware
on basis of boot source.
Signed-off-by: Pankit Garg <[email protected]>
Signed-off-by: Rajesh Bhagat <[email protected]>
[YS: remove line continuation in quoted string]
Reviewed-by: York Sun <[email protected]>
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Adds TFABOOT support and allows to pick FMAN firmware
on basis of boot source.
Signed-off-by: Pankit Garg <[email protected]>
Signed-off-by: Rajesh Bhagat <[email protected]>
[YS: fix checkpatch issues]
Reviewed-by: York Sun <[email protected]>
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IFC driver changes to implement the chipselect mappings at run time.
Defines init_early_memctl_regs and init_final_memctl_regs with
chipselect dynamic mapping for nor and nand boot.
Signed-off-by: Pankit Garg <[email protected]>
Signed-off-by: Rajesh Bhagat <[email protected]>
[YS: fix checkpatch issues]
Reviewed-by: York Sun <[email protected]>
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Sometimes enumeration fails (about 1 in 50 times on my custom board).
The underlying reason is probably electrical but Linux does not have
the problem.
Comparing the Linux / u-boot implementations shows that Linux
retries the error case whereas u-boot aborts early.
Removing the early abort in u-boot fixes the problem.
Signed-off-by: Martin Fuzzey <[email protected]>
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Minor sandbox enhancements / fixes
tpm improvements to clear up v1/v2 support
buildman toolchain fixes
New serial options to set/get config
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- Various MTD fixes from Boris
- Zap various unused / legacy paths.
- pxa3xx NAND update from Miquel
Signed-off-by: Tom Rini <[email protected]>
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SPI flash based MTD devs can be registered/unregistered at any time
through the sf probe command or the spi_flash_free() function.
This commit does not try to fix the root cause as it would probably
require rewriting most of the code and have an mtd_info object
instance per spi_flash object (not to mention that the the spi-flash
layer is likely to be replaced by a spi-nor layer ported from Linux).
Instead, we try to be as safe as can be by checking the code returned
by del_mtd_device() and complain loudly when there's nothing we can
do about the deregistration failure. When that happens we also reset
sf_mtd_info.priv to NULL, and check for NULL pointer in the mtd hooks
so that -ENODEV is returned instead of hitting a NULL pointer
dereference exception when the MTD instance is later accessed by a user.
Signed-off-by: Boris Brezillon <[email protected]>
Tested-by: Heiko Schocher <[email protected]>
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The DM implementation of spi_flash_free() does not unregister the MTD
device before removing the spi dev object. This leads to a use-after-free
bug when the MTD device is later accessed by a MTD user (observed when
attaching the device to UBI after env_sf_load() has called
spi_flash_free()).
Implement ->remove() and call spi_flash_mtd_unregister() from there.
Fixes: 9fe6d8716e09 ("mtd, spi: Add MTD layer driver")
Signed-off-by: Boris Brezillon <[email protected]>
Tested-by: Heiko Schocher <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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