| Age | Commit message (Collapse) | Author |
|---|
|
Document the regmap_alloc() function.
Reviewed-by: Anatolij Gustschin <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Mario Six <[email protected]>
|
|
This is currently out of order. Sort it.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Commit f2006808f099: ("dm: core: parse chosen node") added a logic
to parse the chosen node during dm_scan_fdt_node(), but unfortunately
it missed adding the same logic in dm_scan_fdt_live(). This mirrors
the logic in the livetree version.
The weird thing is that commit f2006808f099 did update the test case
to test such logic, but even if I reset to that commit, the test case
still fails, and I have no idea how it could pass.
With this fix, the following 2 test cases now pass:
Test: dm_test_bus_children: bus.c
test/dm/bus.c:112, dm_test_bus_children(): num_devices ==
list_count_items(&uc->dev_head): Expected 7, got 6
Test: dm_test_fdt: test-fdt.c
test/dm/test-fdt.c:184, dm_test_fdt(): num_devices ==
list_count_items(&uc->dev_head): Expected 7, got 6
Fixes: f2006808f099 ("dm: core: parse chosen node")
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Currently the comments of several APIs (eg: dm_init_and_scan()) say:
@pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC
flag. If false bind all drivers.
The 'Pre-Relocation Support' chapter in doc/driver-model/README.txt
documents the same that both device tree properties and driver flag
are supported.
However the implementation only checks these special device tree
properties without checking the driver flag at all. This updates
lists_bind_fdt() to consider both scenarios.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Squashed in http://patchwork.ozlabs.org/patch/996473/ :
Signed-off-by: Simon Glass <[email protected]>
|
|
This adds a new API dm_ofnode_pre_reloc(), a livetree equivalent
API of dm_fdt_pre_reloc().
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
The description string should not contain unnecessary characters,
like the ending '\n' or the leading 'CPU:'.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
This brings in the u-boot-net PR from Joe.
|
|
Commit fb01e07a95 accidentally broke initialisation of GPIO
descriptor flags from device tree: currently the active low
flag from gpio-specifier is always ignored. Fix it.
Signed-off-by: Anatolij Gustschin <[email protected]>
Cc: Mario Six <[email protected]>
|
|
DE2 SoCs can support LCDs up to 1080p (e.g. A64), and 3MHz step won't
let PLL_VIDEO be high enough for them.
Use 6MHz step for PLL_VIDEO when using DE2, to satisfy 1080p LCD.
Signed-off-by: Icenowy Zheng <[email protected]>
Signed-off-by: Vasily Khoruzhick <[email protected]>
Tested-by: Vasily Khoruzhick <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Acked-by: Jagan Teki <[email protected]>
|
|
missing
Both GPIOs are optional, so we shouldn't fail if any is missing.
Without this fix reset is not deasserted if sleep GPIO is missing.
Signed-off-by: Vasily Khoruzhick <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Tested-by: Maxime Ripard <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Cc: Vagrant Cascadian <[email protected]>
|
|
A64 and H6 support automatic delay calibration and Linux driver uses it
instead of hardcoded delays. Add support for it to u-boot driver.
Fixes eMMC instability on Pinebook
Signed-off-by: Vasily Khoruzhick <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Tested-by: Maxime Ripard <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Cc: Vagrant Cascadian <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
Commit 9c5b00973bce ("Convert CONFIG_MTD_PARTITIONS et al to Kconfig")
introduced a publicly visible Kconfig entry for the
CONFIG_MTD_PARTITIONS option, while the rework on MTD partitioning
was in progress, and we somehow did not notice that the same Kconfig
entry was added by commit 4048a5c519a8 ("mtd: declare MTD_PARTITIONS
symbol in Kconfig"), but this time as an invisible entry (this can
only be selected by other options).
Keep the non-visible version of this symbol, since MTD_PARTITIONS is
not something the user should be able to enable/disable directly.
Fixes: 4048a5c519a8 ("mtd: declare MTD_PARTITIONS symbol in Kconfig")
Signed-off-by: Boris Brezillon <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
dfu_fill_entity_nand() uses find_dev_and_part() and mtdparts_init()
which are provided by cmd/mtdparts.c.
Add the dependency to avoid build failures when CMD_MTDPARTS is not
selected.
Reported-by: Jagan Teki <[email protected]>
Fixes: 6828e602b722d ("dfu: Migrate to Kconfig")
Signed-off-by: Boris Brezillon <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
U-boot provides a mean to define default values for mtdids and mtdparts
when they're not defined in the environment. Patch mtd_probe_devices()
to use those default values when env_get("mtdparts") or
env_get("mtdids") return NULL.
This implementation is based on the logic found in cmd/mtdparts.c.
Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
Reported-by: Stefan Roese <[email protected]>
Signed-off-by: Boris Brezillon <[email protected]>
Tested-by: Stefan Roese <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
This patch adds check for command response CRC failure. The driver
is currently ignoring CRC check failure on command resposes which
have CRC atteched to it, which can be potentially dangerous. Even
more grueling problem happens when the command response is followed
by data transfer though, as in that case, the dwmci_data_transfer()
function will spin until it reaches the 240s timeout.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Heiko Stuebner <[email protected]>
Cc: Philipp Tomsich <[email protected]>
|
|
The commit
484fdf5ba058 ("dm: Add support for all targets which requires MANUAL_RELOC")
introduces subtle typo, i.e. missed semicolon.
Fixes: 484fdf5ba058 ("dm: Add support for all targets which requires MANUAL_RELOC")
Cc: Michal Simek <[email protected]>
Signed-off-by: Andy Shevchenko <[email protected]>
Reviewed-by: Michal Simek <[email protected]>
|
|
Update TI Keystone 2 driver to re-use common mdio lib.
Reviewed-by: Tom Rini <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Signed-off-by: Grygorii Strashko <[email protected]>
|
|
Update TI CPSW driver to re-use common mdio lib
Reviewed-by: Tom Rini <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Signed-off-by: Grygorii Strashko <[email protected]>
|
|
All existing TI SoCs network HW have similar MDIO implementation, so
introduce common mdio support library which can be reused by TI networking
drivers.
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Grygorii Strashko <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Update to use SPDX license identifier.
Reviewed-by: Tom Rini <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Signed-off-by: Grygorii Strashko <[email protected]>
|
|
Networking support for all TI K2 boards converted to use DM model and
CONFIG_DM_ETH enabled in all corresponding defconfig files, hence drop
unused non DM K2 networking code.
Reviewed-by: Tom Rini <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Signed-off-by: Grygorii Strashko <[email protected]>
|
|
Convert DRIVER_TI_KEYSTONE_NET to Kconfig.
Reviewed-by: Tom Rini <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Signed-off-by: Grygorii Strashko <[email protected]>
|
|
Add drivers/net/ti/ folder and move all TI's code in this folder for better
maintenance.
Reviewed-by: Tom Rini <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Signed-off-by: Grygorii Strashko <[email protected]>
|
|
The VSC8574 PHY is a 4-port PHY that is 10/100/1000BASE-T, 100BASE-FX,
1000BASE-X and triple-speed copper SFP capable, can communicate with
the MAC via SGMII, QSGMII or 1000BASE-X, supports WOL, downshifting and
can set the blinking pattern of each of its 4 LEDs, supports SyncE as
well as HP Auto-MDIX detection.
This adds support for 10/100/1000BASE-T and SGMII/QSGMII link with the
MAC.
The VSC8574 has also an internal Intel 8051 microcontroller whose
firmware needs to be patched when the PHY is reset. If the 8051's
firmware has the expected CRC, its patching can be skipped. The
microcontroller can be accessed from any port of the PHY, though the CRC
function can only be done through the PHY that is the base PHY of the
package (internal address 0) due to a limitation of the firmware.
The GPIO register bank is a set of registers that are common to all PHYs
in the package. So any modification in any register of this bank affects
all PHYs of the package.
Signed-off-by: Quentin Schulz <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Part of the config is common between the VSC8584 and the VSC8574, so to
prepare for the upcoming support of VSC8574, use the phy_device.priv
pointer that will keep the function that holds code that is PHY-specific
and that should be called during config function.
Signed-off-by: Quentin Schulz <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
The VSC8584 PHY is a 4-port PHY that is 10/100/1000BASE-T, 100BASE-FX,
1000BASE-X and triple-speed copper SFP capable, can communicate with the
MAC via SGMII, QSGMII or 1000BASE-X, supports downshifting and can set
the blinking pattern of each of its 4 LEDs, supports hardware offloading
of MACsec and supports SyncE as well as HP Auto-MDIX detection.
This adds support for 10/100/1000BASE-T and SGMII/QSGMII link with the
MAC.
The VSC8584 has also an internal Intel 8051 microcontroller whose
firmware needs to be patched when the PHY is reset. If the 8051's
firmware has the expected CRC, its patching can be skipped. The
microcontroller can be accessed from any port of the PHY, though the CRC
function can only be done through the PHY that is the base PHY of the
package (internal address 0) due to a limitation of the firmware.
The GPIO register bank is a set of registers that are common to all PHYs
in the package. So any modification in any register of this bank affects
all PHYs of the package.
The revA of the VSC8584 PHY (which is not and will not be publicly
released) should NOT patch the firmware of the microcontroller or it'll
make things worse, the easiest way is just to not support it.
Signed-off-by: Quentin Schulz <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
The algorithm in the ast2500_calc_clock_config() routine suffers from
integer rounding and the requested rate does not get the appropriate
set of Numerator, Denumerator, Post Divider parameters.
This is the case for the D2-PLL clock used by the MAC controllers in
RGMII mode. The requested rated is 250MHz but a 251MHz is assigned.
The easiest way to fix this problem is to introduce an array of clock
settings defining the N, M, P parameters for well known frequencies
used by the Aspeed SoC.
Signed-off-by: Cédric Le Goater <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
The Faraday ftgmac100 MAC controllers as found on the Aspeed SoCs have
some slight differences in the HW interface (End-Of-Rx/Tx-Ring bits).
Signed-off-by: Cédric Le Goater <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Signed-off-by: Cédric Le Goater <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Signed-off-by: Cédric Le Goater <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Signed-off-by: Cédric Le Goater <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Use simple arrays under the device priv structure to hold the RX and
TX descriptors and handle memory coherency by invalidating or flushing
the d-cache when required.
Signed-off-by: Cédric Le Goater <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Implement the MDIO bus read/write functions using the readl_poll_timeout()
routine, initialize the bus and scan for the PHY. RGMII and RMII mode
are supported.
Signed-off-by: Cédric Le Goater <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Signed-off-by: Cédric Le Goater <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
The driver is based on the previous one and the code is only adapted
to fit the driver model. The support for the Faraday ftgmac100
controller is the same with MAC and MDIO bus support for RGMII/RMII
modes.
Configuration is updated to enable compile again. At this stage, the
driver compiles but is not yet functional.
Signed-off-by: Cédric Le Goater <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Signed-off-by: Cédric Le Goater <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Signed-off-by: Cédric Le Goater <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
This patch adds ethernet support for the MIPS based Mediatek MT76xx SoCs
(e.g. MT7628 and MT7688), including a minimum setup of the integrated
switch. This driver is loosly based on the driver version included in
this MediaTek github repository:
https://github.com/MediaTek-Labs/linkit-smart-uboot.git
Tested on the MT7688 LinkIt smart-gateway and on the
Gardena-smart-gateway.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Daniel Schwierzeck <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Frank Wunderlich <[email protected]>
Cc: Weijie Gao <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
|
|
It is perfectly fine to write th DTCNTL TAP count and enable the
SCC sampling clock operation in the same write.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Masahiro Yamada <[email protected]>
|
|
When the bus switches to 1.8V mode of operation, it is necessary to
verify that the card correctly initiated and completed the voltage
switch. This is done by reading out the state of DATA0 line.
This patch implement support for reading out the state of the DATA0
line, so the MMC core code can correctly switch to 1.8V mode.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Masahiro Yamada <[email protected]>
|
|
Make sure to clear HS400 configuration when resetting the SCC block.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Masahiro Yamada <[email protected]>
|
|
Add check to avoid touching the SCC tuning registers in case the IP
doesn't support them or if the support isn't in place yet.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Masahiro Yamada <[email protected]>
|
|
Preinitialize the SD card signals regulator to 3.3V, which is the
default post-reset setting, to be sure the regulator is set to a
valid value.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Masahiro Yamada <[email protected]>
|
|
Configure the clock settings before reconfiguring any other IO settings.
This is required when the clock must be stopped before changing eg. the
pin configuration or any of the other properties of the bus. Running the
clock configuration first allows the MMC core to do just that.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Masahiro Yamada <[email protected]>
|
|
In case the controller performs card tuning, that is, sends MMC
command 19 or 21, silence possible CRC error warning prints. The
warnings are bound to happen, since the tuning will fail for some
settings while searching for the optimal configuration of the bus
and that is perfectly OK.
This patch passes around the MMC command structure and adds check
into tmio_sd_check_error() to avoid printing CRC error warning
when the tuning happens.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Masahiro Yamada <[email protected]>
|
|
Properly handle return values and abort operations when they are
non-zero. This is a minor improvement, which fixes two remaining
unchecked return values.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Masahiro Yamada <[email protected]>
|
|
The SD UHS SDR12, SDR25, SDR50, SDR104, DDR50 and MMC HS200, HS400
modes all use 1.8V signaling, while all the legacy modes use 3.3V
signaling. While there are extra modes which use 1.2V signaling,
the existing hardware does not support those.
Simplify the pinmux such that 3.3V signaling implies legacy mode
pinmux and the rest implies UHS mode pinmux. This prevents the
massive case statement from growing further. Moreover, it fixes
an edge case where during SD 1.8V switch, the bus mode is still
set to default while the signaling is already set to 1.8V, which
results in an attempt to communicate with a 1.8V card using pins
in 3.3V mode and thus communication failure.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Masahiro Yamada <[email protected]>
|
|
Add definition of the POCCTRL register and bits therein to R8A77990 E3
pincontrol driver. This allows the pincontrol driver to configure SDHI
pin voltage according to power-source DT property.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
|
|
Use fixed 4bit size for generating the DRV register element mask,
not the size of the value, which can be smaller.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Masahiro Yamada <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
|
