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2018-09-11reset: Introduce TI System Control Interface (TI SCI) reset driverAndreas Dannenberg
Some TI Keystone 2 and K3 family of SoCs contain a system controller (like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and the Device Management and Security Controller on AM65x SoCs) that manage the low-level device control (like clocks, resets etc) for the various hardware modules present on the SoC. These device control operations are provided to the host processor OS through a communication protocol called the TI System Control Interface (TI SCI) protocol. This patch adds a reset driver that communicates to the system controller over the TI SCI protocol for performing reset management of various devices present on the SoC. Various reset functionalities are achieved by the means of different TI SCI device operations provided by the TI SCI framework. This code is loosely based on the drivers/reset/reset-ti-sci.c driver of the Linux kernel. Reviewed-by: Tom Rini <[email protected]> Signed-off-by: Andreas Dannenberg <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]>
2018-09-11dm: reset: Update uclass to allow querying reset statusAndreas Dannenberg
Add a reset operations function pointer to support querying the current status of a reset control. Reviewed-by: Tom Rini <[email protected]> Signed-off-by: Andreas Dannenberg <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]>
2018-09-11dm: firmware: Automatically bind child devicesAndreas Dannenberg
To support scenarios where a firmware device node has subnodes that have their own drivers automatically scan the DT and bind those when the firmware device gets bound. Reviewed-by: Tom Rini <[email protected]> Signed-off-by: Andreas Dannenberg <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]>
2018-09-11firmware: ti_sci: Add support for processor control servicesLokesh Vutla
TI-SCI message protocol provides support for controlling of various physical cores available in SoC. In order to control which host is capable of controlling a physical processor core, there is a processor access control list that needs to be populated as part of the board configuration data. Introduce support for the set of TI-SCI message protocol apis that provide us with this capability of controlling physical cores. Reviewed-by: Tom Rini <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]>
2018-09-11firmware: ti_sci: Add support for reboot core serviceAndreas Dannenberg
Since system controller now has control over SoC power management, it needs to be explicitly requested to reboot the SoC. Add support for it. Reviewed-by: Tom Rini <[email protected]> Signed-off-by: Andreas Dannenberg <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Nishanth Menon <[email protected]>
2018-09-11firmware: ti_sci: Add support for clock controlLokesh Vutla
In general, we expect to function at a device level of abstraction, however, for proper operation of hardware blocks, many clocks directly supplying the hardware block needs to be queried or configured. Introduce support for the set of SCI message protocol support that provide us with this capability. Reviewed-by: Tom Rini <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Nishanth Menon <[email protected]>
2018-09-11firmware: ti_sci: Add support for device controlAndreas Dannenberg
TI-SCI message protocol provides support for management of various hardware entitites within the SoC. Introduce the fundamental device management capability support to the driver protocol as part of this change. Reviewed-by: Tom Rini <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Nishanth Menon <[email protected]>
2018-09-11firmware: ti_sci: Add support for board configurationAndreas Dannenberg
TI-SCI message protocol provides support for board configuration to assign resources and other board related operations. Introduce the board configuration capability support to the driver protocol as part of this change. Reviewed-by: Tom Rini <[email protected]> Signed-off-by: Andreas Dannenberg <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]>
2018-09-11firmware: Add basic support for TI System Control Interface (TI SCI) protocolLokesh Vutla
Texas Instrument's System Control Interface (TI SCI) message protocol is used in Texas Instrument's System on Chip (SoC) such as those in the K3 family AM654 SoC to communicate between various compute processors with a central system controller entity. The TI SCI message protocol provides support for management of various hardware entities within the SoC. Add support driver to allow communication with system controller entity within the SoC using the mailbox client. This is mostly derived from the TI SCI driver in Linux located at drivers/firmware/ti_sci.c. Reviewed-by: Tom Rini <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Signed-off-by: Andreas Dannenberg <[email protected]>
2018-09-11arm: K3: Add initial support for TI's K3 generation of SoCsLokesh Vutla
Add support for Texas Instruments' K3 Generation Processor families. Signed-off-by: Lokesh Vutla <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2018-09-11mmc: uniphier-sd: sync with LinuxMasahiro Yamada
Sync with the driver code and the binding recently merged in Linux. Signed-off-by: Masahiro Yamada <[email protected]>
2018-09-11fpga: Kconfig: Replace spaces with tabsMichal Simek
Trivial Kconfig cleanup. Use tabs instead of spaces. Signed-off-by: Michal Simek <[email protected]>
2018-09-10serial: omap: Introduce DM specific omap serialLokesh Vutla
Add driver model support for OMAP_SERIAL while reusing the functions in ns16550.c Signed-off-by: Lokesh Vutla <[email protected]> Reviewed-by: Tom Rini <[email protected]> Tested-by: Derald D. Woods <[email protected]>
2018-09-10serial: arm_dcc: Add DCC support for V7R based coresLokesh Vutla
DCC is supported on Cortex R series as well. Enable DCC support for V7R. Signed-off-by: Lokesh Vutla <[email protected]>
2018-09-10pinctrl: Fix build warning with ARM64Lokesh Vutla
Following build warning appears when pinctrl-single is built for ARM64: In file included from drivers/pinctrl/pinctrl-single.c:10:0: drivers/pinctrl/pinctrl-single.c: In function ‘single_configure_pins’: ./arch/arm/include/asm/io.h:43:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] #define __arch_getw(a) (*(volatile unsigned short *)(a)) Fix this by using phys_addr_t for variable reg instead of u32 Signed-off-by: Lokesh Vutla <[email protected]>
2018-09-10dm: omap-timer: Update clock rate only if not populatedLokesh Vutla
timer_pre_probe() tries to populate the clock rate from DT. omap timer driver tries to overwrite this value irrespective of the value populated fro DT. So update this value only when DT doesn't populate the clock rate. Signed-off-by: Lokesh Vutla <[email protected]>
2018-09-10dm: omap-timer: Use 64bit for counter valuesLokesh Vutla
In order to handle counter overflows use 64 bit values for counter. Also load the initial value during probe. Signed-off-by: Lokesh Vutla <[email protected]>
2018-09-10mmc: fsl_esdhc: enable HS400 featurePeng Fan
The strobe dll code is ported from Linux Kernel: drivers/mmc/host/sdhci-esdhc-imx.c The comments are from the above file, "For HS400 eMMC, there is a data_strobe line. This signal is generated by the device and used for data output and CRC status response output in HS400 mode. The frequency of this signal follows the frequency of CLK generated by host. The host receives the data which is aligned to the edge of data_strobe line. Due to the time delay between CLK line and data_strobe line, if the delay time is larger than one clock cycle, then CLK and data_strobe line will be misaligned, read error shows up. So when the CLK is higher than 100MHz, each clock cycle is short enough, host should configure the delay target. " Signed-off-by: Peng Fan <[email protected]> Cc: Jaehoon Chung <[email protected]> Cc: Stefano Babic <[email protected]>
2018-09-10mmc: add HS400 supportPeng Fan
Add HS400 support. Selecting HS400 needs first select HS200 according to spec, so use a dedicated function for HS400. Add HS400 related macros. Remove the restriction of only using the low 6 bits of EXT_CSD_CARD_TYPE, using all the 8 bits. Signed-off-by: Peng Fan <[email protected]> Cc: Jaehoon Chung <[email protected]> Cc: Jean-Jacques Hiblot <[email protected]> Cc: Stefano Babic <[email protected]> Cc: Kishon Vijay Abraham I <[email protected]> Cc: Faiz Abbas <[email protected]> Cc: Marek Vasut <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2018-09-10gpio: stm32f7: replace ODR update by BSRR writePatrice Chotard
Replace clrsetbits on ODR register (2 operations: one read + one write) by writing on the correct bit (SET or RESET) of the BSRR register (only 1 write operation). Moreover this register if safe for simultaneous access by 2 master on the bus. Signed-off-by: Patrick Delaunay <[email protected]> Signed-off-by: Patrice Chotard <[email protected]>
2018-09-10clk: clk_meson: Add mux and div support for reparent and rate settingNeil Armstrong
This patch adds support for : - Rate calculation through muxes and generic dividers - Basic gate setting propagation - Reparenting for muxes - Clock rate setting through generic dividers without reparenting Support is only added to the Composite VPU and VAPB clocks in order to support the Video Processing Unit Power Domain clock setup. Reviewed-by: Simon Glass <[email protected]> Signed-off-by: Neil Armstrong <[email protected]>
2018-09-10power: domain: Add the VPU Power Domain driverNeil Armstrong
The Amlogic Meson SoCs embeds a specific Power Domain dedicated to the Video Processing Unit. This patch implements support for this power domain in preparation of the future support for the Video display support in U-Boot. This driver will depend on changes in the clock driver to handle the setup of the VPU and VAPB clocks configured from DT using assigned-clocks entries. Reviewed-by: Simon Glass <[email protected]> Signed-off-by: Neil Armstrong <[email protected]>
2018-09-10Remove <inttypes.h> includes and PRI* usages in printf() entirelyMasahiro Yamada
In int-ll64.h, we always use the following typedefs: typedef unsigned int u32; typedef unsigned long uintptr_t; typedef unsigned long long u64; This does not need to match to the compiler's <inttypes.h>. Do not include it. The use of PRI* makes the code super-ugly. You can simply use "l" for printing uintptr_t, "ll" for u64, and no modifier for u32. Signed-off-by: Masahiro Yamada <[email protected]>
2018-09-10sandbox: Add serial testPatrice Chotard
Signed-off-by: Patrice Chotard <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2018-09-10serial: stm32: Replace setparity by setconfigPatrice Chotard
Replace stm32_serial_setparity by stm32_serial_setconfig which allows to set serial bits number, parity and stop bits number. Only parity setting is implemented. Signed-off-by: Patrick Delaunay <[email protected]> Signed-off-by: Patrice Chotard <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2018-09-10dm: serial: Replace setparity by setconfigPatrice Chotard
Replace setparity by more generic setconfig ops to allow uart parity, bits word length and stop bits number change. Adds SERIAL_GET_PARITY/BITS/STOP macros. Signed-off-by: Patrick Delaunay <[email protected]> Signed-off-by: Patrice Chotard <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2018-09-10serial: protect access to serial rx bufferPatrick Delaunay
Add test to avoid access to rx buffer when this buffer is empty. In this case directly call getc() function to avoid issue when tstc() is not called. Signed-off-by: Patrick Delaunay <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2018-09-10mtd: nand: denali: fix unaligned cache operations on ARMv7 SoCsMasahiro Yamada
If the OOB size is not multiple of the cache line size, the ARMv7 cache operation still prints "Misaligned operation at range". => nand info Device 0: nand0, sector size 256 KiB Page size 4096 b OOB size 224 b Erase size 262144 b subpagesize 4096 b options 0x00104200 bbt options 0x00060000 => nand dump 0 CACHE: Misaligned operation at range [9fb15280, 9fb16360] CACHE: Misaligned operation at range [9fb15280, 9fb16360] CACHE: Misaligned operation at range [9fb15280, 9fb16360] CACHE: Misaligned operation at range [9fb15280, 9fb16360] ... The cache flushing operations won't happen in this case to cover all of the range to fix this by making sure we have things aligned. Reported-by: Marek Vasut <[email protected]> Signed-off-by: Masahiro Yamada <[email protected]> [trini: Reword the commit message to be clear this is a direct problem rather than just a warning]
2018-09-04Merge branch 'master' of git://git.denx.de/u-boot-imxTom Rini
2018-09-04watchdog: mx25: use the imx_watchdog driver for mx25Martin Kaiser
The existing imx_watchdog driver is compatible with mx25 chipsets. Add a WDOG1_BASE_ADDR define for the base address and enable the driver in watchdog's Makefile. To use the driver, a board must define CONFIG_IMX_WATCHDOG and CONFIG_HW_WATCHDOG. This fixes an issue when booting an mx25 chip via usb/serial. In this case, the boot rom will always enable the watchdog. If u-boot is running in interactive mode and the watchdog is not serviced, the system is rebooted when the watchdog expires. Signed-off-by: Martin Kaiser <[email protected]> Reviewed-by: Fabio Estevam <[email protected]>
2018-08-30Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
2018-08-30mmc: renesas-sdhi: Use priv directlyMarek Vasut
The dev_get_priv(dev) is used twice in the probe function. Replace the second invocation with priv variable. Signed-off-by: Marek Vasut <[email protected]> Cc: Masahiro Yamada <[email protected]> Cc: Nobuhiro Iwamatsu <[email protected]>
2018-08-29usb: dwc2: Add reset ctrl to driverLey Foon Tan
Add code to reset all reset signals as in usb DT node. A reset property is an optional feature, so only print out a warning and do not fail if a reset property is not present. If a reset property is discovered, then use it to deassert, thus bringing the IP out of reset. Signed-off-by: Ley Foon Tan <[email protected]>
2018-08-28pci: rmobile: Filter out device 1 and 2Marek Vasut
Only PCI device 1 and 2 is populated on the R-Car Gen2 internal PCIe controller. Ignore all other devices. This fix prevents a duplication of OHCI controller response on slot 0 and 1. Signed-off-by: Marek Vasut <[email protected]>
2018-08-28usb: ehci: Add PHY support to ehci-pciMarek Vasut
Add support for operating a PHY attached to ehci-pci. There are systems where the EHCI controller is internally wired to a PCI bus and has a PHY connected to it as well, ie. the R-Car Gen2. Signed-off-by: Marek Vasut <[email protected]>
2018-08-28usb: ehci: Make the PHY handling genericMarek Vasut
Pull out the EHCI PHY functions into the ehci-hcd.c to let other EHCI drivers use them. Signed-off-by: Marek Vasut <[email protected]>
2018-08-24Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2018-08-24Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
2018-08-24timer: dw-apb: Add Designware APB timer driverMarek Vasut
Add timer driver for the Designware APB Timer IP. This is present for example on the Altera SoCFPGA chips. Signed-off-by: Marek Vasut <[email protected]> Cc: Chin Liang See <[email protected]> Cc: Dinh Nguyen <[email protected]> Cc: Ley Foon Tan <[email protected]>
2018-08-23usb: musb-new: Call musb_platform_exit from musb_stopJagan Teki
musb stop is musb core call during unregister or shutting down gadget or host musb. For graceful exit add musb_platform_exit on musb_stop so-that it can exit the musb platform driver as well. Tested-by: Chen-Yu Tsai <[email protected]> # A33-OlinuXino Tested-by: Jagan Teki <[email protected]> Signed-off-by: Jagan Teki <[email protected]>
2018-08-23usb: musb-new: sunxi: Add proper musb exit supportJagan Teki
musb have platform ops to do proper graceful exit, so add the exit call and move musb platform exit code instead of keeping it in driver remove. This make proper shutdown of musb where .remove will call disable, exit serially via musb_stop. Tested-by: Chen-Yu Tsai <[email protected]> # A33-OlinuXino Tested-by: Jagan Teki <[email protected]> Signed-off-by: Jagan Teki <[email protected]>
2018-08-23musb-new: sunxi: Access ahb_reset0_cfg via ccm offsetJagan Teki
reset0 is not available for sun4i, 5i and 7i so access the reset0 offset from ccm via driver data for relevant Allwinner SoC. this will eventually drop the existing ifdef for SUN6I. Tested-by: Chen-Yu Tsai <[email protected]> # A33-OlinuXino Tested-by: Jagan Teki <[email protected]> Signed-off-by: Jagan Teki <[email protected]>
2018-08-23usb: musb-new: sunxi: Allocate struct phy in privateJagan Teki
Allocate struct phy in private structure instead of allocating locally and assign it to a pointer. This eventually fix miss alignment phy which is used in another functions. Tested-by: Chen-Yu Tsai <[email protected]> # A33-OlinuXino Tested-by: Jagan Teki <[email protected]> Signed-off-by: Jagan Teki <[email protected]>
2018-08-23usb: musb-new: Fix improper musb host pointerJagan Teki
When MUSB is operating in peripheral mode, probe registering musb core using musb_register which intern return int value for validation. so there is no scope to preserve struct musb pointer but the same can be used in .remove musb_stop. So fix this by return musb_register with struct musb pointer. Cc: Igor Grinberg <[email protected]> Cc: Purna Chandra Mandal <[email protected]> Tested-by: Chen-Yu Tsai <[email protected]> # A33-OlinuXino Tested-by: Jagan Teki <[email protected]> Signed-off-by: Jagan Teki <[email protected]>
2018-08-21device: expose the functions used to remove and unbind children of a deviceJean-Jacques Hiblot
Also add a 'drv' parameter to filter the children to remove/unbind. Exporting those functions is a preparatory work for the addition of the bind/unbind commands. Signed-off-by: Jean-Jacques Hiblot <[email protected]>
2018-08-21dm: convert device_get_global_by_of_offset() to device_get_global_by_ofnode()Jean-Jacques Hiblot
Also add device_find_global_by_ofnode() that also find a device based on the OF node, but doesn't probe the device. Signed-off-by: Jean-Jacques Hiblot <[email protected]>
2018-08-21dm: print the index of the device when dumping the dm treeJean-Jacques Hiblot
Command "dm tree" dumps the devices with class, driver, name information. Add the index of the device in the class too, because the information is useful for the bind/unbind commands. Signed-off-by: Jean-Jacques Hiblot <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2018-08-21uclass: Add dev_get_uclass_index() to get the uclass/index of a deviceJean-Jacques Hiblot
This function is the reciprocal of uclass_find_device(). It will be used to print the index information in dm tree dump. Signed-off-by: Jean-Jacques Hiblot <[email protected]>
2018-08-21usb: gadget: Add bcdDevice for the DWC3 USB Gadget ControllerJean-Jacques Hiblot
Add an entry in usb_gadget_controller_number() for the DWC3 gadget controller. Without it, it is not possible to bind the USB Ethernet driver. Signed-off-by: Jean-Jacques Hiblot <[email protected]>
2018-08-21usb: musb-new: omap2430: Enable DM_USB and OF supportAdam Ford
With upcoming changes that require CONFIG_BLK, this broke USB Mass Storage on the OMAP3 boards because if CONFIG_BLK is enabled, it assumes that DM_USB is enabled, but it wasn't yet available on omap3 and omap4 boards. This patch converts the OMAP2430 MUSB glue to support DM_USB and extracts the necessary information based on the device tree. It's based on the ti-musb driver, but there are enough significant differences in both the architecture and device tree entires between am33xx and OMAP3/OMAP4, that I think it makes sense to continue to keep the separate. Per doc/driver-model/usb-info.txt, the USB gadget stuff hasn't migrated to DM_USB yet, so this only supports USB Host for now. Users wanting USB Gadgets will need to disable DM_USB and leave it the old way for now. Signed-off-by: Adam Ford <[email protected]>