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This commit adds paired dev info for winbond w25q16jv
(tested w25q16jvssiq with a i.mx6 board)
Signed-off-by: Ludwig Zenz <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Add support for the Macronix mx25l1633e nor flash. (Tested on a imx6 board)
Signed-off-by: Ludwig Zenz <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Add support for the Gigadevice gd25q16c nor flash. (Tested on a imx6 board)
Signed-off-by: Ludwig Zenz <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This commit adds the following flashes to the id-table
- W25Q16JV
- W25Q32JV
- W25Q64JV
- W25Q128JV
- W25Q256JV
Signed-off-by: Hannes Schmelzer <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This patch adds qspi driver support for ZynqMP SoC. This
driver is responsible for communicating with qspi flash
devices.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
[jagan: removed GQSPI_MIO_NUM_ macros]
Reviewed-by: Jagan Teki <[email protected]>
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Update the xilinx spi driver to support a live tree.
Signed-off-by: Vipul Kumar <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This patch is for the startup block issue in the spi controller.
SPI clock is passing through STARTUP block to FLASH. STARTUP block
don't provide clock as soon as QSPI provides command. So, first
command fails.
This patch added support to read JEDEC id in xilinx_spi_xfer ().
Signed-off-by: Vipul Kumar <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This patch modify xilinx_spi_xfer() function and add rxfifo() and
txfifo() functions to add the modularity so that these functions
can be used by other functions within the same file.
This patch also added support to read fifo_size from dts.
Signed-off-by: Vipul Kumar <[email protected]>
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This patch added support to read register base address from DTS file.
Signed-off-by: Michal Simek <[email protected]>
Signed-off-by: Vipul Kumar <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Add support for the GMAC found in the Allwinner R40/V40 SoC.
The R40 GMAC interface is not controlled by the syscon register but
has a separate configuration register in the CCU.
The clock gate and reset bits are in a different register compared
to the other SoCs supported by this driver.
The driver uses the -gmac suffix for the R40 because the R40 also
has a different 100 MBit MAC (EMAC).
Signed-off-by: Lothar Felten <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
Tested-by: Jagan Teki <[email protected]>
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Use driver data->variant information to select device specific
pin mux and phy clock settings.
Suggested by Jagan Teki
Reviewed-by: Jagan Teki <[email protected]>
Tested-by: Jagan Teki <[email protected]>
Signed-off-by: Lothar Felten <[email protected]>
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If the variant is not set and therefore NULL, do not attempt to print
the variant.
Signed-off-by: Lothar Felten <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
Tested-by: Jagan Teki <[email protected]>
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Commit dd27918c2252 ("dm: mmc: sunxi: Add support for driver model")
only added the allwinner,sun5i-a13-mmc compatible string for this
driver. The DM initialisation code here also works with (at least) A10
and A20, so add the appropriate compatible strings as per Linux 4.17's
driver.
Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC.
(A20 worked already, because sun7i-a20.dtsi specifies both the A13 and
A20 strings.)
Signed-off-by: Adam Sampson <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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- Update SPDX tag in arch/arm/mach-socfpga/spl_a10.c
Signed-off-by: Tom Rini <[email protected]>
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When doing "i2c dev 4; i2c probe" with ENET daughter card connected
on iMX8QXP MEK board, we met a i2c bus busy issue, that the BBF of
lpi2c always show busy, but the master is idle, and stop is detected
(SDF set).
This patch addes a handling to re-init the lpi2c master for this
case. Then the issue can be worked around.
Signed-off-by: Ye Li <[email protected]>
Acked-by: Peng Fan <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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In xfer function, both bus_i2c_read and bus_i2c_write will
send a STOP command. This causes a problem when reading register
data from i2c device.
Generally two operations comprise the register data reading:
1. Write the register address to i2c device.
START | chip_addr | W | ACK | register_addr | ACK |
2. Read the Data from i2c device.
START | chip_addr | R | ACK | DATA | NACK | STOP
The STOP command should happen at the end of the transfer, otherwise
we will always get data from register address 0
Signed-off-by: Ye Li <[email protected]>
Acked-by: Peng Fan <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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For LPI2C IP, NACK is detected by the rising edge of the ninth clock.
In current uboot driver, once NACK is detected, it will reset and then
disable LPI2C master. As a result, we can never see the falling edge
of the ninth clock.
Signed-off-by: Gao Pan <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Add compatible string for i.MX8 and move imx_lpi2c.h from mx7ulp directory
to u-boot include directory as a common header file.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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The SDRAM must first be rewritten by zeroes if ECC is used to initialize
the ECC metadata. Make the CPU overwrite the DRAM with zeroes in such a
case. This scrubbing implementation turns the caches on temporarily, then
overwrites the whole RAM with zeroes, flushes the caches and turns them
off again. This provides satisfactory performance.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
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This function was never used in SPL and the default implementation of
dram_bank_mmu_setup() does the same thing. The only difference is the
part which configures OCRAM as cachable, which doesn't really work as
it covers more than the OCRAM.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
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Add DDR support for Stratix SoC
Signed-off-by: Chin Liang See <[email protected]>
Signed-off-by: Ley Foon Tan <[email protected]>
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Use "%p" to print cmdbuf.
Compilation warning as below:
CC spl/drivers/spi/cadence_qspi_apb.o
LD spl/lib/built-in.o
drivers/spi/cadence_qspi_apb.c: In function ‘cadence_qspi_apb_indirect_write_setup’:
drivers/spi/cadence_qspi_apb.c:696:18: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
cmdlen, (unsigned int)cmdbuf);
Signed-off-by: Ley Foon Tan <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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Use "%zu" for size_t data type.
Compilation warning as below:
In file included from include/linux/bug.h:7:0,
from include/common.h:26,
from drivers/spi/cadence_qspi.c:8:
drivers/spi/cadence_qspi.c: In function ‘cadence_spi_xfer’:
drivers/spi/cadence_qspi.c:211:8: warning: format ‘%d’ expects argument of type ‘int’, but argument 3 has type ‘size_t {aka long unsigned int}’ [-Wformat=]
debug("%s: len=%d [bytes]\n", __func__, data_bytes);
^
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
#define pr_fmt(fmt) fmt
^~~
include/log.h:142:2: note: in expansion of macro ‘debug_cond’
debug_cond(_DEBUG, fmt, ##args)
^~~~~~~~~~
drivers/spi/cadence_qspi.c:211:2: note: in expansion of macro ‘debug’
debug("%s: len=%d [bytes]\n", __func__, data_bytes);
Signed-off-by: Ley Foon Tan <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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In the device tree, the address for the led is located
in the parent node (for exemple leds), not in the led node
(for exemple led@0).
The commit "led: bcm6328: convert to use live dt"
(sha1: 899455176058d673887a762aa38853188a030af4)
change this behaviour and read the address in the led node.
We fix this by reading the base address for led
in the parent node.
Signed-off-by: Philippe Reynes <[email protected]>
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In the device tree, the address for cpu is located in
the node "cpus", not in the cpu node (for exemple cpu@0).
So when probing cpu, the cpu address must be read in the
cpu parent.
The commit "cpu: bmips: convert to use live dt"
(sha1: c444afbbefa103d567f197393d39ec0fcca21a0c)
change this behaviour and read the address in the
cpu node when probing cpu.
We fix this by reading the address in the cpu parent.
Signed-off-by: Philippe Reynes <[email protected]>
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The omap_gpio driver has a TODO that says when every board is converted
to DM and DT, the omap_gpio_bind can stop using calloc and switch
to auto-alloc.
This patch converts this driver to auto-calloc when DT is enabled.
Signed-off-by: Adam Ford <[email protected]>
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Add support for loading U-Boot on the Broadcom 7445 SoC. This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.
Signed-off-by: Thomas Fitzsimmons <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Florian Fainelli <[email protected]>
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Add code to reset all reset signals as in Ethernet DT node. A reset
property is an optional feature, so only print out a warning and do not
fail if a reset property is not present.
If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.
Signed-off-by: Ley Foon Tan <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Add code to reset all reset signals as in serial DT node. A reset
property is an optional feature, so do not fail if a reset property is
not present.
If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.
Signed-off-by: Ley Foon Tan <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add code to reset all reset signals as in mmc DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.
If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.
Signed-off-by: Ley Foon Tan <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET, so can use
CONFIG_IS_ENABLED(DM_RESET) checking in reset.h later.
Signed-off-by: Ley Foon Tan <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This commit adds Actions Semi OWL family UART support. This driver
relies on baudrate configured by primary bootloaders.
Signed-off-by: Manivannan Sadhasivam <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This commit adds Actions Semi OWL family base clock and S900 SoC
specific clock support. For S900 peripheral clock support, only UART
clock has been added for now.
Signed-off-by: Manivannan Sadhasivam <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add additional logging so that common errors when finding a device by
ofnode are easier to debug.
Signed-off-by: Simon Glass <[email protected]>
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Add a way to decode a memory region, including the memory type (sram or
sdram) and its start address and size.
Signed-off-by: Simon Glass <[email protected]>
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Update this function to take an ofnode so that it can work with livetree.
Signed-off-by: Simon Glass <[email protected]>
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Update the parameters sandbox_sf_bind_emul to support livetree.
Signed-off-by: Simon Glass <[email protected]>
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Add a new device_bind_ofnode() function which can bind a device given its
ofnode. This allows binding devices more easily with livetree nodes.
Signed-off-by: Simon Glass <[email protected]>
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Add an ofnode_by_compatible() to allow iterating through ofnodes with a
given compatible string.
Signed-off-by: Simon Glass <[email protected]>
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We have a 32-bit version of this function. Add a 64-bit version as well so
we can easily read 64-bit ints from the device tree.
Signed-off-by: Simon Glass <[email protected]>
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On the A64 the clock for the first USB controller is actually the parent
of the clock for the second controller, so turning them off in that order
makes the system hang.
Fix this by only turning off *both* clocks when the *last* OHCI controller
is brought down. This covers the case when only one controller is used.
Signed-off-by: Andre Przywara <[email protected]>
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When using CONFIG_OF_BOARD on rpi to use the dtb provided by the
RaspberryPi Fundation, the compatible string isn't the same, resulting
in not-functional usb from u-boot.
Signed-off-by: Oleksandr Tymoshenko <[email protected]>
Signed-off-by: Emmanuel Vadot <[email protected]>
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Make the initialization sequence consistent with the Linux kernel
driver.
Reviewed-by: Stefan Roese <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Signed-off-by: Rabeeh Khoury <[email protected]>
Signed-off-by: Baruch Siach <[email protected]>
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This fixes sporadic timeout on initial packet Tx (usually ARP), with an
error message like:
timeout: packet not sent
Reviewed-by: Stefan Roese <[email protected]>
Tested-by: Chris Packham <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Signed-off-by: Rabeeh Khoury <[email protected]>
Signed-off-by: Baruch Siach <[email protected]>
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phyread can timeout and val will contain random value. Initialize it to
zero not to report random value in case of error.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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