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The BCM2835 family of SoCs has 2 different SD controllers: One based on
the SDHCI spec and a custom, home-grown one.
This patch implements a driver for the latter based on the Linux driver.
This is needed so that we can make use of device trees that assume driver
presence of both SD controllers.
Signed-off-by: Alexander Graf <[email protected]>
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The bcm283x family of SoCs have a GPIO controller that also acts as
pinctrl controller.
This patch introduces a new pinctrl driver that can actually properly mux
devices into their device tree defined pin states and is now the primary
owner of the gpio device. The previous GPIO driver gets moved into a
subdevice of the pinctrl driver, bound to the same OF node.
That way whenever a device asks for pinctrl support, it gets it
automatically from the pinctrl driver and GPIO support is still available
in the normal command line phase.
Signed-off-by: Alexander Graf <[email protected]>
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The set_parent implementations do not make sense when OF_PLATDATA is
enabled. We guard these against OF_PLATDATA and don't populate the
set_parent-op when this is the case.
Signed-off-by: Philipp Tomsich <[email protected]>
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Implement the setting parent for gmac clock, and add internal
pll div set for mac clk.
Signed-off-by: David Wu <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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"assign-clock-rate"
The RK3288 CRU-node assigns rates to a number of clocks that are not
implemented in the RK3288 clock-driver (but which have been
sufficiently initialised from rkclk_init()): for these clocks, we
implement the gmac clock set parent, but simply ignore the
others' set_rate() operation and return 0 to signal success.
Signed-off-by: David Wu <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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The GMAC in the RK3228 once again is identical to the incarnation in
the RK3288 and the RK3399, except for where some of the configuration
and control registers are located in the GRF.
This adds the RK3368-specific logic necessary to reuse this driver.
Signed-off-by: David Wu <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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Assuming mac_clk is fed by an external clock, set clk_rmii_src
clock select control register from IO for rgmii interface.
Signed-off-by: David Wu <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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Set gmac pins iomux and rgmii tx pins to 12ma drive-strength,
clean others to 2ma.
Signed-off-by: David Wu <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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Clean the iomux definitions at grf_rk322x.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.
After that, define the uart2 iomux at rk322x-board file.
Signed-off-by: David Wu <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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The GMAC2IO in the RK3328 once again is identical to the incarnation in
the RK3288 and the RK3399, except for where some of the configuration
and control registers are located in the GRF.
This adds the RK3328-specific logic necessary to reuse this driver.
Signed-off-by: David Wu <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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The rk3328 soc has two gmac controllers, one is gmac2io,
the other is gmac2phy. We use the gmac2io rgmii interface
for 1000M phy here.
Signed-off-by: David Wu <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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Need to set gmac m1 pins iomux, gmac m0 tx pins, select bit2
and bit10 at com iomux register. After that, set rgmii m1 tx
pins to 12ma drive-strength, and clean others to 2ma.
Signed-off-by: David Wu <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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Clean the iomux definitions at grf_rk3328.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.
Signed-off-by: David Wu <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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The rv1108 GMAC only support rmii interface, so need to add the
set_rmii() ops. Use the phy current interface to set rmii or
rgmii ops. At the same time, need to set the mac clock rate of
rmii with 50M, the clock rate of rgmii with 125M.
Signed-off-by: David Wu <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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If we include both the rk3288_grf.h and rv1108_grf.h, it will cause the
conflicts of redefinition. Clean the iomux definitions at grf_rv1108.h,
and move them into pinctrl-driver.
Signed-off-by: David Wu <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
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The RK3399 CRU-node assigns rates to a number of clocks that are not
implemented in the RK3399 clock-driver (but which have been
sufficiently initialised from rkclk_init()): for these clocks, we
simply ignore the set_rate() operation and return 0 to signal success.
Signed-off-by: Philipp Tomsich <[email protected]>
Tested-by: David Wu <[email protected]>
Series-changes: 2
- Fixed David's email address.
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Linux uses the properties 'assigned-clocks', 'assigned-clock-parents'
and 'assigned-clock-rates' to configure the clock subsystem for use
with various peripheral nodes.
This implements clk_set_defaults() and hooks it up with the general
device probibin in drivers/core/device.c: when a new device is probed,
clk_set_defaults() will be called for it and will process the
properties mentioned above.
Note that this functionality is designed to fail gracefully (i.e. if a
clock-driver does not implement set_parent(), we simply accept this
and ignore the error) as not to break existing board-support.
Signed-off-by: Philipp Tomsich <[email protected]>
Tested-by: David Wu <[email protected]>
Series-changes: 2
- Fixed David's email address.
Series-version: 2
Cover-letter:
clk: support assigned-clock, assigned-clock-parents, assigned-clock-rates
For various peripherals on Rockchip SoCs (e.g. for the Ethernet GMAC),
the parent-clock needs to be set via the DTS. This adds the required
plumbing and implements the GMAC case for the RK3399.
END
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This implements the (newly added) set_parent() operation for the
RK3399 with a focus on allowing the RGMII clock parent to be
configured via the assigned-clock-parents property of the GMAC node.
This implementation supports only the GMAC (in fact only the RGMII
clock parent) and allows to set this clock's parent either to the
internal SCLK_GMAC or to an external clock input (identifiable by it
providing a 'clock-output-name' of "gmac_clkin").
Signed-off-by: Philipp Tomsich <[email protected]>
Tested-by: David Wu <[email protected]>
Series-changes: 2
- Fixed David's email address.
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The logic in clk_get_by_index() may be useful for other properties
than 'clocks': e.g. 'assigned-clocks' and 'assigned-clock-parents'
follows the same model.
This commit refactors clk_get_by_index() by introducing an internal
function clk_get_by_indexed_prop() that allows to specify the name
of the property to process. The original clk_get_by_index() call
is simply directed through this helper function with the property
name fixed to "clocks".
Signed-off-by: Philipp Tomsich <[email protected]>
Tested-by: David Wu <[email protected]>
Series-changes: 2
- Fixed David's email address.
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Clocks may support multiple parents: this change introduces an
optional operation on the clk-uclass to set a clock's parent.
Signed-off-by: Philipp Tomsich <[email protected]>
Tested-by: David Wu <[email protected]>
Series-changes: 2
- Fixed David's email address.
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PLLSAIP divider uses 2 bits (bits 16 and 17) into RCC_PLLSAICFGR
register, available combination are :
00: PLLSAIP = 2
01: PLLSAIP = 4
10: PLLSAIP = 6
11: PLLSAIP = 8
Previously, the divider value was incorrectly set to 6.
Signed-off-by: Patrice Chotard <[email protected]>
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Move SYSCFG clock setup into configure_clocks() instead of calling
clock_setup() from board file.
As this clock is only needed in case of ethernet enabled and as
both stm32f4 and stm32f7 are using the Designware ethernet IP,
we use CONFIG_ETH_DESIGNWARE to only enable this clock if needed.
Move the RMII setup from board_early_init_f() to board_init()
to insure that RMII bit is set only when clock driver is initialized.
Signed-off-by: Patrice Chotard <[email protected]>
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Thanks to 'commit ba1f96672522 ("net: designware: add clock support")'
we don't need anymore to setup the STMMAC clock in board.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Vikas Manocha <[email protected]>
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All current STM32F4 supported boards uses a 8MHz external oscillator.
All current STM32F7 supported boards uses a 25MHz external oscillator.
In order to introduce the new stm32f429-evaluation board which uses a
25MHz external oscillator without creating a dedicated struct
stm32_clk_info for this board, retrieve the external oscillator
frequency from DT and set pll_m accordingly to obtain 1MHz for the VCO.
Signed-off-by: Patrice Chotard <[email protected]>
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Clarify the computation precedence in two ternary operator
constructions.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Mario Six <[email protected]>
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Make the MPC8xxx GPIO driver compatible with a live device tree.
Signed-off-by: Mario Six <[email protected]>
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Finally, make the mpc8xxx driver capable of handling more GPIO devices;
this entails adding a special case for the MPC5121 SoC, and adding a set
of new compatible strings.
Signed-off-by: Mario Six <[email protected]>
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Rename the Kconfig option, structures (and their members), as well as
functions of the mpc85xx driver to include mpc8xxx to reflect the more
generic usage.
Signed-off-by: Mario Six <[email protected]>
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In preparation to making the MPC85xx GPIO driver useable for a broader
range of SoCs, rename the driver file.
Signed-off-by: Mario Six <[email protected]>
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Fix some style violations in the MPC85XX GPIO driver.
Signed-off-by: Mario Six <[email protected]>
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Make the pca953x_gpio driver compatible with a live device tree.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Mario Six <[email protected]>
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Fix some style violations in the pca953x_gpio driver.
Signed-off-by: Mario Six <[email protected]>
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The variable hcd_name is unsued, drop.
Cc: Marek Vasut <[email protected]>
Cc: Chris Brandt <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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The isp116x-hcd driver is extremely long unused, so just remove it.
Cc: Marek Vasut <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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Add DM capable code into the SH ethernet driver and support probing
both from DT and pdata. The legacy non-DM, non-DT support is retained
as there are still systems in the tree which are not DM or DT capable.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Joe Hershberger <[email protected]>
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Move the legacy functions around, so that they can be wrapped in a
massive ifdef CONFIG_DM_ETH once DM support is added. No functional
change.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Joe Hershberger <[email protected]>
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Split sh_eth_init() function into smaller chunks, which can
be called from both DM and non-DM code while handling the
specifics of both configurations.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Joe Hershberger <[email protected]>
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Pull out the code for writing MAC address into the NIC into a
separate function, so it can be reused by both DM and non-DM
code. This is done in preparation for DM support, which handles
MAC address programming separately.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Joe Hershberger <[email protected]>
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Split sh_eth_recv into two functions, one which checks whether
a packet was received and one which handles the received packet.
This is done in preparation for DM support, which handles these
two parts separately.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Joe Hershberger <[email protected]>
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Pass sh_eth_dev structure around instead of eth_device, since the
later is specific to the legacy networking support. This change is
done in preparation for the DM addition.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Joe Hershberger <[email protected]>
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Use the common RCAR_GEN2 config option instead of enumerating
each SoC and having a lengthy ifdef clause. No functional change.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Joe Hershberger <[email protected]>
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Cosmetic fix, make ravb_start() static.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
Cc: Joe Hershberger <[email protected]>
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Add driver for the Renesas RCar PCIe controller present on Gen2 SoCs.
The PCIe on Gen2 is used both to connect external PCIe peripherals as
well as access the on-SoC USB EHCI controller.
Signed-off-by: Marek Vasut <[email protected]>
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Add DT compatible string for RCar Gen2.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Nobuhiro Iwamatsu <[email protected]>
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Add allwinner,sun50i-h5-pinctrl compatible for H5 boards.
Signed-off-by: Chris Blake <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
[jagan: remove external link and format commit message]
Signed-off-by: Jagan Teki <[email protected]>
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The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.
Disable this command that is not critical until we can adress the issue
properly.
Reviewed-by: Anatolij Gustschin <[email protected]>
Reviewed-by: Andre Przywara <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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