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After Simon's patch, the dtoc can work with 64bit address,
so we need to fix reg number for it.
Depend on Simon's patch set:
https://patchwork.ozlabs.org/cover/807266/
Signed-off-by: Kever Yang <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
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With the new 32/64bit-aware dtoc, the type of reg is fdt64_t and the
OF_PLATDATA structure layout changes. This adjusts the DMC driver for
the RK3368 to track these changes.
For the time being (i.e. until regmap_init_mem_platdata works for the
64bit case), we won't use regmap_init_mem_platdata here and simply
access of_plat.reg[] directly.
Signed-off-by: Philipp Tomsich <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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With dtoc emitting fdt64_t for addresses (and region sizes), the array
indices for accessing the reg[] array needs to be adjusted. This
adjusts the Rockchip DM timer driver to correctly handle OF_PLATDATA
given this new structure layout.
Signed-off-by: Philipp Tomsich <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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With the dev_read_addr_ptr function available, we can change the
efuse driver to use it (and eliminate the explicit type-cast).
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Update the clock driver for the RK3399 to support a live device tree.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The generic ehci-driver (ehci-generic.c) will try to enable the clocks
listed in the DTSI. If this fails (e.g. due to clk_enable not being
implemented in a driver and -ENOSYS being returned by the clk-uclass),
the driver will bail our and print an error message.
This implements a minimal clk_enable for the RK3399 and supports the
clocks mandatory for the EHCI controllers; as these are enabled by
default we simply return success.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Remove a comment claiming that this driver only supports the RK3288,
as we also use it on the RK3368, RK3399 and (most likely) on other
variants.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Version-changes: 2
- use the dev_read_addr_ptr function in rk_gpio.c
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Update the Rockchip GPIO-bank driver to support a live tree.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Version-changes: 2
- use the dev_read_addr_ptr function in rk_gpio.c
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Update the Rockchip I2C driver to support livetree.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Acked-by: Heiko Schocher <[email protected]>
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Remove header file includes that have been left over after the
conversion to livetree-support.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
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Update the Rockchip SDHCI wrapper to support a live device tree.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Version-changes: 2
- use the dev_read_addr_ptr function in rockchip_sdhci.c
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Update the Rockchip SPI driver to support a live device tree.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
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Update the pinctrl driver for the RK3368 to support a live device tree.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
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Update the clock driver for the RK3368 to support a live device tree.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Version-changes: 2
- use the dev_read_addr_ptr function in clk_rk3368.c
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Update the Rockchip timer driver to support a live device tree.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
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To make the Rockchip DM timer driver useful for the timing of
bootstages, we need a few enhancements:
- This implements timer_get_boot_us.
- This avoids reinitialising the timer, if it has already been
set up (e.g. by our TPL and SPL stages). Now, we have a single
timebase ticking from TPL through the full U-Boot.
- This adds support for reading the timer even before the
device-model is ready: we find the timer via /chosen/tick-timer,
then read its address and clock-frequency, and finally read the
timeval directly).
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
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Update the Rockchip-specific wrapper for the Designware driver to
support a live device tree.
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Version-changes: 2
- use the dev_read_addr_ptr function in rockchip_dw_mmc.c
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Update the Micrel KSZ90x1 driver for a live tree.
Signed-off-by: Philipp Tomsich <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Update the Designware Ethernet MAC driver to support a live device
tree.
Signed-off-by: Philipp Tomsich <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The dev_read_addr_ptr() mimics the behaviour of the devfdt_get_addr_ptr(),
retrieving the first address of the node's reg-property and returning
it as a pointer (or NULL on failure).
Signed-off-by: Philipp Tomsich <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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When used with bootstage recording, dm_timer_init may be called
surprisingly early: i.e. before dm_root is ready. To deal with
this case, we explicitly check for this condition and return
-EAGAIN to the caller (refer to drivers/timer/rockchip_timer.c
for a case where this is needed/used).
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
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This updates dm_timer_init to support a live tree and deals with
some fallout (i.e. the need to restructure the code such, that we
don't need multiple discontinuous #if CONFIG_IS_ENABLED blocks).
Signed-off-by: Philipp Tomsich <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
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The sysreset driver for rk322x is ready but not enabled,
add it to Makefile to make sure it's enabled.
Signed-off-by: Kever Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
Acked-by: Philipp Tomsich <[email protected]>
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The Denali IP does not update the revision register properly.
Allow to override it with SoC data associated with compatible.
Linux had already finished big surgery of this driver, but I need
to prepare the NAND core before the full sync of the driver.
For now, I am fixing the most fatal problem on UniPhier platform.
Signed-off-by: Masahiro Yamada <[email protected]>
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With bootstage we need access to the timer before driver model is set up.
To handle this, put the required state in global_data and provide a new
function to set up the device, separate from the driver's probe() method.
This will be used by the 'early' timer also.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Per the Intel 64 and IA-32 Architecture Software Developer's Manual,
add the reference clock for Intel Atom Processors based on the Airmont
Microarchitecture (Braswell).
This keeps in sync with Linux kernel commit:
6fcb41c: x86/tsc_msr: Add Airmont reference clock values
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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All these places seem to inherit the codes from the MMC driver where
a FIXME was put in the comment. However the correct operation after
read should be cache invalidate, not flush.
The underlying drivers should be responsible for the cache operation.
Remove these codes completely.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Reviewed-by: York Sun <[email protected]>
Reviewed-by: Joe Hershberger <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: York Sun <[email protected]>
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We want to support more than one phandle argument. It makes sense to use
an array for this rather than discrete struct members. Adjust the code to
support this. Rename the member to 'arg' instead of 'id'.
Signed-off-by: Simon Glass <[email protected]>
Tested-by: Kever Yang <[email protected]>
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Rather than naming the phandle struct according to the number of cells it
uses (e.g. struct phandle_2_cell) name it according to the number of
arguments it has (e.g. struct phandle_1_arg). This is a more intuitive
naming.
Signed-off-by: Simon Glass <[email protected]>
Tested-by: Kever Yang <[email protected]>
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When using 32-bit addresses dtoc works correctly. For 64-bit addresses it
does not since it ignores the #address-cells and #size-cells properties.
Update the tool to use fdt64_t as the element type for reg properties when
either the address or size is larger than one cell. Use the correct value
so that C code can obtain the information from the device tree easily.
Alos create a new type, fdt_val_t, which is defined to either fdt32_t or
fdt64_t depending on the word size of the machine. This type corresponds
to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types
since they are defined to phys_addr_t and phys_size_t which use
'unsigned long' in the 32-bit case, rather than 'unsigned int'.
Add tests for the four combinations of address and size values (32/32,
64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368
which now need to use the new fdt_val_t type.
Signed-off-by: Simon Glass <[email protected]>
Suggested-by: Heiko Stuebner <[email protected]>
Reported-by: Kever Yang <[email protected]>
Reviewed-by: Philipp Tomsich <[email protected]>
Tested-by: Kever Yang <[email protected]>
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As said in READRE.kconfig, include/configs/*.h will be removed
after all options are switched to Kconfig. As the first step,
remove the follow line from include/configs/*.h.
#include <asm/hardware.h>
Signed-off-by: Wenyou Yang <[email protected]>
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By default, it is assumed that the UTMI clock is generated from
a 12 MHz reference clock (MAINCK). If it's not the case, the FREQ
field of the SFR_UTMICKTRIM has to be updated to generate the UTMI
clock in the proper way.
The UTMI clock has a fixed rate of 480 MHz. In fact, there is no
multiplier we can configure. The multiplier is managed internally,
depending on the reference clock frequency, to achieve the target
of 480 MHz.
The patch is cloned from the patch of mailing-list:
[PATCH v2] clk: at91: utmi: set the mainck rate
Signed-off-by: Wenyou Yang <[email protected]>
[trini: Depend on SPL_DM]
Signed-off-by: Tom Rini <[email protected]>
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The SPL_CLK config should depend on SPL && SPL_DM.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Some device the serial console's initialization cannot run early during
the boot process. Hence, nulldev serial device is helpful on that
situation.
For example, if the serial module was implemented in FPGA. Serial
initialization is prohibited to run until the FPGA was programmed.
This commit is to adding nulldev serial driver. This will allows the
default console to be specified as a nulldev.
Signed-off-by: Joe Hershberger <[email protected]>
Signed-off-by: Keng Soon Cheah <[email protected]>
Cc: Chen Yee Chew <[email protected]>
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This commit adds support for GPIO reset lines matching the
common linux "reset-gpios" devicetree binding.
Signed-off-by: Moritz Fischer <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Import include/linux/dma-direction.h from Linux 4.13-rc7 and delete
duplicated definitions of enum dma_data_direction.
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
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Signed-off-by: Tomas Melin <[email protected]>
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Add the new compatible "atmel,24mac402" to accommodate AT24MAC402.
The AT24MAC402 is a 2K Serial EEPROM and the 2-Kbit memory array
is internally organized as 16 pages of 16 bytes of EEPROM each.
The 48-bit EUI address in the AT24MAC402 are located in the extended
memory block.
Signed-off-by: Wenyou Yang <[email protected]>
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Add the new compatible "microchip,24aa02e48" to accommodate 24AA02E48,
the 24AA02E48 is a 2K I2C Serial EEPROM with pre-programmed globally
unique, 48-bit node address, and 8-byte page size.
Signed-off-by: Wenyou Yang <[email protected]>
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The use-case is that the thing that loaded u-boot already put a splash
image on screen. And we want to preserve that until grub boot menu
takes over.
Signed-off-by: Rob Clark <[email protected]>
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Not really qcom specific, but for now qcom/lk is the one firmware that
is (afaiu) setting up the appropriate dt node for pre-configured
display. Uses the generic simple-framebuffer DT bindings so this should
be useful on other platforms.
Signed-off-by: Rob Clark <[email protected]>
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The STM32 LTDC display controller provides a parallel digital RGB and
signals for horizontal, vertical synchronization, Pixel Clock and Data
Enable as output to interface directly to a variety of LCD and TFT panels.
The LTDC main features are:
- 24-bit RGB Parallel Pixel Output, Programmable timings & polarity for
HSync, VSync and Data Enable.
- 2 layers with Blending, Color Keying, Window position & size,
Dithering, Background color, Color Look-Up Table (CLUT).
- Supported layer color formats: ARGB8888, RGB888, RGB565, ARGB1555,
ARGB4444, L8 CLUT, AL44 & AL88
This LTDC driver:
- supports: RGB parallel output with timings & polarity, 1 layer
in RGB565.
- supports but with hard-coded configurations: blending, window
position & size (crop), background color.
- does not support yet: rgb888, argb8888, 8-bit clut, dithering.
This LTDC driver is compatible with all stm32 platforms with the
LTDC IP and has been tested on stm32 f746-disco board.
Signed-off-by: Philippe CORNU <[email protected]>
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Add a driver for GPIO backlights.
It understands the standard device tree binding.
It can be used with simple-panel when PWM is not necessary.
Signed-off-by: Patrick Delaunay <[email protected]>
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Add a config to select individually the driver for PWM backlights.
Manage "depends on" to be backyard compatible.
Signed-off-by: Patrick Delaunay <[email protected]>
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