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Add support for clocks needed by MACs to ast2500 clock driver.
The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
PCLK_MAC2 for MAC1 and MAC2 respectively.
The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed
SDK. It is not entirely clear from the datasheet how this clock is used
by MACs, so not clear if the rate would ever need to be different. So,
for now, hardcoding it is probably safer.
The rate of PCLK_MAC{1,2} is chosen based on MAC speed selected through
hardware strapping.
So, the network driver would only need to enable these clocks, no need
to configure the rate.
Signed-off-by: Maxim Sloyko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add Device Model based I2C driver for ast2500/ast2400 SoCs.
The driver is very limited, it only supports master mode and
synchronous byte-by-byte reads/writes, no DMA or Pool Buffers.
Signed-off-by: Maxim Sloyko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Heiko Schocher <[email protected]>
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Add P-Bus Clock support to ast2500 clock driver.
This is the clock used by I2C devices.
Signed-off-by: Maxim Sloyko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This driver uses Generic Pinctrl framework and is compatible with
the Linux driver for ast2500: it uses the same device tree
configuration.
Not all pins are supported by the driver at the moment, so it actually
compatible with ast2400. In general, however, there are differences that
in the future would be easier to maintain separately.
Signed-off-by: Maxim Sloyko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This change switches all existing users of ast2500 Watchdog to Driver
Model based Watchdog driver.
To perform system reset Sysreset Driver uses first Watchdog device found
via uclass_first_device call. Since the system is going to be reset
anyway it does not make much difference which watchdog is used.
Instead of using Watchdog to reset itself, SDRAM driver now uses Reset
driver to do that.
These were the only users of the old Watchdog API, so that API is
removed.
This all is done in one change to avoid having to maintain dual API for
watchdog in between.
Signed-off-by: Maxim Sloyko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add Reset Driver for ast2500 SoC. This driver uses Watchdog Timer to
perform resets and thus depends on it. The actual Watchdog device used
needs to be configured in Device Tree using "aspeed,wdt" property, which
must be WDT phandle, for example:
rst: reset-controller {
compatible = "aspeed,ast2500-reset";
aspeed,wdt = <&wdt1>;
}
Signed-off-by: Maxim Sloyko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Make functions for locking and unlocking SCU part of SCU API.
Many drivers need to modify settings in SCU and thus need to unlock it
first. This change makes it possible.
Signed-off-by: Maxim Sloyko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This driver supports ast2500 and ast2400 SoCs.
Only ast2500 supports reset_mask and thus the option of resettting
individual peripherals using WDT.
Signed-off-by: Maxim Sloyko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This is a simple uclass for Watchdog Timers. It has four operations:
start, restart, reset, stop. Drivers must implement start, restart and
stop operations, while implementing reset is optional: It's default
implementation expires watchdog timer in one clock tick.
Signed-off-by: Maxim Sloyko <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add an implementation of the ds1307 driver that uses the driver model
i2c APIs.
Signed-off-by: Chris Packham <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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nand_spl_load_image implementation was copied over into three
different drivers and now with nand_spl_read_block used for
ubispl situation gets even worse. For now use least intrusive
solution and #include the same implementation to nand drivers.
Signed-off-by: Ladislav Michl <[email protected]>
Tested-by: Pau Pajuelo <[email protected]>
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The number of pins to be configured could be more than 50 e.g. in case
of sdram controller, there are about 56 pins (32 data lines, 12 address
& some control signals).
Signed-off-by: Vikas Manocha <[email protected]>
cc: Christophe KERELLO <[email protected]>
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Actually the sdram memory on stm32f746 discovery board is micron part
MT48LC_4M32_B2B5_6A. This patch does the modification required in the
device tree node & driver for the same.
Also we are passing here all the timing parameters in terms of clock
cycles, so no need to convert time(ns or ms) to cycles.
Signed-off-by: Vikas Manocha <[email protected]>
cc: Christophe KERELLO <[email protected]>
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Signed-off-by: Vikas Manocha <[email protected]>
cc: Christophe KERELLO <[email protected]>
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With this gpio driver supporting DM, there is no need to enable clocks
for different gpios (for pin muxing) in the board specific code.
Need to increase the allocatable area required before relocation from 0x400 to
0xC00 becuase of 10 new gpio devices(& new gpio class) added in device tree.
Signed-off-by: Vikas Manocha <[email protected]>
cc: Christophe KERELLO <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This patch adds gpio driver supporting driver model for stm32f7 gpio.
Signed-off-by: Vikas Manocha <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Cc: Christophe KERELLO <[email protected]>
[trini: Add depends on STM32]
Signed-off-by: Tom Rini <[email protected]>
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Signed-off-by: Vikas Manocha <[email protected]>
cc: Christophe KERELLO <[email protected]>
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This patch also removes the sdram/fmc clock enable from board specific
code.
Signed-off-by: Vikas Manocha <[email protected]>
cc: Christophe KERELLO <[email protected]>
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Signed-off-by: Vikas Manocha <[email protected]>
cc: Christophe KERELLO <[email protected]>
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Signed-off-by: Vikas Manocha <[email protected]>
cc: Christophe KERELLO <[email protected]>
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Signed-off-by: Vikas Manocha <[email protected]>
cc: Christophe KERELLO <[email protected]>
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Invoke enable_usb_clocks during board_usb_init and disable_usb_clocks
during board_usb_exit to enable and disable clocks respectively.
Modifications:
* Enable USB clocks in the OMAP version of the function
board_usb_init.
* Disable USB clocks in the OMAP version of the function
board_usb_cleanup.
Cc: Marek Vasut <[email protected]>
Signed-off-by: Uri Mashiach <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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A weak version of the function board_usb_init is implemented in:
common/usb.c
drivers/usb/host/xhci-omap.c
To fix the double implementations:
* Convert the board_usb_init function in drivers/usb/host/xhci-omap.c
normal (not weak).
* The function board_usb_init in drivers/usb/host/xhci-omap.c calls to
the weak function omap_xhci_board_usb_init.
* Rename board version of the function board_usb_init to
omap_xhci_board_usb_init.
Done only for boards that defines CONFIG_USB_XHCI_OMAP.
To achieve the same flexibility with the function board_usb_cleanup:
* Add a normal (not weak) implementation of the function
board_usb_cleanup in drivers/usb/host/xhci-omap.c
* The function board_usb_cleanup in drivers/usb/host/xhci-omap.c calls
to the weak function omap_xhci_board_usb_cleanup.
* Rename board version of the function board_usb_cleanup to
omap_xhci_board_usb_cleanup.
Done only for boards that defines CONFIG_USB_XHCI_OMAP.
Cc: Lokesh Vutla <[email protected]>
Signed-off-by: Uri Mashiach <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Roger Quadros <[email protected]>
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Modify the determination of the base address of xHCI registers of DRA7XX
targets.
Before the commit: by the target.
After the commit: by the USB port index.
Cc: Lokesh Vutla <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Roger Quadros <[email protected]>
Signed-off-by: Uri Mashiach <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Roger Quadros <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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.probe method has been assigned twice when declaring
a driver with U_BOOT_DRIVER(). Removed one of them.
Here is the last commit which had the duplicate entry:
"spi: omap3: Convert to driver model"
(sha1: 77b8d04854f486741471ad02b93b473b5b3d72f8)
Signed-off-by: Suniel Mahesh <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This is not currently implemented. Add support for this so that the
Chrome OS EC can be used reliably.
Signed-off-by: Moritz Fischer <[email protected]>
Acked-by: Simon Glass <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Before using the cs_gpio, check if the GPIO is valid or not.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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This is not used in U-Boot.
Signed-off-by: Simon Glass <[email protected]>
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This converts the following to Kconfig:
CONFIG_SYS_WHITE_ON_BLACK
Signed-off-by: Simon Glass <[email protected]>
[trini: Make this default y on various SoCs]
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_PMIC_AS3722
Signed-off-by: Simon Glass <[email protected]>
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Most of the PMICs are in the drivers/power/pmic/ directory. Move this one
there.
Signed-off-by: Simon Glass <[email protected]>
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Before converting this to Kconfig, rename it to match the other PMICs.
Signed-off-by: Simon Glass <[email protected]>
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This commit adds support for HDMI output.
Signed-off-by: Jernej Skrabec <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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This commit adds support for DM I2C on sunxi platform. It can coexist
with old style sunxi I2C driver, because it is still used in SPL and
by some SoCs.
Because sunxi platform doesn't yet support DM clk, reset and pinctrl
driver, workaround is needed to enable clocks and set resets and
pinctrls. This is done by calling i2c_init_board() in board_init().
This means that CONFIG_I2Cx_ENABLE options needs to be correctly set
in order to use needed I2C controller.
Commit is based on the previous patch made by Philipp Tomsich
Signed-off-by: Jernej Skrabec <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Driver for that regulator is used only in SPL and it uses old I2C
interface. If we want to use DM I2C in U-Boot proper, compilation of
this driver has to be limited only to SPL.
Signed-off-by: Jernej Skrabec <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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This originally started out as
"pinctrl: Kconfig: reorder to keep Rockchip options together"
and tried to keep the Rockchip-related config options together.
However, we now rewrite all chip-specific driver selections to start
with CONFIG_PINCTRL_ (with the inadvertent changes to related
Makefiles) and sort those alphabetically. And as this already means
touching most of the file, we also reformat the help text to not exceed
80 characters (but make full use of those 80 characters).
Signed-off-by: Philipp Tomsich <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Unfortunately a test for the PWM uclass was not included when it was
submitted. This was noticed when trying to add more functionality:
http://patchwork.ozlabs.org/patch/748172/
Add a simple test to get us started.
Signed-off-by: Simon Glass <[email protected]>
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We used to have opencoded ehci_readl()/writel() which required no
external functions to be called.
Now with attempt to switch to generic readl()/writel() accessors
we see a missing declaration of those accessors in ehci-ppc4xx.
Something like that happens if applied
http://patchwork.ozlabs.org/patch/726714/:
---------------->8---------------
CC drivers/usb/host/ehci-ppc4xx.o
drivers/usb/host/ehci-ppc4xx.c: In function 'ehci_hcd_init':
drivers/usb/host/ehci-ppc4xx.c:23:3: warning: implicit declaration of function 'readl' [-Wimplicit-function-declaration]
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
^
---------------->8---------------
Signed-off-by: Alexey Brodkin <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Stefan Roese <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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For id = 15 an out of bound access occurs in udc_setup_ep().
Increase the size of epinfo[] from 30 to 32 to encompass
ids 0..15.
The problem was highlighted by cppcheck.
Signed-off-by: Heinrich Schuchardt <[email protected]>
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We want to check the result of musb_init_controller
and not the address were the result is stored.
Signed-off-by: Heinrich Schuchardt <[email protected]>
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Only A23/A33 in SUN8I want a default value of CONS_INDEX of 5, for other
chips the default value is 1 like other Allwinner SoCs.
Fix this default value.
The original wrong value has lead to wrong console on H3 Orange Pi
boards.
Fixes: 7095f8641863 ("sunxi: Convert CONS_INDEX to Kconfig")
Signed-off-by: Icenowy Zheng <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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This is needed for HDMI, which will be added later.
Signed-off-by: Jernej Skrabec <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Video driver for older Allwinner SoCs uses cfb console framework which
in turn uses struct ctfb_res_modes to hold timing informations. However,
DM video framework uses different structure - struct display_timing.
It makes more sense to convert lcdc to use new timing structure because
all new drivers should use DM video framework and older drivers might be
rewritten to use new framework too.
Signed-off-by: Jernej Skrabec <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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TCON unit has similar layout and functionality also on newer SoCs. This
commit splits out TCON code for easier reuse later.
Signed-off-by: Jernej Skrabec <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The PIO on the R40 SoC is mostly compatible with the A20.
Only a few pin functions for mmc2 were added to the PC
pingroup, to support 8 bit eMMCs.
Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
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The R40 SoC uses the AXP221s in I2C mode to supply power.
Some regulator's common usages have changed, and also the recommended
voltage for existing usages have changed. Update the defaults to match.
Signed-off-by: Chen-Yu Tsai <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
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Convert the CONS_INDEX configuration to Kconfig.
Update sunxi's defconfigs to remove SYS_EXTRA_OPTIONS variable not
needed anymore.
Default value is 1 except for sun5i (equals 2) and sun8i (equals 5).
Signed-off-by: Mylène Josserand <[email protected]>
[Maxime: Added a depends on ARCH_SUNXI to avoid build breakages]
Signed-off-by: Maxime Ripard <[email protected]>
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Convert CONFIG_RGMII to Kconfig. Thanks to that, it is possible to
update defconfig files of SYS_EXTRA_OPTIONS accordingly and
remove it when it is possible.
Signed-off-by: Mylène Josserand <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Convert the SUNXI_EMAC config to Kconfig. Remove it from SYS_EXTRA_OPTIONS
from many sunxi defconfig and renamed it into SUN4I_EMAC to not confuse it
with SUN8I_EMAC.
Signed-off-by: Mylène Josserand <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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