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Move fdt fixup of 'status' property into a weak function. This allows
board to define 'status' fdt fixup by themselves.
Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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This patch adds a simple pmic driver for the mc34vr500 pmic which
is used in conjunction with the fsl T1 and LS1 series SoC.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
Reviewed-by: York Sun <[email protected]>
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This patch is to add 'fsl,esdhc' into of_match table to support
driver model for QorIQ eSDHC.
Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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There would be compiling error as below when enable driver model for esdhc.
undefined reference to `dm_gpio_get_value'
undefined reference to `gpio_request_by_name_nodev'
This patch is to make GPIO support optional with CONFIG_DM_GPIO. Because
all boards of QorIQ platform don't need it and they just check register for
CD/WP status, only some boards of i.MX platform require this.
Signed-off-by: Yangbo Lu <[email protected]>
Acked-by: Jaehoon Chung <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: York Sun <[email protected]>
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All Layerscape SoCs have supported new PCIe driver based on DM.
The lagecy PCIe driver code is unused and can be removed.
Signed-off-by: Minghuan Lian <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: York Sun <[email protected]>
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There are more than five kinds of Layerscape SoCs. unfortunately,
PCIe controller of each SoC is a little bit different. In order
to avoid too many macro definitions, the patch addes a new
implementation of PCIe driver based on DM. PCIe dts node is
used to describe the difference.
Signed-off-by: Minghuan Lian <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: York Sun <[email protected]>
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To make the layerscape pcie driver clear, move the kernel DT fixup
code from pcie_layerscape.c to pcie_layerscape_fixup.c.
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: York Sun <[email protected]>
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There may be multiple PCIe controllers in a SoC.
It is not correct that always calling pci_bus_to_hose(0) to get
the first PCIe controller for the PCIe device connected other
controllers. We just remove this calling because hose always point
the correct PCIe controller.
Signed-off-by: Minghuan Lian <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: York Sun <[email protected]>
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for the legacy PCI driver, the function pci_bus_to_hose() returns
the real PCIe controller. To keep consistency, this function is
changed to return the PCIe controller pointer of the root bus
instead of the current PCIe bus.
Signed-off-by: Minghuan Lian <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The generic probe code in dm works, so get rid of the leftover cruft.
Signed-off-by: Moritz Fischer <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Michal Simek <[email protected]>
Cc: [email protected]
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Revision 1.0 of this IP has a quirk where if during a long read transfer
the transfer_size register will go to 0, the master will send a NACK to
the slave prematurely.
The way to work around this is to reprogram the transfer_size register
mid-transfer when the only the receive fifo is known full, i.e. the I2C
bus is known non-active.
The workaround is based on the implementation in the linux-kernel.
Signed-off-by: Moritz Fischer <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Michal Simek <[email protected]>
Cc: [email protected]
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Reorder the timeout loop such that we first check if the
condition is already true, and then call udelay() so if
the condition is already true, break early.
Reviewed-by: Michal Simek <[email protected]>
Signed-off-by: Moritz Fischer <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Michal Simek <[email protected]>
Cc: [email protected]
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Revision 1.0 of this IP has a couple of issues, such as not supporting
repeated start conditions for read transfers.
So scan through the list of i2c messages for these conditions
and report an error if they are attempted.
This has been fixed for revision 1.4 of the IP, so only report the error
when the IP can really not do it.
Signed-off-by: Moritz Fischer <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Michal Simek <[email protected]>
Cc: [email protected]
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For mux check if the parent is already a device of UCLASS_I2C and if yes
just use that. Otherwise see if someone specified an i2c-parent phandle.
This mimics the behavior found in the Kernel, as it removes the
requirement to explicitly specify a i2c-parent phandle.
Signed-off-by: Moritz Fischer <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Michal Simek <[email protected]>
Cc: [email protected]
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Adding Kconfig for SYS_I2C_S3C24X0.
Signed-off-by: Jaehoon Chung <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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If CONFIG_SYS_I2C_S3C24X0_SLAVE isn't defined, then complie error should
be occurred.
This patch is for preventing it.
Signed-off-by: Jaehoon Chung <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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- Enable eMMC driver for LD11/LD20 SoCs
- Refactoring of SoC init code
- Bug fix of pinctrl driver
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Fix the pin-mux values for the MDC, MDIO, MDIO_INTL, PHYRSTL pins.
Fixes: fc9da85c6059 ("pinctrl: uniphier: add Ethernet pin-mux settings")
Signed-off-by: Masahiro Yamada <[email protected]>
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Latest gcc 6.2 compiler is throwing the below warning for am335x_baltos_defconfig
drivers/usb/gadget/ether.c:501:17: warning: 'mdlm_detail_desc' defined but not used [-Wunused-const-variable=]
static const u8 mdlm_detail_desc[] = {
Guard mdlm_detail_desc with CONFIG_USB_ETH_SUBSET to avoid the warning
Reported-by: Dan Murphy <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
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Drop board_ehci_power when dm usb used and switch to use
regulator api to handle vbus.
Signed-off-by: Peng Fan <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stefano Babic <[email protected]>
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Implement ofdata_to_platdata to set the type to host or device.
- Check "dr-mode" property.
- If there is no "dr-mode", check phy_ctrl for i.MX6
and phy_status for i.MX7
Signed-off-by: Peng Fan <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stefano Babic <[email protected]>
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Move symbol to Kconfig to cleanup configuration file.
Signed-off-by: Michal Simek <[email protected]>
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GCC 6.1 complains about this.
drivers/usb/gadget/dwc2_udc_otg.c:72:19: warning: 'driver_desc'
defined but not used [-Wunused-const-variable=]
static const char driver_desc[] = DRIVER_DESC;
^~~~~~~~~~~
Signed-off-by: Masahiro Yamada <[email protected]>
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Dropped becuase
- driver not used any board.
- no dm conversion.
Cc: Angelo Dureghello <[email protected]>
Cc: Richard Retanubun <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Acked-by: Angelo Dureghello <[email protected]>
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Unfortunately version 2 of this patch was applied which was missing some
changes. Fix this.
Signed-off-by: Meng Yi <[email protected]>
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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Replace hardcoded value with defined constant SECTOR_BYTES.
Signed-off-by: Ladislav Michl <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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There is no CONFIG_OF_PLATDATA, only CONFIG_SPL_OF_PLATDATA, so rename
the two references to CONFIG_OF_PLATDATA to CONFIG_SPL_OF_PLATDATA.
Signed-off-by: Tom Rini <[email protected]>
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Dropped becuase
- driver and related configs not used any board.
- no dm conversion.
Cc: Heiko Schocher <[email protected]>
Cc: Sergey Kostanbaev <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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If the splash file doesn't exist, the booting stops bricking
the boards. Check return value of prepare function and stop
decoding the logo data if splash prepare stage failed.
Signed-off-by: Anatolij Gustschin <[email protected]>
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Commit f401e907fcbc ("ARM: sunxi: remove bare default for
CONFIG_MMC") dropped "depends on UART0_PORT_F", but it is still
needed. Revive it as a prerequisite of CONFIG_MMC_SUNXI.
Signed-off-by: Masahiro Yamada <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
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I suspect this is a typo.
Signed-off-by: Masahiro Yamada <[email protected]>
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Until recently, sdhci_ops was used only for overriding IO accessors.
(so, host->ops was not set by any drivers except bcm2835_sdhci.c)
Now, we have more optional callbacks, get_cd, set_control_reg, and
set_clock. However, the code
if (host->ops->get_cd)
host->ops->get_cd(host);
... expects host->ops is set for all drivers.
Commit 5e96217f0434 ("mmc: pic32_sdhci: move the code to
pic32_sdhci.c") and commit 62226b68631b ("mmc: sdhci: move the
callback function into sdhci_ops") added sdhci_ops for pic32_sdhci.c
and s5p_sdhci.c, but the other drivers still do not (need not) set
host->ops because all callbacks in sdhci_ops are optional.
host->ops must be checked to avoid the system crash caused by NULL
pointer access.
Signed-off-by: Masahiro Yamada <[email protected]>
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Add a new driver for the GMAC ethernet interface present in Rockchip
RK3288 SOCs. This driver subclasses the generic design-ware driver to
add the glue needed specifically for Rockchip.
Signed-off-by: Sjoerd Simons <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Romain Perier <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Export all functions so that drivers can use them, or not, as the need
arises.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Romain Perier <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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With rockchip we need to make adjustments after the link speed is set but
before enabling received/transmit. In preparation for this, split these
two pieces into separate functions.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Romain Perier <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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This function can fail, so return the error if there is one.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Romain Perier <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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To allow other DM drivers to subclass the designware driver various
functions and structures need to be exported. Export these.
Signed-off-by: Sjoerd Simons <[email protected]>
Signed-off-by: Romain Perier <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Correct mpixelclock errors in rockchip_phy_config[] and rockchip_mpll_cfg[].
Signed-off-by: Nickey Yang <[email protected]>
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Init the clock rate to max-frequency from dts with clock driver api.
Signed-off-by: Kever Yang <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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The variable ret was added but never set as we did not make calls to
other functions that we needed to check the return value on.
Fixes: 505cf4750ae5 ("power: change from meaningless value to error number")
Signed-off-by: Tom Rini <[email protected]>
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Xilinx changes for v2017.03
- ATF handoff
- DT syncups
- gem: Use wait_for_bit(), add simple clk support
- Simple clk driver for ZynqMP
- Other small changes
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Move (and rename) the following CONFIG options to Kconfig:
CONFIG_DAVINCI_MMC (renamed to CONFIG_MMC_DAVINCI)
CONFIG_OMAP_HSMMC (renamed to CONFIG_MMC_OMAP_HS)
CONFIG_MXC_MMC (renamed to CONFIG_MMC_MXC)
CONFIG_MXS_MMC (renamed to CONFIG_MMC_MXS)
CONFIG_TEGRA_MMC (renamed to CONFIG_MMC_SDHCI_TEGRA)
CONFIG_SUNXI_MMC (renamed to CONFIG_MMC_SUNXI)
They are the same option names as used in Linux.
This commit was created as follows:
[1] Rename the options with the following command:
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e '
s/CONFIG_DAVINCI_MMC/CONFIG_MMC_DAVINCI/g
s/CONFIG_OMAP_HSMMC/CONFIG_MMC_OMAP_HS/g
s/CONFIG_MXC_MMC/CONFIG_MMC_MXC/g
s/CONFIG_MXS_MMC/CONFIG_MMC_MXS/g
s/CONFIG_TEGRA_MMC/CONFIG_MMC_SDHCI_TEGRA/g
s/CONFIG_SUNXI_MMC/CONFIG_MMC_SUNXI/g
'
[2] Commit the changes
[3] Create entries in driver/mmc/Kconfig.
(copied from Linux)
[4] Move the options with the following command
tools/moveconfig.py -y -r HEAD \
MMC_DAVINCI MMC_OMAP_HS MMC_MXC MMC_MXS MMC_SDHCI_TEGRA MMC_SUNXI
[5] Sort and align drivers/mmc/Makefile for readability
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Move (and rename) the following CONFIG options to Kconfig:
CONFIG_EXYNOS_DWMMC (renamed to CONFIG_MMC_DW_EXYNOS)
CONFIG_HIKEY_DWMMC (renamed to CONFIG_MMC_DW_K3)
CONFIG_SOCFPGA_DWMMC (renamed to CONFIG_MMC_DW_SOCFPGA)
The "HIKEY" is a board name, so it is not suitable for the MMC
controller name. I am following the name used in Linux.
This commit was generated as follows:
[1] Rename the config options with the following command:
find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \
-type f -print | xargs sed -i -e '
s/CONFIG_EXYNOS_DWMMC/CONFIG_MMC_DW_EXYNOS/g
s/CONFIG_HIKEY_DWMMC/CONFIG_MMC_DW_K3/g
s/CONFIG_SOCFPGA_DWMMC/CONFIG_MMC_DW_SOCFPGA/g
'
[2] Commit the changes
[3] Create the entries in drivers/mmc/Kconfig
(with default y for EXYNOS and SOCFPGA)
[4] Run the following:
tools/moveconfig.py -y -r HEAD MMC_DW_EXYNOS MMC_DW_K3 MMC_DW_SOCFPGA
[5] Sort and align drivers/mmc/Makefile for readability
[6] Clean-up doc/README.socfpga by hand
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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