| Age | Commit message (Collapse) | Author |
|
When the backlight's pwm input is connected to a pwm output of the SoC,
actually use pwm to drive the backlight.
The mean reason for doing this is to fix the backlight turning off
for aprox. 1 second while the kernel is booting. This is caused by
the kernel actually using pwm to drive the backlight, so that it
can dim the backlight. First the pwm driver loads and switches the
pinmux for the pin driving the backlight's pwm input to the pwm
controller. Then about 1s later the actual backlight driver loads
and tells the pwm driver to actually update the pwm settings, which
have a power-on-reset value of "off".
An additional advantage is that this allows us to initatiate the
backlight at 80%, which is the kernel default, avoiding a brightness
change while the kernel loads.
Signed-off-by: Hans de Goede <[email protected]>
Reviewed by: Peter Korsgaard <[email protected]>
|
|
|
|
Patch f8a10ed1 [i2c: mvtwsi: Make address length variable] accidentally
inverted the sequence of address bytes sent to the I2C device. This
patch corrects this by sending the highest byte first and the lowest
byte last again.
Tested on theadorable Armada-XP board.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Mario Six <[email protected]>
Cc: Heiko Schocher <[email protected]>
|
|
In tegra20_slink.c, the set_mode() function may be executed before the
SPI bus is claimed the first time, and hence the clocks to the SPI
controller may not be running. If so, any register read/write at this
time will hang the CPU. Fix this by ensuring the clock is running as soon
as the driver is probed. This is observed on the Tegra30 Beaver board.
Apply the same clock initialization fix to all other Tegra SPI drivers so
that if set_mode() is ever implemented there, the same bug will not appear.
Note that tegra114_spi.c already operates in this fashion.
The clock manipulation code is copied from claim_bus() to probe() rather
than moved. This ensures that any calls to set_speed() take effect; the
clock can't be set once during probe and left unchanged.
Fixes: 5cb1b7b395c0 ("spi: tegra20: Add support for mode selection")
Cc: Mirza Krak <[email protected]>
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
The nvidia,bpmp property is left over from an old BPMP I2C binding, and
shouldn't be present. Remove it from the SoC DT file, and update the
I2C driver not to parse it; the value wasn't used for anything any more
anyway.
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
The Tegra SDHCI binding dictates that the reseet name for the Tegra SDHCI
clock be "sdhci" not "sdmmc", and that the clock is accessed by index
rather than by name. Fix the Tegra186 DT and MMC driver to honor this.
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
The Tegra I2C binding dictates that the clock name for the Tegra I2C clock
be "div-clk" not "i2c". Fix the Tegra186 DT and I2C driver to honor this.
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|
|
The spatch series converting legacy drivers from miiphy_register to
mdio_register changed the return convention of the davinci_emac internal
MDIO accessors, making the internal code relying on it misbehaving:
no mdiodev get registered and U-Boot crashes when using net cmds in the
context of the old legacy net API.
ATM davinci_emac_initialize and cpu_eth_init don't return a proper value
in that case but fixing them would not avoid the crash.
This change is just a follow-up to the spatch pass, the MDIO accessors
of the mdiodev introduced by the spatch pass retain their proper values.
Signed-off-by: Karl Beldan <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
The QMan is not used in FMan IM mode, so no QMI enqueue or QMI
dequeue are performed.
Signed-off-by: Hou Zhiqiang <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
ATM when receiving a packet the whole buffer is invalidated, this change
optimizes this behaviour.
Signed-off-by: Karl Beldan <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Mugunthan V N <[email protected]>
|
|
check_cache_range() warns that the top boundaries are not properly
aligned when flushing or invalidating the buffers and make these
operations fail.
This gets rid of the remaining warnings:
CACHE: Misaligned operation at range
Signed-off-by: Karl Beldan <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Mugunthan V N <[email protected]>
|
|
ATM the rx and tx descriptors are handled as cached memory while they
lie in a dedicated RAM of the SoCs, which is an uncached area.
Removing the said dcache ops, while optimizing the logic and clarifying
the code, also gets rid of most of the check_cache_range() incurred
warnings:
CACHE: Misaligned operation at range
Signed-off-by: Karl Beldan <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
[trini: Drop CMD_BOOTI as it's now on by default on ARM64]
Signed-off-by: Tom Rini <[email protected]>
|
|
'-' is never used in function names.
Signed-off-by: Masahiro Yamada <[email protected]>
|
|
implement Kconfig for the 'fastboot' feature set
Signed-off-by: Steve Rae <[email protected]>
|
|
BLANCHE is development board based on R-Car V2H SoC (R8A7792)
This commit supports the following periherals:
- SCIF, Ethernet, QSPI, MMC
Signed-off-by: Masakazu Mochizuki <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
|
|
Building w/ GCC v5.2, the SD card access is broken due to invalid data
in the response command reconstructed at the end of
sh_sdhci_get_response().
Add a memory barrier between the two main steps of this function to
ensure the resp[] table content is consistent before bits reordering.
This fix has been tested Ok on Porter board rev1.0 using v2016.03
release.
Signed-off-by: Yannick Gicquel <[email protected]>
|
|
This can be used in the same way as other R-CAR serial setting.
Signed-off-by: Hiroyuki Yokoyama <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
|
|
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
|
|
|
|
This patch adds support for the SMBus block read/write functionality.
Other protocols like the SMBus quick command need to get added
if this is needed.
This patch also removed the SMBus related defines from the Ivybridge
pch.h header. As they are integrated in this driver and should be
used from here. This change is added in this patch to avoid compile
breakage to keep the source git bisectable.
Tested on a congatec BayTrail board to configure the SMSC2513 USB
hub.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: George McCollister <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
This simple driver provides some functions to control some of the
integrated devices. The watchdog is enabled per default. This driver
adds a function to disable the watchdog. Also the internal legacy
UART (io address 0x3f8/0x2f8) is enabled per default.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Cc: Simon Glass <[email protected]>
|
|
To prevent the compiler error, split the checking condition whether
cfg->ops is NULL or not.
It's more clearly, because it's not included in mmc_config structure
when CONFIG_DM_MMC_OPS is disabled.
drivers/mmc/mmc_legacy.c: In function ‘mmc_create’:
drivers/mmc/mmc_legacy.c:118:31: error: ‘const struct mmc_config’ has no member named ‘ops’
drivers/mmc/mmc_legacy.c:118:58: error: ‘const struct mmc_config’ has no member named ‘ops’
make[1]: *** [drivers/mmc/mmc_legacy.o] Error 1
Signed-off-by: Jaehoon Chung <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
When the MMC framework was added in u-boot, the mmc_go_idle was
added before mmc_send_op_cond_iter in function mmc_send_op_cond
annotating that some cards seemed to need this. Actually, we still
need to do this in function mmc_complete_op_cond for those cards.
This has been verified on Micron MTFC4GACAECN eMMC chip.
Signed-off-by: Yangbo Lu <[email protected]>
|
|
structure member 'cd_inverted' of omap_hsmmc_data
is available only when OMAP_HSMMC_USE_GPIO is
defined.
When CONFIG_DM_MMC is defined, but not
CONFIG_OMAP_GPIO, this will cause build breakage
in omap_hsmmc driver of the sort:
CC drivers/mmc/omap_hsmmc.o
../drivers/mmc/omap_hsmmc.c: In function 'omap_hsmmc_ofdata_to_platdata':
../drivers/mmc/omap_hsmmc.c:1763:6: error: 'struct omap_hsmmc_data' has no member named 'cd_inverted'
priv->cd_inverted = fdtdec_get_bool(fdt, node, "cd-inverted");
^
Fix this by accessing cd_inverted only when
OMAP_HSMMC_USE_GPIO is defined.
Signed-off-by: Sekhar Nori <[email protected]>
Acked-by: Mugunthan V N <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
The 'xtfpga' board is actually a set of FPGA evaluation boards that
can be configured to run an Xtensa processor.
- Avnet Xilinx LX60
- Avnet Xilinx LX110
- Avnet Xilinx LX200
- Xilinx ML605
- Xilinx KC705
These boards share the same components (open-ethernet, ns16550 serial,
lcd display, flash, etc.).
Signed-off-by: Chris Zankel <[email protected]>
Signed-off-by: Max Filippov <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
|
|
|
|
Convert the driver to the driver model while retaining the existing
legacy code. This allows the driver to support boards that have
converted to driver model as well as those that have not.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
|
|
Add driver model support while retaining the existing legacy code.
This allows the driver to support boards that have converted to
driver model as well as those that have not.
Signed-off-by: Wenyou Yang <[email protected]>
Acked-by: Simon Glass <[email protected]>
|
|
AT91 PIO4 controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.
The pin configuration is performed on specific registers which
are shared along with the gpio controller. So regard the pinctrl
device as a child of atmel_pio4 device.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
|
|
Rework the driver to support driver model and device tree, and
support to regard the pio4 pinctrl device as a child of
atmel_pio4 device.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
In order to make these PIO4 definitions shared with AT91 PIO4
pinctrl driver, move them from the existing gpio driver to the
head file, and rephrase them.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
|
|
If the functions passed to the registration function are not in the same
C file (extern) then spatch will not handle the dependent changes.
Make those changes manually.
Signed-off-by: Joe Hershberger <[email protected]>
For the 4xx related files:
Acked-by: Stefan Roese <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
Some of the changes were a bit too complex.
Signed-off-by: Joe Hershberger <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
Run scripts/coccinelle/net/mdio_register.cocci on the U-Boot code base.
Signed-off-by: Joe Hershberger <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
The patch is referred to at91 clock driver of Linux, to make
the clock node descriptions in DT aligned with the Linux's.
Signed-off-by: Wenyou Yang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Commit 302c5db ("dm: tpm: Add Driver Model support for tpm_atmel_twi
driver") converted the Atmel TWI TPM driver itself to driver model, but
kept the legacy-style i2c_write/i2c_read calls.
Commit 3e7d940 ("dm: tpm: Every TPM drivers should depends on DM_TPM")
then made DM_I2C a dependency of the driver, effectively forcing users
to turn on CONFIG_DM_I2C_COMPAT to get it to work.
This patch adds the necessary dm_i2c_write/dm_i2c_read calls to make the
driver compatible with DM, but also keeps the legacy calls in ifdefs, so
that the driver is now compatible with both DM and non-DM setups.
Signed-off-by: Mario Six <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
|
|
Add i2c driver.
Signed-off-by: Songjun Wu <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Acked-by: Heiko Schocher <[email protected]>
|
|
Implement MDIO bus read/write functions, initialize the bus and scan for
the PHY when phylib is enabled. Limit PHY speeds to 10/100 Mbps.
Cc: Michal Simek <[email protected]>
Signed-off-by: Max Filippov <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
The ethoc device can be configured to have a private memory region
instead of having access to the main memory. In that case egress packets
must be copied into that memory for transmission and pointers to that
memory need to be passed to net_process_received_packet or returned from
the recv callback.
Signed-off-by: Max Filippov <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Addresses used in buffer descriptors and passed in platform data or
device tree are physical. Addresses used by CPU to access packet data
and registers are virtual. Don't mix these addresses and use virt_to_phys
for translation.
Signed-off-by: Max Filippov <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Add .of_match table and .ofdata_to_platdata callback to allow for ethoc
device configuration from the device tree.
Signed-off-by: Max Filippov <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Extract reusable parts from ethoc_init, ethoc_set_mac_address,
ethoc_send and ethoc_receive, move the rest under #ifdef CONFIG_DM_ETH.
Add U_BOOT_DRIVER, eth_ops structure and implement required methods.
Signed-off-by: Max Filippov <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Don't use physical base address of registers directly, ioremap it first.
Save pointer in private struct ethoc and use that struct in all internal
functions.
Signed-off-by: Max Filippov <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Add Kconfig entry for the driver, remove #define CONFIG_ETHOC from the
only board configuration that uses it and put it into that board's
defconfig.
Cc: Stefan Kristiansson <[email protected]>
Signed-off-by: Max Filippov <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
When adding support for the driver model the SPI EEPROM feature had
been ignored. Fix the build with both CONFIG_DM_ETH and
CONFIG_E1000_SPI enabled.
Signed-off-by: Alban Bedel <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
The __get_unaligned_le* functions may not be declared on all platforms.
Instead, get_unaligned_le* should be used. On many platforms both of
these are the same function.
Signed-off-by: Chris Packham <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Use the right phy_connect() prototype for CONFIGF_DM_ETH.
Support to get the phy interface from dt and set GMAC_UR.
Signed-off-by: Wenyou Yang <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
clk/reset API was tested on T186 platform and previous chip like
T210/T124 will still use the old APIs.
Signed-off-by: Bryan Wu <[email protected]>
(swarren, simplified some ifdefs, removed indent level inside an ifdef)
(swarren, added comment about the ifdefs)
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
|