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This allows to drop annoying (char *) casts when setting the host
name of struct sdhci_host.
Signed-off-by: Masahiro Yamada <[email protected]>
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get_timer() returns an unsigned 64-bit value, but is currently assigned to
a signed 32-bit variable. Due to sign extension and data truncation, this
causes the timeout loop in spi_flash_cmd_wait_ready() to immediately (and
incorrectly) fire for about 50% of all time values, based on whether bit
31 is set. In sandbox at least, this causes the test to pass or fail based
on system uptime, as opposed to time since the U-Boot binary was started.
Fixes: 4efad20a1751 ("sf: Update status reg check in spi_flash_cmd_wait_ready")
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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U-Boot typically interprets unprefixed numbers as base 16, and DFU RAM
entity parsing has historically done so. Reverse the change to default
to base 10, so that values in previously working command-lines aren't
mis-parsed, causing RAM corruption, crashes, hangs, etc.
Fixes: 6aeb877afef0 ("drivers: dfu: ram: fix a crash with dfu ram with invalid dfu_alt_info env")
Cc: Mugunthan V N <[email protected]>
Cc: Tom Rini <[email protected]>
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Mugunthan V N <[email protected]>
Tested-by: Mugunthan V N <[email protected]>
[Test HW: AM335x BBB]
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U-Boot crashes when an invalid dfu_alt_info is set and tried
using dfu command. Fixing this as it is handled in dfu-mmc.
=> dfu 0 ram 0
data abort
pc : [<9ff893d6>] lr : [<9ff6edb9>]
reloc pc : [<808323d6>] lr : [<80817db9>]
sp : 9ef36cf0 ip : 00000158 fp : 9ffbc0b8
r10: 9ffbc0b8 r9 : 9ef36ed8 r8 : 00000000
r7 : 00000000 r6 : 9ffbc0c8 r5 : 9ef36cfc r4 : 9ef392c8
r3 : 00000004 r2 : 00000000 r1 : 9ff9a985 r0 : ffffffff
Flags: Nzcv IRQs off FIQs on Mode SVC_32
Resetting CPU ...
resetting ...
Signed-off-by: Mugunthan V N <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Remaining bytes means bytes that are not yet transferred
and not the bytes that were transferred in the last transfer.
Reported-by: Lukasz Majewski <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
Tested-by: Steve Rae <[email protected]>
[Test HW: bcm28155_ap board]
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Request size can be greater than ep.packet and still end in a
short packet. We need to tackle this case as end of transfer
(if short_not_ok is not set) as indicated in USB 2.0 Specification [1],
else we get stuck up on certain protocols like fastboot.
[1] - USB2.0 Specification, Section 5.3.2 Pipes
Reported-by: Steve Rae <[email protected]>
Signed-off-by: Roger Quadros <[email protected]>
Tested-by: Steve Rae <[email protected]>
Tested-by: Lukasz Majewski <[email protected]>
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Just use ep->maxpacket to get the maxpacket size
and simplify the bulk-out maxpacket alignment.
Signed-off-by: Roger Quadros <[email protected]>
Tested-by: Steve Rae <[email protected]>
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In a dual speed configuration we need to check at runtime if
we want to enable the Full-Speed or High-Speed endpoint.
Signed-off-by: Roger Quadros <[email protected]>
Acked-by: Lukasz Majewski <[email protected]>
Tested-by: Steve Rae <[email protected]>
[Test HW: bcm235xx board]
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wMaxPacketSize for IN endpoing in High-Speed must be 512 and not 64.
While fixing that we do some clean ups like
- use cpu_to_le16(decimal_length) instead of hexadecimal length.
- No need to initialize bInterval to 0. Static variables are 0 initialized.
- Move descriptor setting from fastboot_add to to fastboot_bind.
- check for dual speed configuration before setting the high speed descriptors.
Signed-off-by: Roger Quadros <[email protected]>
Tested-by: Steve Rae <[email protected]>
Tested-by: Steve Rae <[email protected]> [Test HW: bcm235xx board]
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This patch adds support for the PCI(e) based I2C cores. Which can be
found for example on the Intel Bay Trail SoC. It has 7 I2C controllers
implemented as PCI devices.
This patch also adds the fixed values for the timing registers for
BayTrail which are taken from the Linux designware I2C driver.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Heiko Schocher <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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This patch adds DM support to the designware I2C driver. It currently
supports DM and the legacy I2C support. The legacy support should be
removed, once all platforms using it have DM enabled.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Heiko Schocher <[email protected]>
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This patch prepares the designware I2C driver for the DM conversion.
This is mainly done by removing struct i2c_adapter from the functions
that shall be used by the DM driver version as well.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Heiko Schocher <[email protected]>
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Integrating set_speed() into dw_i2c_set_bus_speed() will make the
conversion to DM easier for this driver.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Heiko Schocher <[email protected]>
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dw_i2c_enable() is used to dis-/en-able the I2C controller. It makes
sense to add such a function, as the controller is dis-/en-abled
multiple times in the code. Additionally, this function now checks,
if the controller is really dis-/en-abled. This code is copied
from the Linux I2C driver version.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Heiko Schocher <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Add the ic_enable_status register to the i2c_regs struct. Additionally
the register offsets are added, to better check, if the offset matches
the register description in the datasheet.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Heiko Schocher <[email protected]>
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On some platforms (e.g. x86), the return value of dev_get_addr() can't
be assigned to a pointer type variable directly. As there might be a
difference between the size of fdt_addr_t and the pointer type. On
x86 for example, "fdt_addr_t" is 64bit but "void *" only 32bit. So
assigning the register base directly in dev_get_addr() results in this
compilation warning:
warning: cast to pointer from integer of different size
This patch introduces the new function dev_get_addr_ptr() that
returns a pointer to the 'reg' address that can be used by drivers
in this case.
Signed-off-by: Stefan Roese <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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PH1-LD20 needs this for its SD card controller.
Signed-off-by: Masahiro Yamada <[email protected]>
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I found many mistakes in the initial version.
Fixes: 8a3328c209d0 ("pinctrl: uniphier: support UniPhier PH1-LD20 pinctrl driver")
Signed-off-by: Masahiro Yamada <[email protected]>
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Make function/array names match the file names for consistency.
Signed-off-by: Masahiro Yamada <[email protected]>
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Set free_count to zero before walking through ai->erase list
in wl_init().
As U-Boot has no workqueue/threads, it immediately calls
erase_worker(), which increase for each erased block
free_count. Without this patch, free_count gets after
this initialized to zero in wl_init(), so the free_count
variable always has the maybe wrong value 0.
Detected this behaviour on the dxr2 board, where the
UBI fastmap gets not written when attaching/dettaching
on an empty NAND. It drops instead the error message:
could not find any anchor PEB
With this patch, fastmap gets written on dettach.
Signed-off-by: Heiko Schocher <[email protected]>
Reviewed-by: Boris Brezillon <[email protected]>
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Conflicts:
configs/bcm28155_ap_defconfig
configs/dra72_evm_defconfig
configs/dra74_evm_defconfig
configs/ma5d4evk_defconfig
Signed-off-by: Tom Rini <[email protected]>
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And also reformat defconfigs using "make savedefconfig" rule.
Signed-off-by: Sam Protsenko <[email protected]>
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Signed-off-by: Sam Protsenko <[email protected]>
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Signed-off-by: Sam Protsenko <[email protected]>
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Description was borrowed from kernel dwc3 Kconfig.
Signed-off-by: Sam Protsenko <[email protected]>
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While at it, remove obsolete CONFIG_USBDOWNLOAD_GADGET option from some
config headers. This is also probably fixes am335x_baltos board.
Signed-off-by: Sam Protsenko <[email protected]>
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Move CONFIG_USB_GADGET_DUALSPEED option to Kconfig and
make all UDC controllers select USB_GADGET_DUALSPEED:
- add next options to Kconfig selecting USB_GADGET_DUALSPEED:
- USB_GADGET_ATMEL_USBA
- USB_GADGET_DWC2_OTG
- USB_DWC3
- CI_UDC
- make USB_MUSB_GADGET select USB_GADGET_DUALSPEED
While at it, make some related fixes:
- remove DUALSPEED from configs that don't enable gadget support:
- kwb.h
- tseries.h
- add missing USB_GADGET option to next configs:
- novena_defconfig
- pcm051_rev*_defconfig
- xfi3_defconfig
Signed-off-by: Sam Protsenko <[email protected]>
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The description was borrowed from kernel. Definitions were added to
defconfig files in a way that "make savedefconfig" generates exactly
the same file as used defconfig.
Boards using 0 mA as CONFIG_USB_GADGET_VBUS_DRAW value were moved to use
2 mA (as minimal allowed by Kconfig).
Signed-off-by: Sam Protsenko <[email protected]>
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The USB Mass Storage (ums) works in Windows, Linux and OS X (EL Capitan).
But, not in OS X (Yosemite). By applying the said patch, it extends
the ums support.
Signed-off-by: John Tobias <[email protected]>
Tested-by: Lukasz Majewski <[email protected]>
Test HW: Odroid XU3 (./test/py UMS + DFU tests)
Tested-by: John Tobias <[email protected]>
Linux:
- Run ums to expose all my eMMC partition - shows all correctly
- Run ums to expose only 1 partition of my eMMC - show correctly
Windows:
- Run ums to expose all my eMMC partition - it detects but it prompts,
if I want to format it (due to a non windows partition)
- Run ums to expose only the FAT32 partition - it show the partition
correctly.
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The code uses a lot of signed numbers, which ended up in variables
of unsigned type, which resulted in all sorts of underflows. This
in turn caused incorrect calibration on certain boards. Moreover,
repair the readout of the DQ delay, which was being pulled from
wrong register.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Chin Liang See <[email protected]>
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Just staticize global variables in sequencer, since there is no
point in having these symbols available outside of the DDR code.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Chin Liang See <[email protected]>
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Originally, the DLEVEL selects the debug level within the sequencer code,
but only displays the messages on that particular debug level. Tweak the
handling such that for particular debug level, debug messages on that
level and lower are displayed. This allows better regulation of debug
message verbosity.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Chin Liang See <[email protected]>
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This one last set of delay configuration registers was not properly
zeroed out originally, fix it and zero them out.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Chin Liang See <[email protected]>
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There is no point in resetting the ODT setting if the write test
failed, since the code will always retry the calibration and thus
reconfigure the ODT anyway OR the code will fail calibration and
halt.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Chin Liang See <[email protected]>
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Every invocation of the scc_mgr_set_dqs_en_delay_all_ranks() is
followed by SCC manager update. Moreover, only this function
triggers the SCC manager update internally. Thus, remove the
internal invocation to avoid triggering the update twice.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Chin Liang See <[email protected]>
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The hi address bitfield in the protection rule must be set to
the last address in the region which the rule represents. The
behavior is now in-line with code generated by Quartus 15.1 .
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Chin Liang See <[email protected]>
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The code should be setting registers to zero, not one register to value.
Swap the order of arguments to correct the behavior. The behavior is now
in-line with code generated by Quartus 15.1 .
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Chin Liang See <[email protected]>
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In the most unlikely case the DQS tracking was to be disabled,
make sure we do not errornously re-enable it. Note that DQS
tracking is enabled on all systems observed thus far.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Chin Liang See <[email protected]>
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The bit 22 is in fact DQS tracking enable bit (dqstrken) and there
is a macro for this bit already, so use it.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Chin Liang See <[email protected]>
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Ensure data the following sata command used is flushed out of dcache
and written to physical memory or timeout error may happen.
Signed-off-by: Tang Yuantian <[email protected]>
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dm_serial_ops.pending should return the number of characters, not just a
valid C Boolean integer value. The existing code does already does this,
but only as an accident since BCM283X_MU_LSR_RX_READY happens to be
BIT(0). Enhance the code to be more explicit about the values it returns.
Suggested-by: Simon Glass <[email protected]>
Signed-off-by: Stephen Warren <[email protected]>
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Not all Keystone2 devices has AEMIF NAND controller. So adding Kconfig
entry for CONFIG_TI_AEMIF and enabling it in respective defconfigs on
platforms with AEMIF controller.
Reported-by: Nishanth Menon <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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If get_dev_addr fails it will return FDT_ADDR_T_NONE and:
>>> "priv->usid == 4294967295U" is always false regardless of the values of its operands. This occurs as the logical operand of if.
Cc: Mateusz Kulikowski <[email protected]>
Reported-by: Coverity (CID: 143914)
Signed-off-by: Tom Rini <[email protected]>
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If get_dev_addr fails it will return FDT_ADDR_T_NONE and:
>>> "priv->pid == 4294967295U" is always false regardless of the values of its operands. This occurs as the logical operand of if.
Cc: Mateusz Kulikowski <[email protected]>
Reported-by: Coverity (CID: 143913)
Signed-off-by: Tom Rini <[email protected]>
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Add request gpio for CD and WP gpios, so that the gpio can be
used for the respective purposes.
Signed-off-by: Mugunthan V N <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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omap_hsmmc driver directly typecasts fdt_addr_t to a pointer.
This is not strictly correct, as it gives a build warning when
fdt_addr_t is u64. So, use map_physmem for a proper typecasts.
This is inspired by commit 167efe01bc5a9 ("dm: ns16550: Use an address
instead of a pointer for the uart base")
drivers/mmc/omap_hsmmc.c: In function ‘omap_hsmmc_ofdata_to_platdata’:
drivers/mmc/omap_hsmmc.c:776:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
priv->base_addr = (struct hsmmc *)dev_get_addr(dev);
^
Signed-off-by: Mugunthan V N <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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