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2026-03-12net: airoha: add initial support for multiple GDM portChristian Marangi
Rework the driver to support multiple GDM port. The driver is split to main driver as a MISC driver with forced probe (by using the DM_FLAG_PROBE_AFTER_BIND) and each GDM port register a ETH driver. This permit a 1:1 implementation with the linux kernel driver and permit to use the same exact DT nodes. Signed-off-by: Christian Marangi <[email protected]>
2026-03-12net: mdio-mt7531-mmio: use common header priv structChristian Marangi
Instead of having duplicate priv struct for mdio-mt7531-mmio driver in both driver and header, use the one exposed by the header directly. This make sure we have consistent priv struct if the driver will be updated in the future. Signed-off-by: Christian Marangi <[email protected]>
2026-03-12ufs: rockchip: Add device reset supportAlexey Charkov
Wire up the GPIO line which Rockchip RK3576 UFS controller uses to reset the connected UFS device. This seems necessary at least for some UFS modules and fixes the following error while enumerating UFS storage: ufshcd-rockchip ufshc@2a2d0000: ufshcd_link_startup: Device not present ufshcd-rockchip ufshc@2a2d0000: link startup failed -6 ufshcd-rockchip ufshc@2a2d0000: ufshcd_pltfrm_init() failed -6 Note that the GPIO descriptor for device resets is already required by the DT binding (link enclosed). Link: https://elixir.bootlin.com/linux/v6.18.5/source/Documentation/devicetree/bindings/ufs/rockchip,rk3576-ufshc.yaml#L70 Fixes: 76465ce21ee4 ("ufs: rockchip: Add initial support") Reviewed-by: Neil Armstrong <[email protected]> Reviewed-by: Shawn Lin <[email protected]> Signed-off-by: Alexey Charkov <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2026-03-12spl: Make UFS available for SPL buildsAlexey Charkov
Add minimal infrastructure to build SPL images with support for UFS storage devices. This also pulls in SCSI support and charset functions, which are dependencies of the UFS code. With this, only a fixed offset is supported for loading the next image, which should be specified in CONFIG_SPL_UFS_RAW_U_BOOT_SECTOR as the number of 4096-byte sectors into the UFS block device. Reviewed-by: Neil Armstrong <[email protected]> Signed-off-by: Alexey Charkov <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2026-03-11pinctrl: mediatek: add support for mt8189Bo-Chen Chen
Add pinctrl support for mt8189. Signed-off-by: Bo-Chen Chen <[email protected]> Co-developed-by: David Lechner <[email protected]> Reviewed-by: Macpaul Lin <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: David Lechner <[email protected]>
2026-03-11pinctl: mediatek: increase max number of base addressesDavid Lechner
Increase the maximum number of base addresses that can be handled by the mediatek pinctrl driver from 10 to 15. This is needed for the MT8189 which has 15 base addresses. Reviewed-by: Macpaul Lin <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: David Lechner <[email protected]>
2026-03-11pinctl: mediatek: add bounds check on number of base addressesDavid Lechner
Add a bounds check on the number of base addresses to prevent out-of-bounds access to the priv->base array. Reviewed-by: Macpaul Lin <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: David Lechner <[email protected]>
2026-03-10dma: ti: don't use non-existent CONFIG_TI_K3_NAVSS_PSILCFGHeinrich Schuchardt
Symbol CONFIG_TI_K3_NAVSS_PSILCFG does not exist. Don't select it. Signed-off-by: Heinrich Schuchardt <[email protected]>
2026-03-10Merge tag 'u-boot-rockchip-20260309' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-rockchip into next CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/29452 - New SoC support: RK3506, RK3582; - New Board support: RK3528 FriendlyElec NanoPi Zero2; - Other fixes
2026-03-10arch: arm: rockchip: Add initial support for RK3506Jonas Karlman
Rockchip RK3506 is a ARM-based SoC with tri-core Cortex-A7. Add initial arch support for the RK3506 SoC. Signed-off-by: Jonas Karlman <[email protected]> Acked-by: Mattijs Korpershoek <[email protected]> # drivers/usb/gadget Reviewed-by: Kever Yang <[email protected]>
2026-03-10net: dwc_eth_qos_rockchip: Add support for RK3506Jonas Karlman
Rockchip RK3506 has two Ethernet controllers based on Synopsys DWC Ethernet QoS IP. Add initial support for the RK3506 GMAC variant. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2026-03-10phy: rockchip-inno-usb2: Add support for RK3506Jonas Karlman
Add support for the two USB2.0 PHYs use in the RK3506 SoC. Signed-off-by: Jonas Karlman <[email protected]> Tested-by: Aaron Griffith <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2026-03-10rockchip: otp: Add support for RK3506Jonas Karlman
Add support for the OTP controller in RK3506. The OTPC is similar to the OTPC in RK3568 and can use the same ops for reading OTP data. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2026-03-10pinctrl: rockchip: Add support for RK3506Ye Zhang
Add pinctrl driver for RK3506. Imported from vendor U-Boot linux-6.1-stan-rkr6 tag with adjustments to use regmap_update_bits(). Signed-off-by: Ye Zhang <[email protected]> Signed-off-by: Jonas Karlman <[email protected]> Tested-by: Aaron Griffith <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2026-03-10pinctrl: rockchip: Use syscon_regmap_lookup_by_phandle()Jonas Karlman
Use syscon_regmap_lookup_by_phandle() to simplify the code. Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]> Reviewed-by: Quentin Schulz <[email protected]>
2026-03-10clk: rockchip: Add support for RK3506Finley Xiao
Add clock driver for RK3506. Imported from vendor U-Boot linux-6.1-stan-rkr6 tag with minor adjustments and fixes for mainline. Signed-off-by: Finley Xiao <[email protected]> Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2026-03-10ram: rockchip: Add basic support for RK3506Jonas Karlman
Add support for reading DRAM size information from PMUGRF os_reg2 reg. Signed-off-by: Jonas Karlman <[email protected]> Tested-by: Aaron Griffith <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2026-03-09Merge tag 'v2026.04-rc4' into nextTom Rini
Prepare v2026.04-rc4
2026-03-09Merge patch series "64-bit PCIe for AM64, AM69, J7200, J722S and J784S4"Tom Rini
Siddharth Vadapalli <[email protected]> says: Since Linux device-tree has switched to 64-bit Address space for the PCIe Controllers on TI SoCs, currently, U-Boot needs to support the same. This series adds support for 64-bit addressing for PCIe along with enabling Root-Complex mode of operation for AM69 and J784S4 SoCs. Series has been tested on all platforms being affected by this series. Test Logs: 1. AM642-EVM https://gist.github.com/Siddharth-Vadapalli-at-TI/82512389f8396a51e4f167c7ebe4c2a3 2. AM69-SK https://gist.github.com/Siddharth-Vadapalli-at-TI/b20b2811804ffc6e6c063564330c0a35 3. J7200-EVM https://gist.github.com/Siddharth-Vadapalli-at-TI/c545da68bd28a5e036803bb60f32d8e9 4. J722S-EVM https://gist.github.com/Siddharth-Vadapalli-at-TI/3dde05c4c7076076aa20ac47a6e2d176 5. J784S4-EVM https://gist.github.com/Siddharth-Vadapalli-at-TI/a93c1b2cd5d90f494e885d1831d3d23e Link: https://lore.kernel.org/r/[email protected]
2026-03-09pci: pcie_cdns_ti: enable PCIe root-complex mode for J784S4 SoCSiddharth Vadapalli
The PCIe Controllers on the J784S4 SoC support Root-Complex mode of operation. Hence, enable it. Signed-off-by: Siddharth Vadapalli <[email protected]> Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")
2026-03-09video: stm32: dsi: add .of_to_plat callbackRaphael Gallais-Pou
Drivers should extract device-tree data before probing via the .of_to_plat hook. Implement it for stm32_dsi driver. By doing so, it also solve a variable shadowing in stm32_dsi_probe() where &clk was used as peripheral clock and ref clock. For readability some struct have been renamed such as: * struct stm32_dsi_priv *dsi -> struct stm32_dsi_priv *priv * struct clk clk -> struct clk pclk Signed-off-by: Raphael Gallais-Pou <[email protected]> Reviewed-by: Patrick Delaunay <[email protected]>
2026-03-09phy: rockchip: naneng-combphy: Enable U3 port for USB3OTG on RK3568Jonas Karlman
The USB OTG U3 port may have been disabled early, add support to the COMBPHY driver to re-enable the U3 port. This matches changes made in the Linux commit 7bb14b61b7d0 ("phy: rockchip: naneng-combphy: Enable U3 OTG port for RK3568"). Signed-off-by: Jonas Karlman <[email protected]> Acked-by: Quentin Schulz <[email protected]> Reviewed-by: Kever Yang <[email protected]>
2026-03-06Merge branch 'master' of git://source.denx.de/u-boot-usb into nextTom Rini
- Change the address parsing for MUSB and another patch to add compatibles for ti,musb-am33xx and bind functions that check the dr_mode.
2026-03-06usb: musb-new: Add compatibles for ti,musb-am33xxMarkus Schneider-Pargmann (TI.com)
The upstream devicetree am33xx.dtsi does not have a "ti,am33xx-usb" compatible, it uses "ti,sysc-omap4" for the same node. The implementation of ti-musb uses a wrapper driver that binds to ti,am33xx-usb and creates new devices ti-musb-host and ti-musb-peripheral depending on the dr_mode property. To avoid this wrapper driver with the upstream devicetree, add compatibles for "ti,musb-am33xx" to both ti-musb-host and ti-musb-peripheral. Add a bind function that checks for the correct dr_mode value and rejects binding if it is not the correct driver. Reviewed-by: Mattijs Korpershoek <[email protected]> Signed-off-by: Markus Schneider-Pargmann (TI.com) <[email protected]> Reviewed-by: Marek Vasut <[email protected]>
2026-03-06usb: musb-new: Relative ctrl_mod address parsingMarkus Schneider-Pargmann (TI.com)
For the upstream DT the ctrl_mod node is using a relative register address which is not translated by the current code. Make address parsing understand relative addresses. Reviewed-by: Mattijs Korpershoek <[email protected]> Signed-off-by: Markus Schneider-Pargmann (TI.com) <[email protected]> Reviewed-by: Marek Vasut <[email protected]>
2026-03-05drivers: ufs: fix typo in struct ufs_dev_cmd kernel-docJulien Stephan
Fix "associated" typo in struct ufs_dev_cmd kernel-doc. Signed-off-by: Julien Stephan <[email protected]> Reviewed-by: Macpaul Lin <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2026-03-05drivers: ufs: add helper for phy_initialization callbackJulien Stephan
Introduce ufshcd_ops_phy_initialization() as a helper for invoking the phy_initialization callback from ufs_hba_ops. This mirrors the existing helper pattern used for other ufs_hba_ops callbacks and keeps the call sites consistent and easier to maintain. Signed-off-by: Julien Stephan <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2026-03-05drivers: ufs: handle return values of ufs_hba_ops callbacksJulien Stephan
The return values of ufshcd_ops_link_startup_notify(), ufshcd_ops_hce_enable_notify(), ufshcd_ops_init(), and ufshcd_device_reset() are currently ignored. Check and propagate these return values properly and emit appropriate error messages on error. While at it, remove the ufshcd_device_reset() wrapper, which just call ufshcd_device_reset(). Signed-off-by: Julien Stephan <[email protected]> Reviewed-by: Macpaul Lin <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2026-03-04Merge patch series "MAINTAINERS: Update ADI ADSP platform maintainers"Tom Rini
Philip Molloy <[email protected]> says: This series updates the maintainers for the ADI ADSP platform. It follows Greg's series adding support for ADI ADSP SoCs. Timesys spent years developing and maintaining Linux support for ADI ADSP SoCs. The maintenance contract has ended and ADI has brought that effort in-house. Additionally, Timesys was acquired by another company. Thanks to everyone at Timesys for all of their hard work over the years! Link: https://lore.kernel.org/r/[email protected]
2026-03-04treewide: Remove Timesys from ADI ADSP maintenancePhilip Molloy
After years of developing the ADI ADSP platform, Timesys was purchased by another company and is no longer contracted to maintain the platform. Signed-off-by: Philip Molloy <[email protected]> Reviewed-by: Greg Malysa <[email protected]>
2026-03-04Merge tag 'u-boot-ufs-20260304' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-ufs A few fixes/missing changes for UFS: - remove unused ufs_post_bind() declaration - Disable UTP command timeout in slow mode - Missing MediaTek UFS PHY Driver to be used with the UFS driver
2026-03-03Merge tag 'u-boot-dfu-next-20260303' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-dfu into next u-boot-dfu-next-20260303 CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/29417 Fastboot: * mmc: make boot partition offset configurable for bootloader offsets * arch: imx8qxp: Override weak fb_mmc_get_boot_offset
2026-03-03drivers: cpu: fix syntax error in Kconfig documentationHugo Villeneuve
Replace then -> they so that the sentence makes sense. Signed-off-by: Hugo Villeneuve <[email protected]> Reviewed-by: Quentin Schulz <[email protected]>
2026-03-03dm: core: Don't allow ofnode_to_fdt() to return NULLRomain Gantois
The ofnode_to_fdt() function may return a NULL pointer in multiple cases. Or, this function's return value is often passed directly to functions such as fdt_getprop() which end up dereferencing it, thus causing a NULL pointer exception. Don't allow ofnode_to_fdt() to return NULL, to avoid a NULL pointer dereference. Reviewed-by: Raphaël Gallais-Pou <[email protected]> Signed-off-by: Romain Gantois <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2026-03-03usb: gadget: Mark udc_disconnect as staticTom Rini
With the last external callers of udc_disconnect long removed, mark this function as static now and remove it from headers. Signed-off-by: Tom Rini <[email protected]> Reviewed-by: Mattijs Korpershoek <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mattijs Korpershoek <[email protected]>
2026-03-02drivers: ufs: remove unused ufs_post_bind() declarationJulien Stephan
Commit 067c1b033282 ("ufs: Call ufs_scsi_bind() from uclass .post_bind") inlined ufs_scsi_bind() into ufs_post_bind() as trivial device_bind_driver() call. ufs_scsi_bind() is no longer referenced anywhere in the codebase, so drop its declaration from include/ufs.h. Drivers used to include <ufs.h> to include prototype of ufs_scsi_bind() function, so we can now safely remove such includes. Fixes: 067c1b033282 ("ufs: Call ufs_scsi_bind() from uclass .post_bind") Signed-off-by: Julien Stephan <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2026-03-02phy: Add MediaTek UFS PHY DriverIgor Belwon
This UFS M-PHY driver can be used on recent MediaTek SoCs as the primary PHY for the UFS controller. Signed-off-by: Igor Belwon <[email protected]> Link: https://patch.msgid.link/20251011-mtk-ufs-uboot-v1-1-a05f991ee150@mentallysanemainliners.org Signed-off-by: Neil Armstrong <[email protected]>
2026-03-02ufs: Disable UTP command timeout in slow modePadmarao Begari
When the UFS controller is operating in slow (PWM) mode, the driver is disabled the timeout for UTP send commands. In high-speed mode, the timeout remains enabled to detect stalled or failed transfers. This change ensures reliable operation in slow mode, where command completion may take longer and timeouts are not required. Signed-off-by: Padmarao Begari <[email protected]> Signed-off-by: Michal Simek <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://patch.msgid.link/e6deb9086afab9d2bdd53db8ecbc7db93af5204d.1764169598.git.michal.simek@amd.com Signed-off-by: Neil Armstrong <[email protected]>
2026-02-28pinctrl: nxp: imx9: Guard pinctrl match table with CONFIG_IMX9[X]Peng Fan
The i.MX9 pinctrl match table currently lists all SoC compatibles unconditionally, which may lead to unused entries being included when building for specific SoC variants. Guard each compatible entry with the corresponding CONFIG_IMX9[X] option so only the required SoC entries are compiled in, which reduces unnecessary data. Signed-off-by: Peng Fan <[email protected]>
2026-02-28pinctrl: nxp: imx91: Support print pin muxingPeng Fan
Add support for printing pin names and current mux configuration on i.MX91 when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX91 pads. Signed-off-by: Peng Fan <[email protected]>
2026-02-28pinctrl: nxp: imx93: Support print pin muxingPeng Fan
Add support for printing pin names and current mux configuration on i.MX93 when CMD_PINMUX is enabled. - A full pin descriptor table for i.MX93 pads. - Implementation of get_pins_count(), get_pin_name(), and get_pin_muxing() in the i.MX9 pinctrl driver. There is no good way to add real mux names, so just dump the function ID from the mux register. Signed-off-by: Peng Fan <[email protected]>
2026-02-28pinctrl: nxp: imx93: Rename to imx9Peng Fan
We are going to add pinctrl data support for both i.MX93 and i.MX91. Since these SoCs share the same pinctrl driver structure, rename pinctrl-imx93.c to a more generic pinctrl-imx9.c and update all related variable and function names accordingly. This prepares the driver for supporting additional i.MX9 family SoCs. Signed-off-by: Peng Fan <[email protected]>
2026-02-28pinctrl: nxp: imx8m: Guard pinctrl match table with CONFIG_IMX8M[X]Peng Fan
The i.MX8M pinctrl match table currently lists all SoC compatibles unconditionally, which may lead to unused entries being included when building for specific SoC variants. Guard each compatible entry with the corresponding CONFIG_IMX8M[X] option so only the required SoC entries are compiled in, which reduces unnecessary data. Signed-off-by: Peng Fan <[email protected]>
2026-02-28pinctrl: nxp: imx8mq: Support print pin muxingPeng Fan
Add support for printing pin names and current mux configuration on i.MX8MQ when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MQ pads. Signed-off-by: Peng Fan <[email protected]>
2026-02-28pinctrl: nxp: imx8mm: Support print pin muxingPeng Fan
Add support for printing pin names and current mux configuration on i.MX8MM when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MM pads. Signed-off-by: Peng Fan <[email protected]>
2026-02-28pinctrl: nxp: imx8mn: Support print pin muxingPeng Fan
Add support for printing pin names and current mux configuration on i.MX8MN when CMD_PINMUX is enabled by adding full pin descriptor table for i.MX8MN pads. Signed-off-by: Peng Fan <[email protected]>
2026-02-28pinctrl: nxp: imx8mp: Support print pin muxingPeng Fan
Add support for printing pin names and current mux configuration on i.MX8MP when CMD_PINMUX is enabled. - imx_pinctrl_pin_desc structure and PINCTRL_PIN()/IMX_PINCTRL_PIN() helpers for defining pin descriptors. - A full pin descriptor table for i.MX8MP pads. - Implementation of get_pins_count(), get_pin_name(), and get_pin_muxing() in the i.MX8M pinctrl driver. There is no good way to add real mux names, so just dump the function ID from the mux register. Signed-off-by: Peng Fan <[email protected]>
2026-02-28pinctrl: nxp: Kconfig: Typo fixPeng Fan
PINCTRL_IMX93 is for i.MX9[3,1], not for i.MX8M, correct the typo. Signed-off-by: Peng Fan <[email protected]>
2026-02-28mmc: fsl_esdhc_imx: Skip voltage switching for fixed 1.8V regulatorKory Maincent
When using a fixed 1.8V regulator for vqmmc (indicated by vs18_enable), attempting to change the voltage produces spurious errors since the regulator cannot be adjusted. The driver currently attempts the voltage change, receives -ENOSYS from the regulator subsystem, and reports: Setting to 1.8V error: -38 esdhc_set_voltage error -5 Fix this by checking vs18_enable early in esdhc_set_voltage() and returning -ENOTSUPP for all voltage switch requests, not just 3.3V. This prevents unnecessary regulator operations and eliminates the error messages when the hardware is correctly configured with a fixed 1.8V supply. Signed-off-by: Kory Maincent <[email protected]>
2026-02-28video: imx: ipuv3: use clock frameworkBrian Ruley
Clocks are now configurable via the common clock framework, however, users have the option use the legacy clocks if desired. The intent is to keep the changes minimal for this old SoC. Signed-off-by: Brian Ruley <[email protected]>