| Age | Commit message (Collapse) | Author |
|
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
|
|
|
|
In current driver, we always copy 4 bytes to the dest memory.
Actually the dest memory may be shorter than 4 bytes.
Add an argument to indicate the dest memory length.
Avoid writing memory outside of the bounds.
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
In current driver everytime we memcpy 4 bytes to the dest memory
regardless of the remaining length.
This patch adds checking the remaining length before memcpy.
If the length is shorter than 4 bytes, memcpy the actual length of data
to the dest memory.
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
This patch fixes the following compile warning:
drivers/spi/fsl_qspi.c: In function 'fsl_qspi_probe':
drivers/spi/fsl_qspi.c:937:15:
warning: cast to pointer from integer of different size
[-Wint-to-pointer-cast]
priv->regs = (struct fsl_qspi_regs *)plat->reg_base;
^
Just make the cast explicit.
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
According to SD spec, CMD12, CMD52 for writing I/O abort in CCCR need
to be set an Abort command type when they are sent. So, we remove all
chip-specific #ifdefs and make it available for all platforms.
Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
The MMC spec says "It is strongly recommended for hosts to implement
more than 500ms timeout value even if the card indicates the 250ms
maximum busy length." Even the previous value of 300ms is known to
be insufficient for some cards. So, increase the timeout to 500ms.
Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Management Complex firmware 9.0 has fixed the issue of
dprc_destroy_container i.e. the used portal is not return to the
free pool. Which was resulting in error ethernet driver want to
use this portal via either DPL or dynamically in Linux.
Hard-coding of portal id is removed.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Add debug information prints to provide DPMAC statistics
- Number of bytes received
- Number of received and discard frames
- Number of bytes transferred
- Number of frames transferred
etc.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Management Complex FW 9.0 set the hardware depletion to be 20
buffers in order to support multiple pools in DPNI. This requires
driver to fill the pool with at least 21 to be able to receive
frames. So, Increase number of buffers for a pool.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Management Complex FW 9.0 puts a new requirement to provide Tx
confirmation and error queue configuration by calling
dpni_set_tx_conf API.
Configure report of only error frames for a tx frame.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Management Complex FW 9.0 puts a new requirement to prepare extended
parameters which should be provided as input in dpni_create. extended
parameters includes traffic class and IP reassembly configurations.
So prepare extended parameters with default "0" as input for
dpni_create.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
MC firmware version 9.0.0 contains
- Support of new APIs
- Update in existing APIs
- Change in Major and minor version of DPAA2 objects
This patch contains modifications in FLIB files to support new
MC firmware version.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Check and compare version of management complex's object with
the version supported by Freescale ldpaa2 ethernet driver.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
|
|
Size of this snprintf "lltemac.%lx" is bigger than 16 characters.
Replacing it with "ll_tem.%lx"
Signed-off-by: Ricardo Ribalda Delgado <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Michal Simek <[email protected]>
|
|
xilinx_uartlite has been ported to DM, this patch makes the
xilinx-ppc405-generic and the xilinx-ppc440-generic boards use the new
DM driver.
Signed-off-by: Ricardo Ribalda Delgado <[email protected]>
Acked-by: Stefan Roese <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Michal Simek <[email protected]>
|
|
Add quirk to disable high speed incase the high
speed was broken.This solves the issue where the
the controller is used in High Speed Mode and the
the hold time requirement for the JEDEC/MMC 4.41
specification is NOT met.
This timing issue is not on all boards and hence
provided config option to enable it when required.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Emil Lenchak <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
|
|
Clear high speed bit if it was not supported by
the driver.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Emil Lenchak <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
|
|
Remove hardcoded value zero as min frequency and
use config option CONFIG_ZYNQ_SDHCI_MIN_FREQ
defined in board config
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
|
|
MDC setting depends on pclk input clocks which varies across SoC. This
driver is used by xilinx zynq and zynqmp SOC.
Input clock frequence on silicon is 125MHz where divider 64 put
frequency below 2.5MHz requires by spec (125/64=1.95).
Signed-off-by: Michal Simek <[email protected]>
|
|
Enable automatic crossover cable detection.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Edgar E. Iglesias <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Use dev_get_addr() instead of reading reg base directly in the driver.
Core function is also more robust.
Signed-off-by: Michal Simek <[email protected]>
|
|
ZynqMP is using updated core with cdns,uart-r1p12 compatible string.
Signed-off-by: Michal Simek <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
|
|
Check for substrings in deviceID validation check
so that it can support xa bitstreams also.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
|
|
Add PHYLIB and MII dependencies and enable it by default for Microblaze.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Pass pointer to core to handle packet.
Signed-off-by: Michal Simek <[email protected]>
|
|
Rename start and stop functions to align with DM functions names.
Signed-off-by: Michal Simek <[email protected]>
|
|
Move driver to DM.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
When IP is configured with pong buffers, IP is receiving packets to ping
and then to pong buffer and than ping again.
The original logic in the driver remains there that when ping buffer is
free, pong buffer is checked too and return if both are free.
Signed-off-by: Michal Simek <[email protected]>
|
|
The original logic in the driver was exchanging buffers which are used for
sending packet and tx_ping and tx_pong buffers were exchanged all the
time to ensure that IP has enough time to send the packet out.
Based on this "feature" send function was using nextbuffertouse variable
to save which buffer should be used.
Before this algorithm was called driver checked that there is free
buffer available.
This checking remains in the driver but driver tries to use tx_ping
first if available. If not, tx_pong buffer is used instead.
To reach this code the original condition is met that at least one of the
buffer should be available.
Testing doesn't show any performance drop when this patch is applied.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
This flag is not documented anywhere in the latest documentation that's
why this patch removes it.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Simplify logic how to find out if there is free TX buffer.
Both buffers are checked all the time that's why logic around order
can be removed.
Also add check when only one buffer is available.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Move to use indirect register access when timeout expires for resetting
TX buffers.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Do initialization via indirect register access.
Signed-off-by: Michal Simek <[email protected]>
|
|
Do initialization via indirect register access.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Use u-boot coding style how to setup and access MDIO bus.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Add MDIO support before move to DM.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Prepare for DM move.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Also add dependency on PHYLIB and MII which is required.
Clean PHYLIB dependency from the driver too.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Rename few functions to fit to the new name convention used by DM.
Suggested-by: Joe Hershberger <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
|
|
Call net_process_received_packet() by core.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Detect phy when driver probes.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Move driver to DM.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Use axidma_priv instead of ethdevice in preparation of the DM move.
Signed-off-by: Michal Simek <[email protected]>
|
|
Prepare for move to DM.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Saving iobase directly to private structure helps with moving to DM.
There is an option to load iobase from pdata but it is additional load.
Pointer to private structure is available all the time.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Simplify mdio_wait function by passing regs directly.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Fix debug message.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
Fix these compilation warning by proper grouping:
In function 'axi_dma_init': drivers/net/xilinx_axi_emac.c:391:7:
warning: suggest parentheses around operand of '!' or change '&' to '&&'
or '!' to '~' [-Wparentheses]
if (!(in_be32(&priv->dmatx->control) |
^
In function 'axiemac_send': drivers/net/xilinx_axi_emac.c:501:21:
warning: suggest parentheses around operand of '!' or change '&' to '&&'
or '!' to '~' [-Wparentheses]
while (timeout && (!in_be32(&priv->dmatx->status) &
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
|
|
- Move config option out of board file.
- Remove uartlite address from config file
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Thomas Chou <[email protected]>
|