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Erase is an asynchronous operation. Device drivers are supposed
to call instr->callback() whenever the operation completes, even
if it completes with a failure.
Signed-off-by: Thomas Chou <[email protected]>
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Trailing backslashes are necessary only in macros, not in the actual
code, so remove them.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Joe Hershberger <[email protected]>
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Select PHYLIB in drivers/net/Kconfig. And remove CONFIG_PHYLIB
from legacy board header files.
This fixed the warnings when both ALTERA_TSE and ETH_DESIGNWARE
are selected.
Signed-off-by: Thomas Chou <[email protected]>
Reported-by: Pavel Machek <[email protected]>
Acked-by: Chin Liang See <[email protected]>
Acked-by: Pavel Machek <[email protected]>
Tested-by: Pavel Machek <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Per the comments, e1000_spi_eeprom_disable_wr() and
e1000_spi_eeprom_write_status() have been tested.
Remove the #if 0, #endif and mark them as __maybe_unused.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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CONFIG_MVBC_1G is not referenced anywhere, hence remove it.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Remove those dead codes wrapped by #if 0 and #endif.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Move the macro into the socfpga_dwmci_clksel().
Signed-off-by: Dinh Nguyen <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
[fix parenthesis in the sdmmc_mask]
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Add code to process the KSZ9021/KSZ9031 OF props if they are present
and configure skew registers based on the information from the OF.
This code is only enabled if the DM support for ethernet is also
enabled.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
V2: - Implement struct ksz90x1_reg_field to describe the skew register
fields more accurately.
- Fix RXDV/TXEN skew register default value and offset.
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Initialize instr.mtd in flash_erase(). This fixes the system
hang issue when CONFIG_MTD_PARTITIONS is selected.
Signed-off-by: Thomas Chou <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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Clear driver dependecies via Kconfig. Remove PHYLIB dependency from
the driver.
Signed-off-by: Michal Simek <[email protected]>
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Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Use core to call net_process_received_packet() instead of call inside
the driver.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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recv function should return 0 instead of frame_len not to
proceed the same packet again in core.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Undefined phy address is -1 not 0.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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When the Zynq Boot ROM code loads the payload from QSPI it uses the
LQSPI feature of the QSPI device, however it does not clean up its
configuration before handing over to the payload which leaves the device
confgured to by-pass the standard non-linear operating mode.
This ensures the Linear QSPI mode is disabled before re-enabling the
device.
Signed-off-by: Nathan Rossi <[email protected]>
Cc: Jagan Teki <[email protected]>
Cc: Siva Durga Prasad Paladugu <[email protected]>
Cc: Simon Glass <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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This driver is meant to be used with any OHCI-compatible host
controller in case if there's no need for platform-specific
glue such as setup of controller or PHY's power mode via
GPIOs etc.
Signed-off-by: Alexey Brodkin <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Marek Vasut <[email protected]>
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With the old order of initialization the hcor pointer has been setup to
the same address as Exynos EHCI base address (0x12110000 instead of
0x12110010).
Such behaviour was caused by reading value of 0 instead of 0x10 from EHCI
HCCPBASE register without doing proper clock initialization before.
To fix this problem hcor initialization has been moved after USB PHY setup.
Now ehci_readl(&ctx->hcd->cr_capbase) returns correct value.
Signed-off-by: Lukasz Majewski <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames the global s3c_udc.h header to dwc2_udc.h.
The rename is done automatically:
$ sed -i "s/s3c_udc\.h/dwc2_udc.h/g" \
`git grep "s3c_udc\.h" | cut -d : -f 1`
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch is the second and final to rename global symbol,
the s3c_udc_probe() function.
The rename is done automatically:
$ sed -i "s/s3c_udc_probe/dwc2_udc_probe/g" \
`git grep s3c_udc_probe | cut -d : -f 1`
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch is the first to rename global symbol, the struct
s3c_plat_otg_data.
The rename is done automatically:
$ sed -i "s/s3c_plat_otg_data/dwc2_plat_otg_data/g" \
`git grep s3c_plat_otg_data | cut -d : -f 1`
Signed-off-by: Marek Vasut <[email protected]>
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The s3c-otg IP block is in fact a DWC2 OTG one, so finally rename the
config option to make it less misleading. No functional change, just
a mechanical change done using the following script:
git grep USB_GADGET_S3C_UDC_OTG | cut -d : -f 1 | sort -u | \
while read line ; do
sed -i "s/USB_GADGET_S3C_UDC_OTG/USB_GADGET_DWC2_OTG/g" $line ;
done
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
Tweak the comments in the driver to reflect this fact.
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames the remaining S3C_* macros to match the
DWC2 naming.
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames the local source files to dwc2_*c and
adjusts the Makefile to use the new names.
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames the local header files to dwc2_*h and
adjusts the sources to use the new names.
Signed-off-by: Marek Vasut <[email protected]>
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Just change the driver name.
Signed-off-by: Marek Vasut <[email protected]>
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The extern statements are useless, remove them. Also remove the
extern ... controller, which is completely useless.
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames the remaining local s3c_*() functions
to reflect this.
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames the s3c_ep_*() functions to reflect this.
The function s3c_udc_probe() is a special case and is not
renamed by this patch yet.
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames the s3c_ep_*() functions to reflect this.
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames the s3c_ep0_*() functions to reflect this.
Signed-off-by: Marek Vasut <[email protected]>
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Just staticize the functions, they are not used outside of the file.
Signed-off-by: Marek Vasut <[email protected]>
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This function is local to s3c_udc_otg_xfer_dma.c , staticize it.
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames struct s3c_request to reflect this.
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames struct s3c_ep to reflect this.
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames struct s3c_dev_*_ep to reflect this.
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames struct s3c_usbotg_phy to struct dwc2_usbotg_phy
to make things more obvious and clear.
Signed-off-by: Marek Vasut <[email protected]>
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Most of the functions are local to the s3c_udc driver, remove them
from the s3c_udc.h header to stop those bits from propagating all
over the place. Instead, move all the private stuff into new private
s3c_udc_otg_priv.h header.
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames struct s3c_usbotg_reg to struct dwc2_usbotg_reg
to make things more obvious and clear.
Signed-off-by: Marek Vasut <[email protected]>
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The driver is actually for the Designware DWC2 controller.
This patch renames struct s3c_udc to struct dwc2_udc to make
things more obvious and clear.
Signed-off-by: Marek Vasut <[email protected]>
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Rename the header file, so it's obvious which driver it's part of.
No functional change.
Signed-off-by: Marek Vasut <[email protected]>
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We don't disable unused FM1-DTSEC1 MAC node in FMAN v2 since it is
used by MDIO. For FMAN v3, MDIO uses dedicated controller, so we
can disable unused FM1-DTSEC1 MAC node to avoid being probed in
Linux.
Signed-off-by: Shaohui Xie <[email protected]>
[York Sun: revised commit message]
Reviewed-by: York Sun <[email protected]>
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Remove verbose message for FMan port.
Signed-off-by: Mingkai Hu <[email protected]>
[York Sun: Added commit message]
Reviewed-by: York Sun <[email protected]>
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The MC version numbers provide no meaningful information
about binary interface compatibility, so remove the
check which refuses to start the MC unless a specific
version is found.
Version checking is supposed to be done at the individual
object level, and individual drivers are responsible
for their own version checking.
Signed-off-by: Stuart Yoder <[email protected]>
Acked-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Robert P. J. Day <[email protected]>
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Aesthetic cleanup in drivers/video/exynos_dp*.[ch] files.
Signed-off-by: Robert P. J. Day <[email protected]>
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