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The slash and * are missing from the keycode tables. Add these so that
these keypad keys can be used.
Signed-off-by: Simon Glass <[email protected]>
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This code is currently incorrect, perhaps due to a typo. Fix it.
Signed-off-by: Simon Glass <[email protected]>
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Modify i8042_kbd_init() so that the normal pass is sucessful init and
failure exits early. This will make the code easier to extend and is easier
to read.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Rather than lots of 'return' statements, use goto to a single return.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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At present the register access in kbd_reset() is quite primitive. This makes
it hard to follow.
Create functions to read and write data, both to a single register, and via
the command/data approach.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Tested-on: Intel Crown Bay and QEMU
Tested-by: Bin Meng <[email protected]>
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CONFIG_CONSOLE_CURSOR, CONFIG_SYS_CONSOLE_BLINK_COUNT and
CONFIG_CONSOLE_TIME are not used by any board. The implementation is not
great and stands in the way of a refactor of i8042. Drop these for now.
They can be re-introduced quite easily later, perhaps with driver-model
real-time-clock (RTC) support.
When reintroducing, it might be useful to make a few changes:
- Blink time would be more useful than blink count
- The confusing #ifdefs should be avoided
- The time functions should support driver model
- It would be best keyed off console_tstc() or some similar idle loop
rather than a particular input driver (i8042 in this case)
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Adjust the cros_ec keyboard driver to support driver model. Make this the
default for all Exynos boards so that those that use a keyboard will build
correctly with this driver.
Signed-off-by: Simon Glass <[email protected]>
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Adjust the tegra keyboard driver to support driver model, using the new
uclass. Make this the default for all Tegra boards so that those that use
a keyboard will build correctly with this driver.
Signed-off-by: Simon Glass <[email protected]>
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In preparation for converting the cros_ec keyboard driver to driver model,
adjust the cros_ec functions it will use to use a normal struct udevice.
Signed-off-by: Simon Glass <[email protected]>
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Require the caller to add the keycode translation tables separately so that
it can select which ones to use. In a later patch we will add the option to
add German tables.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Return a useful error instead of -1 when something goes wrong.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Add a uclass for keyboard input, mirroring the existing stdio methods.
This is enabled by a new CONFIG_DM_KEYBOARD option.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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zc1571 with silicon can operate on 200MHz maximum frequency. Setup this
frequency by default and fix setting for ep108.
Signed-off-by: Michal Simek <[email protected]>
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Based on spec:
"MDC must not exceed 2.5 MHz (MDC is only active during MDIO read and
write operations)"
Zynq is running on 111MHz. Current setting is 32 which is 111/32=3.47
which is above of 2.5MHz.
Using 48 divider will give us correct setting according spec
(111/48=2.31).
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Driver cleanup.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Using set and clear macro is incorrect because it is not overwritting
origin mdc clock division setup.
For example origin setup is 8(0b001) and new setup is 64(0b100) which
means 0b101 is setup which is 96 divider.
Using writel to rewrite all setting like for 1000Mbit/s case.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Wait till BD is processed to ensure that packet was sent successfully.
Signed-off-by: Michal Simek <[email protected]>
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Zynq has no priority queues.
ZynqMP has one priority queue and this change is required
to get ethernet working.
This patch was not needed on ep108 for uknown reason even
it should be used.
Tested on Zynq and ZynqMP.
Signed-off-by: Edgar E. Iglesias <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Target is duplicating packets. IP prefetches another BD and process it
when the first one is sent. Adding one dummy BD to the chain fix the
problem with packet duplication.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Fix incorrect sequence in BD handling.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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BD_SEPRN_SPACE should not have hard coded value and it will be
calculated based on the number of buffer descriptors that we
would like to use.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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It is follow up patch based on
"dm: Add support for all targets which requires MANUAL_RELOC"
(sha1: 484fdf5ba058b07be5ca82763aa2b72063540ef3)
to update function pointers for DM.
Using post_bind is not ideal but it is one on current option what can be
used. Variable reloc_done has to be used do not call relocation after
every bind. Maybe new core functions should be introduced for this case.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Patches:
"dm: core: Add a post_bind method for parents"
(sha1: 0118ce79577f9b0881f99a6e4f8a79cd5014cb87)
"dm: core: Add a uclass pre_probe() method for devices"
(sha1: 02c07b3741f1b825934b1a6eb8f23530532dc426)
"dm: core: Allow the uclass to set up a device's child after binding"
(sha1: 081f2fcbd9a95ba10677065359791f8fea3f8c58)
"dm: core: Allow uclass to set up a device's child before it is probed"
(sha1: 83c7e434c9dd3ca81f8b763e23c1881b973bcf2f)
Adds new entries to struct driver and struct uclass_driver without
extending code for manual relocation. This patch fixes it for all
architectures which requires MANUAL_RELOC.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Simon Glass <[email protected]>
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It is follow up patch based on
"dm: Add support for all targets which requires MANUAL_RELOC"
(sha1: 484fdf5ba058b07be5ca82763aa2b72063540ef3)
to update function pointers for DM.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Previous loop was completely bogus. Iterration should go just over
statistic counters.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Extend comments with register offset to help with debuggging.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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MII is setup by default for all cases. The most of boards are using
RGMII but PHY drivers are not doing any specific setting that's why MII
setting was working fine. With TI DP83867 is necessary to setup
paramaters based on interface type.
Use one setting per board for it which is something what will be removed
when driver is moved to DM.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Add debug messages to phyread/write to help with PHY debug.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Code is taken from Linux kernel driver (v4.2).
Signed-off-by: Edgar E. Iglesias <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Acked-by: Joe Hershberger <[email protected]>
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Make spl_*_load_image() functions return a value instead of
hanging if a problem is encountered. This enables main spl code
to make the decision whether to hang or not, thus preparing
it to support alternative boot devices.
Some boot devices (namely nand and spi) do not hang on error.
Instead, they return normally and SPL proceeds to boot the
contents of the load address. This is considered a bug and
is rectified by hanging on error for these devices as well.
Signed-off-by: Nikita Kiryanov <[email protected]>
Cc: Igor Grinberg <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Ian Campbell <[email protected]>
Cc: Hans De Goede <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Jagan Teki <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Change ioremap() to map_physmem(), as it is more used in u-boot.
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Change ioremap() to map_physmem(), as it is more used in u-boot.
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Change ioremap() to map_physmem(), as it is more used in u-boot.
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Change ioremap() to map_physmem(), as it is more used in u-boot.
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Change ioremap() to map_physmem(), as it is more used in u-boot.
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Change ioremap() to map_physmem(), as it is more used in u-boot.
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Change ioremap() to map_physmem(), as it is more used in u-boot.
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Change ioremap() to map_physmem(), as it is more used in u-boot.
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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flash->flags for SST flash should be updated for both DM and non-DM
flash drivers.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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SAR1_CPU_CORE_MASK was wrong, probably copy/paste
from another architecture.
Signed-off-by: Dirk Eibach <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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A lot of extra configuration information was left over in the
Marvell serdes and DDR3 initialization code for boards that
U-boot does not support. Remove this extra config information,
and the concept of fixing up board topologies with information
loaded from an EEPROM. If this needs to be done, it should be
handled in the board file, not in core code.
Signed-off-by: Kevin Smith <[email protected]>
Acked-by: Stefan Roese <[email protected]>
Cc: Dirk Eibach <[email protected]>
Cc: Luka Perkov <[email protected]>
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We should check the return value from spi_flash_cmd_read_status() and
propagate it in the case of error.
This fixes a defect caught by Coverity.
Reported-by: Tom Rini <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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SST SPI NOR flash has the same locking programming bits
as ST Micro - added support for it.
Signed-off-by: Fabio Estevam <[email protected]>
[Minor change on commit message]
Signed-off-by: Jagan Teki <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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The relevent boards which used this driver got zapped
in previous release and the driver is never used in the
code and also it doesn't use/do any spi-flash operations.
Commit details for relevent removed boards:
"ARM: at91: remove non-generic boards"
(sha1: f6b42c140387589ded24749781ce565571092eac)
Cc: Tom Rini <[email protected]>
Cc: Albin Tonnerre <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
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Add dummy readl after invalidating cmd field of QSPI_CMD_REG to ensure
bus sync. Without this device's CS is not deactivated reliably leading
to failure to enumerate flash or failure to set quad enable bit on
Macronix flash present on am437x-sk and am437x-idk evms.
Signed-off-by: Vignesh R <[email protected]>
Reviewed-by: Mugunthan V N <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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