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adopt cpsw driver to device driver model
Signed-off-by: Mugunthan V N <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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prepare driver for device model migration
Signed-off-by: Mugunthan V N <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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The current check is incorrect and will fail when any non-zero byte is read.
Fix it.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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At present this driver uses bind() to set up the device. The bind() method
should not touch the hardware, so move the init code to probe().
Signed-off-by: Simon Glass <[email protected]>
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Add a comment to make it clear to which block the #endif relates.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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It is useful to see a message from the debug UART early during boot so that
you know things are working. Add an option to enable this. The message will
be displayed as soon as debug_uart_init() is called.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Some boards need to set things up before the debug UART can be used. On
these boards a call to debug_uart_init() is insufficient. When this option
is enabled, the function board_debug_uart_init() will be called when
debug_uart_init() is called. You can put any code here that is needed to
set up the UART ready for use, such as set pin multiplexing or enable
clocks.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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We want to be able to add other common code to this function. So change the
driver's version to have an underscore before it, just like
_debug_uart_putc(). Define debug_uart_init() to call this version.
Update all drivers to this new method.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Add the Wildcat Point ID so Broadwell U based boards can use SPI.
Signed-off-by: George McCollister <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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To support graphics card behind a PCI bridge, the bridge control
register (offset 0x3e) in the configuration space must turn on
VGA address forwarding.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Currently pci_last_busno() only checks the last bridge device
under the first UCLASS_PCI device. This is not the case when
there are multiple bridge devices.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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When pci_find_class() fails to find a device, it returns -ENODEV.
But now we check the return value against -1. Fix it.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
Acked-by: Anatolij Gustschin <[email protected]>
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PCI_COMMAND_IO bit must be set for VGA device as it needs to respond
to legacy VGA IO address.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
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The current code returns 0 even if it failed to find or bind a driver. The
caller then has to check the returned device to see if it is NULL. It is
better to return an error code in this case so that it is clear what
happened.
Adjust the code to return -EPERM, indicating that the device was not bound
because it is not needed for pre-relocation use. Add comments so that the
return value is clear.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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One debug() statement is missing a newline. The other has a repeated word.
Fix these.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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When the auto-configuration process fails for a device (generally due to
lack of memory) we should return the error correctly so that we don't
continue to try memory allocations which will fail.
Adjust the code to check for errors and abort if something goes wrong.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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This driver did not yet configure the SDHCI MBUS bridge registers.
Without this and with CONFIG_MMC_SDMA enabled, mmc hangs at random
times. As DMA cannot complete correctly.
Tested on db-88f6820-gp eval board.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Luka Perkov <[email protected]>
Cc: Pantelis Antoniou <[email protected]>
Cc: Dirk Eibach <[email protected]>
Tested-by: Kevin Smith <[email protected]>
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This patch adds driver model (DM) support to the Marvell EHCI driver.
This will be used by the MVEBU SoC's, currently Armada XP and 38x.
Tested on Marvell Armada XP and 38x eval boards.
Signed-off-by: Stefan Roese <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Luka Perkov <[email protected]>
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The current "simple" address translation simple_bus_translate() is not
working on some platforms (e.g. MVEBU). As here more complex "ranges"
properties are used in many nodes (multiple tuples etc). This patch
enables the optional use of the common fdt_translate_address() function
which handles this translation correctly.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Masahiro Yamada <[email protected]>
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Not all sunxi boards have an MMC embedded. Switching to the Kconfig option
will allow to enable or disable the support in each boards' defconfig.
Signed-off-by: Maxime Ripard <[email protected]>
Reviewed-by: Hans de Goede <[email protected]>
Signed-off-by: Hans de Goede <[email protected]>
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Add a generic Kconfig option for the CONFIG_MMC option that was used before
in the configuration headers.
Since all the architectures need to be converted to that first, depend on
an non-existent config option that will be extended with architectures that
use that option.
Signed-off-by: Maxime Ripard <[email protected]>
Reviewed-by: Hans de Goede <[email protected]>
Signed-off-by: Hans de Goede <[email protected]>
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The current fastboot support assumes that CONFIG_FASTBOOT_FLASH implies
that we have an MMC in our system, which might not be the case if we have
some other storage device.
Change the configuration option protecting that call to
FASTBOOT_FLASH_MMC_DEV, that makes much more sense.
Signed-off-by: Maxime Ripard <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Reviewed-by: Hans de Goede <[email protected]>
Signed-off-by: Hans de Goede <[email protected]>
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LDO3 and LDO4 are normally either unused, or used to power csi
attached camera sensors, and as such do not need to be enabled at
boot time.
Signed-off-by: Hans de Goede <[email protected]>
Acked-by: Ian Campbell <[email protected]>
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Add support for disabling the regulators found on the axp209 pmic.
Signed-off-by: Hans de Goede <[email protected]>
Acked-by: Ian Campbell <[email protected]>
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The only thing axp221.c's axp_init() does which needs protection
against multiple calls is calling pmic_bus_init, and pmic_bus_init()
itself is already protected against being called multiple times.
Signed-off-by: Hans de Goede <[email protected]>
Acked-by: Ian Campbell <[email protected]>
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Use the generic pmic_bus helpers for the axp152 / axp209 drivers,
rather then having them define their own register read / write
functions.
Signed-off-by: Hans de Goede <[email protected]>
Acked-by: Ian Campbell <[email protected]>
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On A23 / A33 boards aldo1 is used for VCC-IO and should be 3.0V, make this
the default.
Note that this does not cause any functional changes since all sun8i
board defconfig-s already contained: CONFIG_AXP_ALDO1_VOLT=3000 .
Signed-off-by: Hans de Goede <[email protected]>
Acked-by: Ian Campbell <[email protected]>
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Change the axp223 dcdc2 / VDD-SYS default from 1.2V to 1.1V, 1.1V is the
value recommended by Allwinner and is what most fex files specify.
This has been tested on a number of A23/A33 tablets including on an
A23 Ippo-q8h-v1.2 PCB tablet which has a fex file which specifies 1.2V
(which is where our original 1.2V default comes from).
Signed-off-by: Hans de Goede <[email protected]>
Acked-by: Ian Campbell <[email protected]>
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Stop prefixing the axp functions for setting voltages, etc. with the
model number, there ever is only one pmic driver built into u-boot,
this allows simplifying the callers.
Signed-off-by: Hans de Goede <[email protected]>
Acked-by: Ian Campbell <[email protected]>
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On boards with axp221/223 pmic-s we already allow configuring most
voltages. Make the Kconfig options for these also apply to boards with
axp152 / axp209 pmic-s and extend them to configure all voltages.
The Kconfig defaults are chosen so that this commit does not introduce any
functional changes.
Signed-off-by: Hans de Goede <[email protected]>
Acked-by: Ian Campbell <[email protected]>
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Kconfig-ify CONFIG_AXP152_POWER and _AXP209_POWER settings, removing
them from CONFIG_SYS_EXTRA_OPTIONS.
Note that sun5i boards can have either an AXP209 or an AXP152 pmic, the
Kconfig default is AXP209, boards with an AXP152 must explicitly select
this. Likewise boards without a pmic must explicitly select SUNXI_NO_PMIC
in their defconfig.
Signed-off-by: Hans de Goede <[email protected]>
Acked-by: Ian Campbell <[email protected]>
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The dfu_alt_info_spl variable allows passing a starting point
for the binary to be flashed in the SPI NOR.
For example, if we have 'dfu_alt_info_spl=spl raw 0x400', this means
that we want to flash the binary starting at address 0x400.
In order to do so we need to erase the entire sector and write to
the the subsequent SPI NOR sectors taking such start address
into account for the address calculations.
Tested by succesfully writing SPL binary into 0x400 offset and
the u-boot.img at offset 64 kiB of a SPL NOR.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Lukasz Majewski <[email protected]>
[trini: Use lldiv for the math]
Signed-off-by: Tom Rini <[email protected]>
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SPI NOR flashes need to erase the entire sector size and we cannot pass
any arbitrary length for the erase operation.
To illustrate the problem:
Copying data from PC to DFU device
Download [=========================] 100% 478208 bytes
Download done.
state(7) = dfuMANIFEST, status(0) = No error condition is present
state(10) = dfuERROR, status(14) = Something went wrong, but the
device does not know what it was
Done!
In this case, the binary has 478208 bytes and the M25P32 SPI NOR
has an erase sector of 64kB.
478208 = 7 entire sectors of 64kiB + 19456 bytes.
Erasing the first seven 64 kB sectors works fine, but when trying
to erase the remainding 19456 causes problem and the board hangs.
Fix the issue by always erasing with the erase sector size.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Lukasz Majewski <[email protected]>
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PCI driver currently hangs on mx6qp.
Toggle the reset bit with the appropriate timings to fix the issue.
Based on the FSL kernel driver implementation.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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This resyncs the driver changes with the Linux version of the
driver. The driver received some feedback in the LKML and got
recently acceppted, the latest version can be found here:
https://lkml.org/lkml/2015/9/2/678
Notable changes are:
- On ECC error, reread OOB and count bit flips in OOB too.
If flipped bits are below threshold, also return an empty
OOB buffer.
- Return the amount of bit flips in vf610_nfc_read_page.
- Use endianness aware vf610_nfc_read to read ECC status.
- Do not enable IDLE IRQ (since we do not operate with an
interrupt service routine).
- Use type safe struct for buffer variants (vf610_nfc_alt_buf).
- Renamed variables in struct vf610_nfc (column and page_sz)
to reflect better what they really representing.
The U-Boot version currently does not support RAW NAND write
when using the HW ECC engine.
Signed-off-by: Bhuvanchandra DV <[email protected]>
Signed-off-by: Stefan Agner <[email protected]>
Tested-by: Albert ARIBAUD (3ADEV) <[email protected]>
Tested-by: Stefan Agner <[email protected]>
Acked-by: Scott Wood <[email protected]>
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Add more debug printfs in do_sdhci_init() for calls
that can potentially fail.
Acked-by: Przemyslaw Marczak <[email protected]>
Signed-off-by: Tobias Jakobi <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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In case sdhci_get_config() or do_sdhci_init() fail, show
the error code that was returned.
Acked-by: Przemyslaw Marczak <[email protected]>
Signed-off-by: Tobias Jakobi <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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exynos_mmc_init() always returns zero, so for the caller
it looks like it never fails.
Correct this by returning the error code of process_nodes().
For process_nodes() do something similar and return early
when do_sdhci_init() fails.
v2: Only fail in process_nodes() if we fail on all
available nodes.
Acked-by: Przemyslaw Marczak <[email protected]>
Signed-off-by: Tobias Jakobi <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This makes sure that setting the host_caps in s5p_sdhci_core_init()
doesn't operate on potentially uninitialized memory.
Acked-by: Lukasz Majewski <[email protected]>
Signed-off-by: Tobias Jakobi <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Since commit 623d96e89aca6("imx: wdog: correct wcr register settings")
issuing a 'reset' command causes the system to hang.
Unlike i.MX and Vybrid, the watchdog controller on LS102x is big-endian.
This means that the watchdog on LS1021 has been working by accident as
it does not use the big-endian accessors in drivers/watchdog/imx_watchdog.c.
Commit 623d96e89aca6("imx: wdog: correct wcr register settings") only
revelead the endianness problem on LS102x.
In order to fix the reset hang, introduce a reset_cpu() implementation that
is specific for ls102x, which accesses the watchdog WCR register in big-endian
format. All that is required to reset LS102x is to clear the SRS bit.
This approach is a temporary workaround to avoid a regression for LS102x
in the 2015.10 release. The proper fix is to make the watchdog driver
endian-aware, so that it can work for i.MX, Vybrid and LS102x.
Reported-by: Sinan Akman <[email protected]>
Tested-by: Sinan Akman <[email protected]>
Reviewed-by: Wolfgang Denk <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
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Create fsl_wdog.h to store the watchdog registers and bit fields.
This can be useful when accesses to the watchdog block are made from other
parts, such as arch/arm/ cpu code.
Signed-off-by: Fabio Estevam <[email protected]>
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Messages on corrected bit-flips are not really useful,
as bit-flips are perfectly normal. Let's avoid cluttering
the console and make them debug.
Signed-off-by: Ezequiel Garcia <[email protected]>
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This reverts commit 8fe11b8901a31d11990488c82bc23612589d57be.
I'll add support to lwmon5 in the next patch and will remove
support for the broken lcd4_lwmon5 as well.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Masahiro Yamada <[email protected]>
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AT26DF081A is the spi flash type of TWR-MEM(SCH-26248) card.
We can access the flash through DSPI2 on LS1021ATWR board.
Signed-off-by: Yuan Yao <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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Respect the mode passed in set_mode ops.
Signed-off-by: Mirza Krak <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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priv->mode is initialized when .set_speed triggers
with mode value, so checking mode for configuring
CPOL, CPHA using priv->mode is invalid hence use
mode from .set_speed argument, and at the end
priv->mode will initialized with mode.
This patch also replaces formatting string to use
speed instead of mode in .set_speed ops.
Signed-off-by: Jagan Teki <[email protected]>
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