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Conflicts:
drivers/serial/Makefile
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The pci_indirect.c file is always compiled when
CONFIG_PCI is defined although the indirect PCI
bridge support is not needed by every board.
Introduce a new CONFIG_PCI_INDIRECT_BRIDGE
config option and only compile indirect PCI
bridge support if this options is enabled.
Also add the new option into the configuration
files of the boards which needs that.
Compile tested for powerpc, x86, arm and nds32.
MAKEALL results:
powerpc:
--------------------- SUMMARY ----------------------------
Boards compiled: 641
Boards with warnings but no errors: 2 ( ELPPC MPC8323ERDB )
----------------------------------------------------------
Note: the warnings for ELPPC and MPC8323ERDB are present even
without the actual patch.
x86:
--------------------- SUMMARY ----------------------------
Boards compiled: 1
----------------------------------------------------------
arm:
--------------------- SUMMARY ----------------------------
Boards compiled: 311
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nds32:
--------------------- SUMMARY ----------------------------
Boards compiled: 3
----------------------------------------------------------
Cc: Tom Rini <[email protected]>
Cc: Daniel Schwierzeck <[email protected]>
Signed-off-by: Gabor Juhos <[email protected]>
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[trini: Applied v1 of the series rather than v2, this commit is the
delta from v1 to v2]
Signed-off-by: Stephen Warren <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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We know the exact property names that the code wants to process. Look
these up directly with fdt_get_property(), rather than iterating over
all properties within the node, and checking each property's name, in
a convoluted fashion, against the expected name.
Signed-off-by: Stephen Warren <[email protected]>
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Initialized character arrays on the stack can cause gcc to emit code that
performs unaligned accessess. Make the data static to avoid this.
Note that the unaligned accesses are made when copying data to prefix[] on
the stack from .rodata. By making the data static, the copy is completely
avoided. All explicitly written code treats the data as u8[], so will never
cause any unaligned accesses.
Signed-off-by: Stephen Warren <[email protected]>
Acked-by: Simon Glass <[email protected]>
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commit dfe64e2c89731a3f9950d7acd8681b68df2bae03
Author: Sergey Lapin <[email protected]>
Date: Mon Jan 14 03:46:50 2013 +0000
mtd: resync with Linux-3.7.1
Introduced runtime bug:
U-Boot 2013.04-00499-g46567df-dirty (Jun 04 2013 - 08:17:08)
I2C: ready
DRAM: 512 MiB
WARNING: Caches not enabled
NAND: BUG: failure at nand_base.c:3214/nand_scan_tail()!
BUG!
resetting ...
on boards using drivers/mtd/nand/omap_gpmc.c as in board_nand_init()
nand->ecc.strength is not set. Fix this!
Signed-off-by: Heiko Schocher <[email protected]>
Cc: Sergey Lapin <[email protected]>
Cc: Scott Wood <[email protected]>
Cc: Tom Rini <[email protected]>
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This patch adds lpuart support for Vybrid VF610 platform.
Signed-off-by: TsiChung Liew <[email protected]>
Signed-off-by: Alison Wang <[email protected]>
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This patch adds watchdog support for Vybrid VF610 platform.
Signed-off-by: Alison Wang <[email protected]>
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This patch adds FEC support for Vybrid VF610 platform.
In function fec_open(), RCR register is only set as RGMII mode. But RCR
register should be set as RMII mode for VF610 platform.
This configuration is already done in fec_reg_setup(), so this piece of
code could just leave untouched the FEC_RCNTRL_RGMII / FEC_RCNTRL_RMII /
FEC_RCNTRL_MII_MODE bits.
Signed-off-by: Alison Wang <[email protected]>
Reviewed-by: Benoit Thebaudeau <[email protected]>
Reviewed-by: Benoît Thébaudeau <[email protected]>
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This patch does a similar code reogranzation from
http://patchwork.ozlabs.org/patch/132179/
which is based on an old version of code (fdt support and bus selection
still not in). It merges this tidy-up on top of the recent code. It does
not make any logical change.
tpm.c implements the interface defined in tpm.h based on underlying
LPC or I2C TPM driver. tpm.c and the underlying driver communicate
throught tpm_private.h.
Note: Merging the LPC driver with tpm.c is left to future patches.
Change-Id: Ie1384f5f9e3935d3bc9a44adf8de80c5a70a5f2b
Signed-off-by: Tom Wai-Hong Tam <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs,
which supports clockstretching, combined reads and a bus speed of
up to 400khz. The device also has a new device id.
This is based on the kernel patch provided by Infineon :
https://gerrit.chromium.org/gerrit/42332
Signed-off-by: Vincent Palatin <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Luigi Semenzato <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Vincent Palatin <[email protected]>
Tested-by: Tom Wai-Hong Tam <[email protected]>
Tested-by: Vincent Palatin <[email protected]>
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The new name is more aligned with Linux kernel's naming of TPM driver.
Signed-off-by: Peter Huewe <[email protected]>
Signed-off-by: Che-Liang Chiou <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Mike Frysinger <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Tom Wai-Hong Tam <[email protected]>
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This patch adds a print messages while using 'sf read' and
'sf write' commands to make sure that how many bytes read/written
from/into flash device.
Signed-off-by: Jagannadha Sutradharudu Teki <[email protected]>
Acked-by: Tom Rini <[email protected]>
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This patch adds a print messages while using 'sf erase' command
to make sure that how many bytes erased in flash device.
Signed-off-by: Jagannadha Sutradharudu Teki <[email protected]>
Acked-by: Tom Rini <[email protected]>
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Missing return after memcpy is done for memory-mapped SPI flashes,
hence added retun 0 after memcpy done.
The return is missing in below patch
"sf: Enable FDT-based configuration and memory mapping"
(sha1: bb8215f437a7c948eec82a6abe754c226978bd6d)
Signed-off-by: Jagannadha Sutradharudu Teki <[email protected]>
Acked-by: Simon Glass <[email protected]>
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Support interfaces with a preamble before each received message.
We handle this when the client has requested a SPI_XFER_END, meaning
that we must close of the transaction. In this case we read until we
see the preamble (or a timeout occurs), skipping all data before and
including the preamble. The client will receive only data bytes after
the preamble.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Rajeshwari Shinde <[email protected]>
Reviewed-by: Jagannadha Sutradharudu Teki <[email protected]>
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This patch is essentially an update of u-boot MTD subsystem to
the state of Linux-3.7.1 with exclusion of some bits:
- the update is concentrated on NAND, no onenand or CFI/NOR/SPI
flashes interfaces are updated EXCEPT for API changes.
- new large NAND chips support is there, though some updates
have got in Linux-3.8.-rc1, (which will follow on top of this patch).
To produce this update I used tag v3.7.1 of linux-stable repository.
The update was made using application of relevant patches,
with changes relevant to U-Boot-only stuff sticked together
to keep bisectability. Then all changes were grouped together
to this patch.
Signed-off-by: Sergey Lapin <[email protected]>
[[email protected]: some eccstrength and build fixes]
Signed-off-by: Scott Wood <[email protected]>
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Conflicts:
common/cmd_fpga.c
drivers/usb/host/ohci-at91.c
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Add support for Winbond's W25PXX SPI flash.
These devices is used on Faraday A369 evaluation board.
Signed-off-by: Kuo-Jung Su <[email protected]>
CC: Jagannadha Sutradharudu Teki <[email protected]>
CC: Tom Rini <[email protected]>
Reviewed-by: Jagannadha Sutradharudu Teki <[email protected]>
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Add support for Winbond W25Q256 SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki <[email protected]>
Reviewed-by: Jagannadha Sutradharudu Teki <[email protected]>
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This is a S25FL064A successor. It supports up to 104MHz bus
speed.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Mike Frysinger <[email protected]>
Cc: Scott Wood <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Reviewed-by: Jagannadha Sutradharudu Teki <[email protected]>
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SPANSION recommend S25FL128S supersedes S25FL129P, and the two flash
memory have the same device ID and Memory architecture. So they can
use the same config parameters.
Signed-off-by: Xie Xiaobo <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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- Added SERDES2 PRTCLs = 0x98, 0x9E
- Default Phy Addresses for Teranetics PHY on XAUI card
The PHY addresses of Teranetics PHY on XAUI riser card are assigned
based on the slot it is in. Switches SW4[2:4] and SW6[2:4] on
AMC2PEX-2S On B4860QDS, AMC2PEX card decide the PHY addresses on slot1
and slot2
- Configure MDIO for 10Gig Mac
Signed-off-by: Suresh Gupta <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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TN80xx has same PHY ID as TN2020, but it needs different setting to register
30.93 which used to select line, so we read register 30.32 which has
bit 15:12 to indicate PHY hardware version, for TN20xx we will get 3 or 2,
for TN80xx we will get 5 or 4.
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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When base address given was out of valid flash address ranges,
flash_get_info() function returned the pointer to the last
element of flash_info[i] array.
This patch changes this function to return NULL pointer
in such a case, which is more correct behaviour.
The function flash_protect_default() calls flash_protect()
immediately after flash_get_info() invocation.
With this correction, flash_protect() function would be
able to return soon, for NULL flash_info.
Signed-off-by: Masahiro Yamada <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Linux Kernel Documentation/CodingStyle says:
Do not add a space after unary operators such as &, *, ...
Signed-off-by: Masahiro Yamada <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Packed structure cfi_qry contains unaligned 16- and 32-bits members,
accessing which causes problems when cfi_flash driver is compiled with
-munaligned-access option: flash initialization hangs, probably
due to data error.
Since the structure is supposed to replicate the actual data layout
in CFI Flash chips, the alignment issue can't be fixed in the structure.
So, unaligned fields need using of explicit unaligned access macros.
Signed-off-by: Andrew Gabbasov <[email protected]>
Reviewed-By: Albert ARIBAUD <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Convert NAND IFC driver to support CONFIG_SYS_NAND_SELF_INIT.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
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When a all 0xFF buffer is passed to drop_ffs, the no-0xFF check loop
will loop forever.
After the fix, If ssize_t i = -1 and size_t l = i + 1, the value of l
will still be 0 as expected.
Signed-off-by: Tao Hou <[email protected]>
Cc: Ben Gardiner <[email protected]>
Cc: Scott Wood <[email protected]>
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When writelen is mtd->writesize - 1, it is still a partial page write
Signed-off-by: Tao Hou <[email protected]>
Cc: Scott Wood <[email protected]>
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This avoids needing a separate U-Boot config when some revisions
of a board have small-page NAND and other revisions have large-page
NAND (except for NAND SPL targets).
CONFIG_FSL_ELBC_FMR is removed -- it was never used nor documented, and
it gets in the way of this change.
Signed-off-by: Scott Wood <[email protected]>
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This patch enables the uart tx/rx fifo. Now that fifo is enabled,
the uart read/write functions are modfied to check the UFSTAT register
for fifo status instead of UTRSTAT (as required with fifo's enabled).
Tested by booting linux kernel. Before enabling tx/rx fifo
"Uncompressing linux" message is garbled and after enabling it is proper.
Signed-off-by: Alim Akhtar <[email protected]>
Signed-off-by: Akshay Saraswat <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Add OHCI support for sama5d3x devices
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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This patch adds driver for the gigabyte devices
GD25LQ and GD25Q64B required for Snow Board.
Signed-off-by: Rajeshwari Shinde <[email protected]>
Acked-by: Simon Glass <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Currently the mxsfb driver takes the display timings from the 'videomode'
environment variable.
Provide an example on how to set 'videomode' for using splash screen on
mx23evk and mx28vk boards.
Signed-off-by: Fabio Estevam <[email protected]>
Tested-by: Marek Vasut <[email protected]>
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The logic for the whether to configure for polling or DMA
was mistakenly reversed in this patch:
Commit 7b43db92110ec2f15c5f7187a165f2928464966b
drivers/mmc/fsl_esdhc.c: fix compiler warnings
Signed-off-by: Haijun Zhang <[email protected]>
CC: Sun Yusong-R58495 <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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Faraday FTSDC010 is a MMC/SD host controller.
Although there is already a driver in current u-boot release,
which is modified from eSHDC and contributed by Andes Tech.
Its performance is too terrible on Faraday A36x SoC platforms,
so I turn to implement this new version of driver which is
10+ times faster than the old one.
It's carefully designed to be compatible with Andes chips,
so it should be safe to replace it.
Signed-off-by: Kuo-Jung Su <[email protected]>
CC: Andy Fleming <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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The Freescale MPC8220 Power Architecture processors have long reached
EOL; Freescale does not even list these any more on their web site.
Remove the code to avoid wasting maitaining efforts on dead stuff.
Signed-off-by: Wolfgang Denk <[email protected]>
Cc: Andy Fleming <[email protected]>
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The mpc85xx repuires a special layout on the memory device that is
connected to the eSDHC controller interface. But the file spl_mmc.c
didn't handle this specfic case, there needs a special treatmen, in
the powerpc drictory. So, there is no longer to keep spl_mmc.c on
mpc85xx, CONFIG_SPL_FRAMEWORK is not set.
When CONFIG_SPL_MMC_SUPPORT is set and CONFIG_SPL_FRAMEWORK is not
set, there was an error in drivers/mmc/spl_mmc.c:
drivers/mmc/libmmc.o:(.got2+0x8): undefined reference to `spl_image'.
Now, the solution is to move the file "spl_mmc.c" to directory "common/spl".
Signed-off-by: Ying Zhang <[email protected]>
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If timeout is occurred at the while loop above,
the value of 'timeout' is -1, not 0.
Signed-off-by: Masahiro Yamada <[email protected]>
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This is what we have done for the UTMI PHY on P3041/P5020. Then the PHY
initialization can be reused in kernel without “usb start” command.
Signed-off-by: Roy Zang <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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The VSC8574 is a quad-port Gigabit Ethernet transceiver with four SerDes
interfaces for quad-port dual media capability. This driver supports SGMII
and QSGMII MAC mode. For now SGMII mode is tested.
Signed-off-by: Roy Zang <[email protected]>
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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- set proper compatible property name for mEMAC.
- fixed ft_fixup_port for dual-role mEMAC, which will lead to
MAC node disabled incorrectly.
Signed-off-by: Shengzhou Liu <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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T4160 SoC is low power version of T4240. The T4160 combines eight dual
threaded Power Architecture e6500 cores and two memory complexes (CoreNet
platform cache and DDR3 memory controller) with the same high-performance
datapath acceleration, networking, and peripheral bus interfaces.
Signed-off-by: York Sun <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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T4240 internal UTMI phy is different comparing to previous UTMI PHY
in P3041.
This patch adds USB 2.0 UTMI Dual PHY new memory map and enable it for
T4240.
The phy timing is very sensitive and moving the phy enable code to
cpu_init.c will not work.
Signed-off-by: Roy Zang <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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