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In order to build LOGICORE_DP_TX we must also have enabled AXI, so add
that as a dependency as well.
Signed-off-by: Tom Rini <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Svyatoslav Ryhel <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Raphaël Gallais-Pou <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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sdhci_brcmstb_init_2712() reads host->mmc->host_caps to decide whether
to force card-detect for a non-removable eMMC, or to route the CD signal
for a removable SD card. At the time this function runs from
sdhci_bcmstb_probe(), however, host->mmc->host_caps is still zero, that
field is only populated later by the MMC uclass, after the driver's
probe returns. mmc_of_parse() has already filled plat->cfg.host_caps
from the device tree by this point, so check that field instead.
Without the fix, every BCM2712 SDHCI instance takes the else branch and
writes SDIO_CFG_SD_PIN_SEL = SDIO_CFG_SD_PIN_SEL_CARD (0x02), including
the non-removable eMMC on boards such as CM5 on Home Assistant Yellow.
The SDIO_CFG block lies outside the SDHCI core's reset scope, so this
value persists across SDHCI_RESET_ALL into the next stage. On the
BCM2712, having SD_PIN_SEL set to "SD" when the Linux kernel performs
its first set_power(MMC_POWER_UP) write racily prevents the SDHCI
POWER_ON bit from latching (see [1] for the whole backstory) - the
voltage bits stick but POWER_ON drops - which wedges the first CMD0 the
full 10 s software timeout. On Home Assistant Yellow this manifested as
a ~20 s eMMC probe delay on roughly one in two Linux boots when U-Boot
was the previous stage. Booting directly from the Pi firmware (no U-Boot
in between) left SD_PIN_SEL at its default and did not exhibit the race.
Reading plat->cfg.host_caps lets init_2712 see the "non-removable"
property and take the correct branch, leaving SD_PIN_SEL untouched for
the eMMC.
[1] https://github.com/home-assistant/operating-system/pull/3700#issuecomment-4430229511
Fixes: 10127cdbab64 ("mmc: bcmstb: Add support for bcm2712 SD controller")
Signed-off-by: Jan Čermák <[email protected]>
Reviewed-by: Ivan T. Ivanov <[email protected]>
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nvme_init() allocates prp_pool after configuring the admin queue,
but some later error paths return without freeing it.
Free prp_pool before freeing the queue array in the failure paths
after nvme_setup_io_queues() and namespace ID buffer allocation.
This fixes a memory leak during NVMe initialization failures.
Signed-off-by: Prashant Kamble <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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nvme_create_queue() may issue Delete CQ or Delete SQ
commands even when the corresponding queue creation
failed.
Avoid sending delete commands for queues that were never
successfully created.
Signed-off-by: Prashant Kamble <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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When the identify buffer crosses a page boundary, PRP2 is used
and dma_addr is advanced to the second page:
dma_addr += (page_size - offset);
The subsequent invalidate_dcache_range() calls then use the
modified dma_addr instead of the original buffer start address.
As a result, the beginning of the identify buffer is not
invalidated and the invalidation range extends past the end of
the buffer.
Fix this by preserving the original DMA buffer address for cache
invalidation.
Suggested-by: Neil Armstrong <[email protected]>
Signed-off-by: Prashant Kamble <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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The bcm2835 SDHCI driver sets up the MMC host configuration via
sdhci_setup_cfg(), but does not parse generic MMC device tree
properties.
As a result, properties such as bus-width are ignored. On Raspberry Pi
Compute Module 4, the eMMC node describes an 8-bit bus, but U-Boot
initialized the device as 4-bit.
Call mmc_of_parse() before sdhci_setup_cfg() so that generic MMC
properties are folded into the host configuration before the MMC core
selects the bus width.
Before this change, mmc info reported:
Bus Speed: 52000000
Bus Width: 4-bit
After this change, mmc info reports:
Bus Speed: 52000000
Bus Width: 8-bit
Tested on Raspberry Pi Compute Module 4 with onboard eMMC.
Signed-off-by: Liel Harel <[email protected]>
Reviewed-by: Peter Robinson <[email protected]>
Tested-by: Peter Robinson <[email protected]> # on the CM4 as well
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The 'brcm,bcm2712-hdmi0' compatible string is used on RPi5.
There appears to be no change that impacts early boot output
on the display controller so add the RPi5 compatible string.
Signed-off-by: Peter Robinson <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
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Sync include/ec_commands.h from upstream commit 4f3d17aa34
("skywalker: set SLEEP_TIMEOUT_MS to 50 seconds"). The new file makes
two build assumptions that do not hold for U-Boot.
It hides '<stdint.h>' from __KERNEL__ builds, leaving UINT16_MAX
(used by EC_RES_MAX) undefined for U-Boot; widen the gate to
'!defined(__KERNEL__) || defined(__UBOOT__)'
It gates '<linux/limits.h>' on '#ifdef __KERNEL__'; the matching
'#else' branch defines BIT()/BIT_ULL()/GENMASK()/GENMASK_ULL()
locally, assuming kernel headers provide those macros otherwise.
U-Boot defines __KERNEL__ too but has no <linux/limits.h>. Nest a
'!defined(__UBOOT__)' check around the include so the __UBOOT__ path
stays in the __KERNEL__ branch (no local BIT/GENMASK defines), which
avoids redefinition warnings against U-Boot's linux/bitops.h. Pull
in linux/bitops.h up front for U-Boot so the file's own BIT() and
GENMASK() uses still resolve.
Adapt callers to two interface changes. The 'ec_current_image' enum
tag is now 'ec_image' (EC_IMAGE_* constants unchanged); rename it in
affected files to match. The VBNV-context interface was dropped
upstream, but it still used in lab Chromebooks; keep those constants and
structs in cros_ec.h
Likewise, MEC_EMI_BASE and MEC_EMI_SIZE are a U-Boot-local addition to
ec_commands.h that the upstream sync removes; preserve them in cros_ec.h
next to the VBNV block, and switch the only consumer
(arch/x86/cpu/apollolake/cpu_spl.c) to include cros_ec.h
Signed-off-by: Simon Glass <[email protected]>
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If the LED is in the ON state, it is briefly set to OFF
then to ON immediately due to falling-through in the default
case.
This commit ensures that no fall-through occurs and thus
a LED initially in the ON state is turned off before blinking.
Signed-off-by: Francois Berder <[email protected]>
Fixes: 9e3d83301e4f ("led: toggle LED on initial SW blink")
Acked-by: Quentin Schulz <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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gpio status -a does not have labels: the existing path walks
the per-bank requested label table.
Issue: The boards that populate the standard gpio-line-names
property in their device tree end up with anonymous entries,
which is not logic with the purpose of having those names in the DT.
No impact with boards that does not set gpio-line-names.
Signed-off-by: Vincent Jardin <[email protected]>
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Prepare v2026.07-rc3
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https://source.denx.de/u-boot/custodians/u-boot-microblaze
AMD/Xilinx/FPGA changes for v2026.07-rc3
versal/fpga:
- Fix unaligned buffer handling
versal2:
- Fix buffer overflow in SOC name array
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Our official domain is now u-boot-project.org, so update all in-tree
references to use the correct domain.
Reviewed-by: Tony Dinh <[email protected]>
Reviewed-by: Peter Robinson <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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When fpga load is called with a misaligned buffer address, the
versal_align_dma_buffer() function shifts the pointer forward to the
next aligned boundary and uses memcpy() to copy the data. Since the
destination is ahead of the source and the regions overlap, memcpy()
produces undefined behavior; in practice U-Boot's generic memcpy()
copies forward, repeating the first ARCH_DMA_MINALIGN-aligned chunk
throughout the buffer.
Replace memcpy() with memmove() which correctly handles overlapping
regions by copying backwards when the destination is ahead of the
source.
Fixes: 26e054c943a7 ("arm64: versal: fpga: Add PL bit stream load support")
Signed-off-by: Pranav Tilak <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Currently we are trying to work out if the vendor id is from
a virtio-mmio device and then casting a u32 to a char* and using
it as a C-string. By chance there is usually a zero after the u32
and it works.
Since the vendor id we are trying to convert to a string is QEMU's
just define a value for the QEMU vendor id, check if the vendor
id matches and then use a predefined string for "QEMU".
I don't think we should have been assumming all virtio-mmio vendor
ids are printable ASCII chars in the first place so do this special
casing just for QEMU. If the vendor id isn't QEMU print the hex
value of it.
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Kuan-Wei Chiu <[email protected]>
Signed-off-by: Daniel Palmer <[email protected]>
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The m68k QEMU virt machine doesn't use devicetree, yet, so
allow it to create virtio-mmio instances via platform data.
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Kuan-Wei Chiu <[email protected]>
Reviewed-by: Angelo Dureghello <[email protected]>
Signed-off-by: Daniel Palmer <[email protected]>
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The Goldfish timer registers are native endian, so they act as
big-endian on the m68k virt machine. Currently, this driver uses
readl(), which works by luck because it's currently broken on m68k.
Use __raw_readl() instead to avoid breaking this driver when the
endianness of readl() is fixed.
Signed-off-by: Kuan-Wei Chiu <[email protected]>
Tested-by: Daniel Palmer <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Daniel Palmer <[email protected]>
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In QEMU, the Goldfish RTC is explicitly instantiated as a big-endian
device on the m68k virt machine (via the 'big-endian=true' property).
Currently, this driver uses ioread32() and iowrite32(), which works
by luck because the underlying readl() and writel() are currently
broken on m68k.
Use __raw_readl() and __raw_writel() instead to avoid breaking this
driver when the endianness of readl() and writel() is fixed.
Signed-off-by: Kuan-Wei Chiu <[email protected]>
Tested-by: Daniel Palmer <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Daniel Palmer <[email protected]>
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The virt ctrl register seems to be native endian, currently this driver
uses writel(), which works by luck because its currently broken on m68k.
Use __raw_writel() instead to avoid breaking this driver when the
endianness of writel() is fixed.
Acked-by: Kuan-Wei Chiu <[email protected]>
Reviewed-by: Angelo Dureghello <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Daniel Palmer <[email protected]>
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In the platform data there is a phys_addr_t (an integer) for the address
of the register and we pass that as-is into writel() which is fine in most
places because we don't need to do any mapping and the macro for writel()
does a cast to a pointer.
If writel() is a static inline function the address argument is a pointer
so passing it in as an integer without casting it first causes warnings or
build failure.
map_sysmem() handles the casting part and if phys_addr_t is 32bits when
on a 64bit machine.
Signed-off-by: Daniel Palmer <[email protected]>
Acked-by: Kuan-Wei Chiu <[email protected]>
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Add Renesas R-Car R8A78000 X5H MDLC power domain and reset driver,
which serves as a remap driver between DT power domain and reset IDs
and SCMI power domain and reset IDs in case U-Boot runs on Cortex-A,
and as a direct hardware access driver for RSIP.
The R-Car X5H SCP firmware uses different SCMI power domain and
reset IDs in different versions of the SCP firmware, which makes
this remapping necessary. The SCMI base protocol version is updated
for each new SCP firmware version, it is therefore possible to
determine which SCP firmware version is running on the platform
from the base protocol and then determine which remapping table to
use for DT power domain and reset ID to SCMI power domain and reset
ID remapping.
Currently supported versions are SCP 4.28, 4.31, 4.32 .
The DT power domain and reset ID to SCMI power domain and reset ID
remap and call mechanism is simple. Unlike SCMI clock protocol driver,
the SCMI reset and power domain protocol drivers register only a single
device. This driver looks up that single device, obtains its reset or
power domain ops, sets up struct reset_ctl or struct power_domain with
remapped SCMI ID, and invokes operations directly on the device.
In case of RSIP, all power domains are already enabled by BootROM or
early SoC initialization code, the driver therefore only acts as a
stub for the power domain part. The reset part operates as a direct
hardware access reset driver.
Signed-off-by: Marek Vasut <[email protected]>
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Add Renesas R-Car R8A78000 X5H CPG clock driver, which serves as a
remap driver between DT clock IDs and SCMI clock IDs in case U-Boot
runs on the Cortex-A, and as a trivial clock driver for RSIP.
The R-Car X5H SCP firmware uses different SCMI clock IDs in different
versions of the SCP firmware, which makes this remapping necessary.
The SCMI base protocol version is updated for each new SCP firmware
version, it is therefore possible to determine which SCP firmware
version is running on the platform from the base protocol and then
determine which remapping table to use for DT clock ID to SCMI clock
ID remapping.
Currently supported versions are SCP 4.28, 4.31, 4.32 .
The DT clock ID to SCMI clock ID remap and call mechanism is a bit
complex. The driver looks up the SCMI clock protocol device on probe
and stores pointer to it in private data. On each clock request which
has to be remapped, the device sequence ID of this SCMI clock protocol
device is incremented by the remapped SCMI clock ID + 1 and used to
look up matching clock device by sequence number. If the device is
found, it is converted to clock, which can be used in regular clock
operations. This look up has to be done because the SCMI clock driver
registers a subdevice for each clock, and this look up is the only way
to find the correct SCMI clock subdevice. Since the SCMI device and
the clock subdevices are registered in the same function, we can depend
on the device sequence numbers to be monotonically incrementing, with
SCMI clock protocol device being sequence number N, the first SCMI
clock subdevice being sequence number N+1 and so on.
In case of RSIP, all clocks are already enabled by BootROM or early
SoC initialization code, the driver therefore only acts as a stub.
Signed-off-by: Marek Vasut <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-dfu
u-boot-dfu-20260521
CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/30195
Usb Gadget:
* f_acm: Fix memory leak in acm_add()
* atmel: Fix gadget support on bus reset
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Endpoints should not be disabled on bus reset inside UDC driver,
otherwise a race condition will happen between gadget driver. Gadget
driver will free the requests and disable endpoints in disconnect ops.
Also remove outdated comment about it in usba_ep_disable().
Signed-off-by: Zixun LI <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
Fixes: 59310d1ecb9f ("usb: gadget: introduce 'enabled' flag in struct usb_ep")
Link: https://patch.msgid.link/[email protected]
[mkorpershoek: removed empty newline between Fixes: and sob]
Signed-off-by: Mattijs Korpershoek <[email protected]>
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The PRP setup code advances prp_pool using u64 pointer
arithmetic:
prp_pool += page_size;
This increments the pointer by page_size * sizeof(u64)
bytes instead of page_size bytes, resulting in invalid
PRP list addresses when multiple PRP list pages are
required.
The issue becomes visible for large transfers, typically
above 2 MiB when MDTS > 9.
Fix it by using byte-wise pointer arithmetic when
advancing to the next PRP list page.
Signed-off-by: Prashant Kamble <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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memalign returns NULL if it fails.
This commit ensures that we handle this failure before
filling the buffer with 0s.
Signed-off-by: Francois Berder <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://patch.msgid.link/BESP194MB280542535B098A33C8A815EEDA3A2@BESP194MB2805.EURP194.PROD.OUTLOOK.COM
Signed-off-by: Neil Armstrong <[email protected]>
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nvme_get_cmd_id() returns 0 after cmdid reaches USHRT_MAX,
but fails to reset cmdid itself. As a result, all subsequent
calls keep returning 0 indefinitely.
Reset cmdid when wraparound occurs so command IDs continue
incrementing correctly.
Signed-off-by: Prashant Kamble <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
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We don't need to provide an empty struct here now that the caller can
handle this being empty.
Signed-off-by: Tom Rini <[email protected]>
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We don't need to provide an empty struct here now that the caller can
handle this being empty.
Signed-off-by: Tom Rini <[email protected]>
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We don't need to provide an empty struct here now that the caller can
handle this being empty.
Signed-off-by: Tom Rini <[email protected]>
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We don't need to provide an empty struct here now that the caller can
handle this being empty.
Signed-off-by: Tom Rini <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Mark Kettenis <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Svyatoslav Ryhel <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Svyatoslav Ryhel <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Set the ops structure as static const. The structure is not accessible
from outside of this driver and is not going to be modified at runtime.
Signed-off-by: Marek Vasut <[email protected]>
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