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Signed-off-by: Marek Vasut <[email protected]>
Cc: Scott Wood <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
[[email protected]: use chip instead of redundant priv_nand]
Signed-off-by: Scott Wood <[email protected]>
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When writing 0x4000 to the unlockend_blkaddr register, large writes to
a 2k page NAND sometimes fail. The current kernel driver writes 0xFFFF
to this register for V2 of the nand controller.
However on an i.MX31 this also fixes writes larger than 32MB.
The datasheet is very unspecific, but (0x4000=16384)*2000
roughly fits the limits we're encountering with NAND writes.
This problem might be NAND chip specific.
Signed-off-by: Helmut Raiger <[email protected]>
Signed-off-by: Scott Wood <[email protected]>
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Signed-off-by: Helmut Raiger <[email protected]>
Signed-off-by: Scott Wood <[email protected]>
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The new SAMSUNG NAND Flash K9F1G08U0D require a bigger chip_delay.
The Data Transfer from Cell to Register is >= 35us. Other Vendors
and older chips normally use >= 25us. To have enough margin 40us
is selected.
Signed-off-by: Stefan Bigler <[email protected]>
Signed-off-by: Holger Brunck <[email protected]>
cc: Prafulla Wadaskar <[email protected]>
cc: Stefan Roese <[email protected]>
Signed-off-by: Scott Wood <[email protected]>
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Add P3060 SoC specific information:cores setup, LIODN setup, etc
The P3060 SoC combines six e500mc Power Architecture processor cores with
high-performance datapath acceleration architecture(DPAA), CoreNet fabric
infrastructure, as well as network and peripheral interfaces.
Signed-off-by: Shengzhou Liu <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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The SoC configuration may have more ports enabled than a given board
actually can utilize. Add a routinue that allows the board code to
disable a port that it knows isn't being used.
fm_disable_port() needs to be called before cpu_eth_init().
Signed-off-by: Kumar Gala <[email protected]>
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When enable the multi-bus, the current_bus is not inited in the original
implementation, which make the i2c operation unpredicatable.
Signed-off-by: Lei Wen <[email protected]>
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When DEBUG_I2C is open, the following build issue would shows up.
mv_i2c.c: In function 'i2c_transfer':
mv_i2c.c:257: error: 'ISR' undeclared (first use in this function)
mv_i2c.c:257: error: (Each undeclared identifier is reported only once
mv_i2c.c:257: error: for each function it appears in.)
Signed-off-by: Lei Wen <[email protected]>
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Every emaclite instance use own setting.
Signed-off-by: Michal Simek <[email protected]>
Acked-by: Mike Frysinger <[email protected]>
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Use dev->iobase instead of baseaddress.
Signed-off-by: Michal Simek <[email protected]>
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Simplify driver logic and clear eth_device structure
in one command.
Signed-off-by: Michal Simek <[email protected]>
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Cleanup structure.
Signed-off-by: Michal Simek <[email protected]>
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Current xilinx emaclite use net multi registration
but doesn't support several emaclites interfaces.
Changing driver name with adding address to name
is the first step how to distiguish several drivers.
Signed-off-by: Michal Simek <[email protected]>
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vmt.c: In function ‘ubi_free_volume’:
vmt.c:681:6: warning: variable ‘err’ set but not used
[-Wunused-but-set-variable]
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Mike Frysinger <[email protected]>
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nand_bbt.c: In function ‘search_bbt’:
nand_bbt.c:465:6: warning: variable ‘bits’ set but not used
[-Wunused-but-set-variable]
Signed-off-by: Marek Vasut <[email protected]>
Cc: Scott Wood <[email protected]>
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ipu_disp.c: In function ‘ipu_disp_set_global_alpha’:
ipu_disp.c:1237:11: warning: variable ‘flow’ set but not used
[-Wunused-but-set-variable]
ipu_disp.c: In function ‘ipu_disp_set_color_key’:
ipu_disp.c:1302:16: warning: variable ‘flow’ set but not used
[-Wunused-but-set-variable]
Signed-off-by: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
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There are some locations in the code which anticipate printf() being called
before the console is ready by squelching printf() on gd->have_console.
Move this squelching into printf(), vprintf(), puts() and putc(). Also
make tstc() and getc() return 0 if console is not yet initialised
Signed-off-by: Graeme Russ <[email protected]>
Tested-by: Simon Glass <[email protected]>
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If CONFIG_SYS_NS16550_MEM32 is defined then 32 bit memory
mapped access will be used to read/write the uart registers.
This is especially useful for SoC devices that implement 16550
compatible uarts but that have peripheral access width constraints.
Signed-off-by: Dave Aldridge <[email protected]>
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* 'sf' of git://git.denx.de/u-boot-blackfin:
sf: eon: add support for EN25Q32B parts
cmd_sf: add "update" subcommand to do smart SPI flash update
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mxc_ata.c: In function ‘set_ata_bus_timing’:
mxc_ata.c:118: warning: dereferencing type-punned pointer will break
strict-aliasing rules
mxc_ata.c:125: warning: dereferencing type-punned pointer will break
strict-aliasing rules
mxc_ata.c:129: warning: dereferencing type-punned pointer will break
strict-aliasing rules
Signed-off-by: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
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Rewrite the mxc_i2c driver.
* This version is much closer to Linux implementation.
* Fixes IPG_PERCLK being incorrectly used as clock source
* Fixes behaviour of the driver on iMX51
* Clean up coding style a bit ;-)
Signed-off-by: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Heiko Schocher <[email protected]>
Cc: Jason Hui <[email protected]>
Acked-by: Jason Liu <[email protected]>
Acked-by: Heiko Schocher <[email protected]>
Tested-by: Jason Liu <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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This patch allows user to register multiple FEC controllers. To preserve
compatibility with older boards, the mxcfec_register() call is still in place.
To use multiple controllers, new macro is in place, the mxcfec_register_multi(),
which takes more arguments. The syntax is:
mxcfec_register_multi(bd, FEC ID, FEC PHY ID on the MII bus, base address);
To disable the fecmxc_register() compatibility stuff, define the macro
CONFIG_FEC_MXC_MULTI. This will remove the requirement for defining IMX_FEC_BASE
and CONFIG_FEC_MXC_PHYADDR.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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The default is MII100, which was hardcoded previously in the driver.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
Cc: Ben Warren <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Detlev Zundel <[email protected]>
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This is cosmetic patch for the help message:
Before:
pmic dump [numregs] dump registers
After:
pmic dump [numregs] - dump registers
Signed-off-by: Jason Liu <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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Signed-off-by: Heiko Schocher <[email protected]>
Cc: Paulraj Sandeep <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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Once the MDIO state machine has been initialized and enabled, it
starts polling all 32 PHY addresses on the MDIO bus, looking for
an active PHY. Add a 5 ms delay, so all PHYs are for sure detected.
This problem was detected on the cmc board with a KSZ8864 switch.
Signed-off-by: Heiko Schocher <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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The PHY driver was too verbose and corrupted the boot message display
like this:
...
Net: Ethernet PHY: KSZ8873 @ 0x02
DaVinci-EMAC
...
Turn printf() into debug() so we get the expected output again:
...
Net: DaVinci-EMAC
...
Signed-off-by: Heiko Schocher <[email protected]>
cc: Paulraj Sandeep <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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Signed-off-by: Heiko Schocher <[email protected]>
Cc: Paulraj Sandeep <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Cc: Mike Frysinger <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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Signed-off-by: Heiko Schocher <[email protected]>
Cc: Paulraj Sandeep <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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Config VMMC voltage to 3V for MMC/SD card slot
and PBIAS settings needed for OMAP4
Fixes MMC/SD detection on boot from eMMC.
Signed-off-by: Balaji T K <[email protected]>
Signed-off-by: Aneesh V <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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Enable high capacity to host capability.
Fixes eMMC detection on boot from MMC/SD card.
Signed-off-by: Balaji T K <[email protected]>
Signed-off-by: Aneesh V <[email protected]>
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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Adds NAND library to SPL.
Signed-off-by: Simon Schwarz <[email protected]>
Acked-by: Scott Wood <[email protected]>
Signed-off-by: Sandeep Paulraj <[email protected]>
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This patch adds support for Fast Ethernet Controller driver for
Armada100 series.
Signed-off-by: Ajay Bhargav <[email protected]>
Signed-off-by: Prafulla Wadaskar <[email protected]>
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This patch adds generic GPIO driver framework support for Marvell SoCs.
To enable GPIO driver define CONFIG_MARVELL_GPIO and for GPIO commands
define CONFIG_CMD_GPIO in your board configuration file.
Signed-off-by: Ajay Bhargav <[email protected]>
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The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration
architecture) is the ethernet contoller block. Normally it is utilized
via Queue Manager (Qman) and Buffer Manager (Bman). However for boot
usage the FMan supports a mode similar to QE or CPM ethernet collers
called Independent mode.
Additionally the FMan block supports multiple 1g and 10g interfaces as a
single entity in the system rather than each controller being managed
uniquely. This means we have to initialize all of Fman regardless of
the number of interfaces we utilize.
Different SoCs support different combinations of the number of FMan as
well as the number of 1g & 10g interfaces support per Fman.
We add support for the following SoCs:
* P1023 - 1 Fman, 2x1g
* P4080 - 2 Fman, each Fman has 4x1g and 1x10g
* P204x/P3041/P5020 - 1 Fman, 5x1g, 1x10g
Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
Signed-off-by: Timur Tabi <[email protected]>
Signed-off-by: Roy Zang <[email protected]>
Signed-off-by: Dai Haruki <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
Signed-off-by: Ioana Radulescu <[email protected]>
Signed-off-by: Lei Xu <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Scott Wood <[email protected]>
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Add NAND support (including spl) on IFC, such as is found on the p1010.
Note that using hardware ECC on IFC with small-page NAND (which is what
comes on the p1010rdb reference board) means there will be insufficient
OOB space for JFFS2, since IFC does not support 1-bit ECC. UBI should
work, as it does not use OOB for anything but ECC.
When hardware ECC is not enabled in CSOR, software ECC is now used.
Signed-off-by: Dipen Dudhat <[email protected]>
[[email protected]: ECC rework and misc fixes]
Signed-off-by: Scott Wood <[email protected]>
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Add UTMI and ULPI PHY support for USB controller on qoriq series of
processors with internal UTMI PHY implemented, for example P1010/P1014
- Use both getenv() and hwconfig to get USB phy type till getenv()
is depricated
- Introduce CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY to specify if soc
has internal UTMI phy
Signed-off-by: Ramneek Mehresh <[email protected]>
Acked-by: Remy Bohmer <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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This reverts commit 041c542219af7f31c372d89b4c7c6f4c8064a8ce.
The lines removed by this commit weren't redundant. The logic is (and
probably should be better commented):
Find the intersection of the advertised capabilities of both sides of
the link (lpa).
From that intersection, find the highest capability we can run at
(that will be the negotiated link).
Now imagine that the intersection (lpa) is (LPA_100HALF | LPA_10FULL).
The code will now set phydev->speed to 100, and phydev->duplex to 1,
but this link does not support 100FULL.
Kudos to Andy Fleming <[email protected]> for binging this to
attention and for the explanation.
Signed-off-by: Wolfgang Denk <[email protected]>
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Signed-off-by: Marek Vasut <[email protected]>
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On some systems, we get a warning when %lu is used with size_t's, so
use the correct format string.
Signed-off-by: Vadim Bendebury <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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