| Age | Commit message (Collapse) | Author |
|---|
|
If SPL_CLK_IMX8MP is selected alone, it causes a build error.
The clock composite is required when using the clock framework, so
select it when SPL_CLK_IMX8MP is enabled. This is already being
done outside of SPL.
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
|
|
Depending on the platform, there may be multiple clock sources
required to enable a UART. Use the bulk functions to get and
enable the clocks when the UART probes. This can facilitate
the removal of functions to manually enable the clock.
This is made dependent on CLK_CCF which is used on imx6q,
imx8m[mnqp], several imxrt, imx9. If/when the UART clock
registration is done for older boards, this limitation
could be updated.
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
|
|
In order to let the serial driver enable the clocks, the UART clocks
must be registered first.
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
|
|
In order to let the serial driver enable the clocks, the UART clocks
must be registered first.
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
|
|
In order to use the driver model and clock system to enable UART
clocks from the serial driver, it's necessary to register the UART
clocks. With the helper function to check for imx6qp vs other
variants, the UART can register for both scenarios.
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
|
|
The ECSPI clock has the ability to select between pll3_60m and
osc on the imx6qp, where it's fixed on other variants. Fix this
by adding using a helper function to determine SoC variant and
register the clock accordingly.
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Michael Trimarchi <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
|
|
The current default pin and drive values were more of temporary
placeholders. They have to be replaced with accurate default values as
specified in the TRM and header file.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
|
|
Since EDID only indicates supported standard timings, a large table with
detailed timing information is necessary, consuming significant space. To
mitigate this, the table is made configurable via kconfig, allowing it to
be excluded when not needed.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
|
|
Configure backlight lm3533 child according to device tree description.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
|
|
Configure core stuff in the probe.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
|
|
Configure LM3533 based on preliminary device tree configuration.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
|
|
Add missing MIPI_DSI_MODE_LPM mode flag.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
|
|
Add missing MIPI_DSI_MODE_LPM mode flag.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
|
|
Convert enable GPIO into a set of supplies.
Signed-off-by: Svyatoslav Ryhel <[email protected]>
|
|
We can call phy_modify_mmd() instead of manually calling drv->readext()
and drv->writeext().
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Paul Barker <[email protected]>
|
|
Various signal skew values may be set in the device tree for the ksz9131
Ethernet PHY. For example, the RZ/G2L board requires non-default values
for rxc-skew-psec & txc-skew-psec.
This is based on the ksz9131 phy driver in Linux v6.11.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Paul Barker <[email protected]>
|
|
Micrel KSZ9131 PHY LED behavior is not correct when configured in
Individual Mode, LED1 (Activity LED) is in the ON state when there is
no-link.
Workaround this by setting bit 9 of register 0x1e after verifying that
the LED configuration is Individual Mode.
This issue is described in KSZ9131RNX Silicon Errata DS80000693B [*]
and according to that it will not be corrected in a future silicon
revision.
[*] https://ww1.microchip.com/downloads/en/DeviceDoc/KSZ9131RNX-Silicon-Errata-and-Data-Sheet-Clarification-80000863B.pdf
Based on commit 0316c7e66bbd in the Linux kernel.
Tested-by: Quentin Schulz <[email protected]> # RK3588 Tiger
Signed-off-by: Paul Barker <[email protected]>
|
|
In ravb_probe(), we were missing a couple of things in the error
handling path:
* We must unregister the MDIO bus before freeing the corresponding
struct mii_dev instance to avoid the potential for use-after-free
bugs.
* We must free the resources acquired by clk_get_bulk() even if the
clocks have not yet been enabled.
Fixes: 8ae51b6f324e ("net: ravb: Add Renesas Ethernet RAVB driver")
Signed-off-by: Paul Barker <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
|
|
Extend the existing Renesas R-Car Gen3 USB 2.0 PHY driver to support the
RZ/G2L and related SoCs.
Also enable this driver by default for the RZ/G2L SoC family.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Paul Barker <[email protected]>
|
|
Bind the USB VBUS regulator driver under the USB PHY reset driver for
the Renesas RZ/G2L and related SoCs. This additional bind is needed as
the corresponding device tree node does not contain a compatible string.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Paul Barker <[email protected]>
|
|
Add a new regulator driver to control the USB VBUS supply on the Renesas
RZ/G2L and related SoCs.
Reviewed-by: Marek Vasut <[email protected]>
Signed-off-by: Paul Barker <[email protected]>
|
|
Add a new driver to control the USB 2.0 PHY reset controller on the
Renesas RZ/G2L and related SoCs.
Signed-off-by: Paul Barker <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-ufs into next
- initial cleanup and defines sync with Linux v6.12
|
|
Sync ufshci.h with the version found in the Linux v6.12
version commit adc218676eef ("Linux 6.12").
It adds new defines, and moves defines to the same place
as the Linux header.
No functional changes intended.
Acked-by: Neha Malcom Francis <[email protected]>
Tested-by: Love Kumar <[email protected]>
[narmstrong: do not rename CFG_RESULT_CODE_MASK]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|
|
Sync unipro.h with the version found in the Linux v6.12
version commit adc218676eef ("Linux 6.12").
It adds new defines, and moves defines to the same place
as the Linux header.
No functional changes intended.
Acked-by: Neha Malcom Francis <[email protected]>
Tested-by: Love Kumar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|
|
Splitting the header will help synchronizing the defines
again with Linux.
Acked-by: Neha Malcom Francis <[email protected]>
Tested-by: Love Kumar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|
|
Fixes some alignment warnings, missing comments on write barrier,
missing parenthesis around macro parameters and a comment typo.
No functional changes intended.
Reviewed-by: Neha Malcom Francis <[email protected]>
Tested-by: Love Kumar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|
|
Mark the remaining local functions as static to avoid build
warnings.
Also drop the EXPORT_SYMBOL of ufshcd_map_desc_id_to_length.
Tested-by: Love Kumar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|
|
Add missing ufs.h causing build warning on some symbols.
Tested-by: Love Kumar <[email protected]>
Reviewed-by: Neha Malcom Francis <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|
|
On PowerPC platforms with TPL enabled and SPL_SYS_NS16550_SERIAL
enabled, today this builds under TPL as well due to how $(XPL_) is
defined. Add the TPL_SYS_NS16550_SERIAL itself for consistency and
clarity.
Signed-off-by: Tom Rini <[email protected]>
|
|
- Add USB support on Starfive JH7110
|
|
https://source.denx.de/u-boot/custodians/u-boot-nand-flash into next
CI: https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/25178
This merge request add support for cadence raw nand driver for agilex
board and add a fix to meson driver.
|
|
Stub the RPMh clock controller on SC7280
Signed-off-by: Caleb Connolly <[email protected]>
|
|
A copy-paste error is starting to get out of hand... Fix all these so
they don't look like clock drivers in menuconfig.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Add support for a bunch of new clocks, including PCIe, GENI (for all
peripherals used on the RB3 Gen 2), and some missing USB clocks.
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Dump a few PCIe and USB clocks
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
If we try to enable a gate clock that doesn't exist, we used to just
fail silently. This may make sense for early bringup of some core
peripherals that we know are already enabled, but it only makes
debugging missing clocks more difficult.
Bubble up errors now that qcom_gate_clk_en() can return an error code to
catch any still-missing clocks and make it easier to find missing ones
as more complicated peripherals are enabled.
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Depending on ARCH_IPQ40XX is too restrictive, as this architecture is
explicitly armv7. This driver is also used on msm8916 devices, which
have cortex-a53 armv8 cores.
Signed-off-by: Sam Day <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Introduce a pinctrl driver for SC7280/QCM6490, this is used by the RB3
Gen 2, FairPhone 5 and other devices.
Tested-by: Christopher Obbard <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
This is how the kernel does it. APQ8016E TRM also states that this clock
can be turned off when no random numbers are needed.
Signed-off-by: Sam Day <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Properly warn when an unknown clock is enabled.
Signed-off-by: Sam Day <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
msm_rng_enable is supposed to skip writing to LFSR_CFG + CONFIG
registers in the PRNG_ block if PRNG_CONFIG_HW_ENABLE is already set.
The logic to test for this was inverted.
Without this fix, the driver was causing SError aborts on my MSM8916
device. Stephan Gerhold suggested this was probably because TZ has
marked this as a protected register, since it would also be using it for
RNG.
Fixes: 033ec636fcb ("rng: Add Qualcomm MSM PRNG driver")
Suggested-by: Stephan Gerhold <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Sam Day <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
This clock needs to be enabled for the msm-rng driver to work on
MSM8916, otherwise accessing the PRNG register block causes a data
abort.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Sam Day <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
This reads a little bit nicer (IMO), and is consistent with the kernel.
Signed-off-by: Sam Day <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
U-Boot has to reconfigure the clocks that were set in the boot
loaders. However, in IPQ9574, the clocks have to be reset before
they can be reconfigured. Hence add code to do the relevant
resets.
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Add pinctrl driver for the TLMM block found in the ipq9574 SoC.
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Presently, get_function_mux returns an unsigned int and cannot
differentiate between failure and correct function value. Change its
return type to int and check for failure in the caller.
Additionally, updated drivers/pinctrl/qcom/pinctrl-*.c to accommodate the
above return type change. Only compile test done.
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Add initial set of clocks and resets for enabling U-Boot on ipq9574
based RDP platforms.
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Caleb Connolly <[email protected]>
|
|
Add Starfive cdns USB3 wrapper driver.
Signed-off-by: Minda Chen <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Tested-by: E Shattow <[email protected]>
|
|
Cdns core driver also get dr mode from wrapper devcie dts node
to make it is same with Starfive cdns USB Linux kernel driver,
Starfive 7110 OF_UPSTREAM is enabled
Signed-off-by: Minda Chen <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
|
