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No need for these to be exported as they are only accessed indirectly
via function pointers.
Signed-off-by: Mike Frysinger <[email protected]>
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The previous unification patch missed setting up the sst read func.
Signed-off-by: Mike Frysinger <[email protected]>
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This patch adds a new member to struct spi_flash (u16 sector_size)
and updates the spi flash drivers to start populating it.
This parameter can be used by spi flash commands that need to round
up units of operation to the flash's sector_size.
Having this number in one place also allows duplicated code to be
further collapsed into one common location (such as erase parameter
and the detected message).
Signed-off-by: Richard Retanubun <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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The AT45 flashes are completely different (at the command set and
status register level) from all other SPI flashes, so we can't unify
their logic with common code.
Signed-off-by: Mike Frysinger <[email protected]>
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Faraday ftwdt010 watchdog is an architecture independant
watchdog. It is usually used in SoC chip design.
Signed-off-by: Macpaul Lin <[email protected]>
Signed-off-by: Wolfgang Denk <[email protected]>
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Add Intel E1000 82574L PCIe card support. Test on MPC8544DS
and MPC8572 board.
Add the missing contact information for future support.
Signed-off-by: Roy Zang <[email protected]>
Acked-by: Kumar Gala <[email protected]>
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This patch fixes ea20 after 8ef583a0351590a91394499eb5ca2ab8a703d959 where
the u-boot custom PHY_ macros were replaced with those of linux/mii.h MII_
definitions except in the RMII support for davinci_emac. Probably also due to
the merge path of changes in 2010.12.
Signed-off-by: Ben Gardiner<[email protected]>
CC: Mike Frysinger <[email protected]>
Acked-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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All of the spi flash drivers implement the status register polling for
detecting the device ready state, so unify them all in a new helper
function -- spi_flash_wait_ready.
Signed-off-by: Mike Frysinger <[email protected]>
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These functions largely do the same exact thing, so unify them all
into one basic function.
Signed-off-by: Mike Frysinger <[email protected]>
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P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark
level register description has been changed:
9-15 bits represent WR_WML[0:6], Max value = 128 represented by 0x00
25-31 bits represent RD_WML[0:6], Max value = 128 represented by 0x00
Signed-off-by: Priyanka Jain <[email protected]>
Signed-off-by: Poonam Aggrwal <[email protected]>
Tested-by: Stefano Babic <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Don't forget to count full data size for the multiblock operation request.
Signed-off-by: Sonic Zhang <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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The timer register is 32bits, not 16bit, so 0xFFFF won't fill it.
Write out -1 to make sure to fill the whole thing.
Signed-off-by: Cliff Cai <[email protected]>
Signed-off-by: Mike Frysinger <[email protected]>
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Signed-off-by: Mike Frysinger <[email protected]>
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collect code which protects default sectors in a function, called
flash_protect_default. So boardspecific code can call it too.
Signed-off-by: Heiko Schocher <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Signed-off-by: Mario Schuknecht <[email protected]>
Signed-off-by: Steffen Sledz <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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P1021 has some QE pins which need to be set in pmuxcr register before
using QE functions. In this patch, pin QE0 and QE3 are set for UCC1 and
UCC5 in Eth mode. QE9 and QE12 are set for MII management. QE12 needs to
be released after MII access because QE12 pin is muxed with LBCTL signal.
Also added relevant QE support defines unique to P1021.
The P1021 QE is shared on P1012, P1016, and P1025.
Signed-off-by: Haiying Wang <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Conflicts:
drivers/usb/host/ehci-pci.c
Signed-off-by: Wolfgang Denk <[email protected]>
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Signed-off-by: Li Yang <[email protected]>
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Add ULI1575 EHCI controller to the list of the supported devices.
Signed-off-by: Zhao Chenhui <[email protected]>
Acked-by: Remy Bohmer <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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If some pre-boot or earlier stage bootloader (NAND SPL) has setup LAW
entries consider them good and mark them used.
In the NAND SPL case we skip re-initializing based on the law_table
since the SPL phase already did that.
Signed-off-by: Kumar Gala <[email protected]>
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FSL PCIe controller v2.1:
- New MSI inbound window
- Same Inbound windows address as PCIe controller v1.x
Added new pit_t member(pmit) to struct ccsr_pci for MSI inbound window
FSL PCIe controller v2.2 and v2.3:
- Different addresses for PCIe inbound window 3,2,1
- Exposed PCIe inbound window 0
- New PCIe interrupt status register
Added new Interrupt Status register to struct ccsr_pci & updated pit_t array
size to reflect the 4 inbound windows.
To maintain backward compatiblilty, on V2.2 or greater controllers we
start with inbound window 1 and leave inbound 0 with its default value
(which maps to CCSRBAR).
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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This patch adds support for the PI7C9X442SL PCIe EHCI host controller
from Pericom.
Tested at P4080DS eval board from Freescale.
Signed-off-by: Ralf Trübenbach <[email protected]>
Cc: Remy Bohmer <[email protected]>
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The anomaly workarounds we need for older silicon might break things
if used on newer versions where the anomalies don't exist. So check
the silicon rev at runtime too.
Signed-off-by: Mike Frysinger <[email protected]>
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Not everyone has a 24MHz clkin to the USB, so let board porters override.
Signed-off-by: Mike Frysinger <[email protected]>
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If NCE is hooked up to NCS3, we don't need to (and can't)
explicitly set the state of the NCE pin. Instead, the
controller asserts it automatically as part of a
command/data access. Only "CE don't care"-type NAND chips
can be used in this manner.
Signed-off-by: Michael Trimarchi <[email protected]>
Cc: Scott Wood <[email protected]>
Cc: Reinhard Meyer <[email protected]>
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This patch adds support for reading an ONFI page parameter from a NAND
device supporting it. If this is the case, struct nand_chip onfi_version
member contains the supported ONFI version, 0 otherwise.
This allows NAND drivers past nand_scan_ident to set the best timings for the
NAND chip.
Signed-off-by: Florian Fainelli <[email protected]>
Signed-off-by: Scott Wood <[email protected]>
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Poke the watchdog in a variety of looping constructs, which could take
a long time to complete.
Signed-off-by: Scott Wood <[email protected]>
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The P1011, P1012, P1015, P1016, P1020, P1021, P1024, & P1025 SoCs require
that we initialize the SERDES registers if the lanes are configured for
PCIe. Additionally these devices PCIe controller do not support ASPM
and we have to explicitly disable it.
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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The function find_sector() does not take into account if the flash bank
has changed since the last call. This could lead to illegal accesses inside
and beyond the flash_info_t info strcture. For example if the current
flash bank has less sectors than the last used flash bank.
This patch adds two cheks. One that insures, that the current sector does
not exceed the allowed maximum (which is always a good idea). And one that
checks if the current access is to the same flash bank as the last access.
If not, the search loop will start with sector 0.
Signed-off-by: Martin Krause <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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Signed-off-by: Wolfgang Denk <[email protected]>
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Blocksize was hardcoded to 512 bytes. But the blocksize varies
depeding on various mmc subsystem commands (between 8 and 512).
This hardcoding was resulting in interrupt error during data
transfer.
It is now calculated based upon the request sent by mmc subsystem.
Signed-off-by: Chander Kashyap <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Use get_timer() the same way as drivers/net/ftgmac100.c
Signed-off-by: Po-Yu Chuang <[email protected]>
Reviewed-by: Macpaul Lin <[email protected]>
Tested-by: Macpaul Lin <[email protected]>
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Signed-off-by: Po-Yu Chuang <[email protected]>
Reviewed-by: Macpaul Lin <[email protected]>
Tested-by: Macpaul Lin <[email protected]>
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SH7757 has ETHER and GETHER. This patch supports EHTER only.
Signed-off-by: Yoshihiro Shimoda <[email protected]>
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
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- Timeout counter value is set as DTOCV bits in SYSCTL register
For counter value set as timeout,
Timeout period = (2^(timeout + 13)) SD Clock cycles
- As per 4.6.2.2 section of SD Card specification v2.00, host should
cofigure timeout period value to minimum 0.25 sec.
- Number of SD Clock cycles for 0.25sec should be minimum
(SD Clock/sec * 0.25 sec) SD Clock cycles
= (mmc->tran_speed * 1/4) SD Clock cycles
- Calculating timeout based on
(2^(timeout + 13)) >= mmc->tran_speed * 1/4
Taking log2 both the sides and rounding up to next power of 2
=> timeout + 13 = log2(mmc->tran_speed/4) + 1
Signed-off-by: Priyanka Jain <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
Acked-by: Mingkai Hu <[email protected]>
Tested-by: Stefano Babic <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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We had an extra '0x' in the output of the LAWAR header that would cause
output like:
LAWBAR11: 0x00000000 LAWAR0x11: 0x80f0001d
intead of:
LAWBAR11: 0x00000000 LAWAR11: 0x80f0001d
Signed-off-by: Kumar Gala <[email protected]>
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This patch adds the Multiple Function Pin configuration support for
Marvell PANTHEON SoCs
Signed-off-by: Lei Wen <[email protected]>
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Signed-off-by: Lei Wen <[email protected]>
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Signed-off-by: Tom Warren <[email protected]>
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Add waiting for receiving Ethernet gadget state on the Windows host
side before dropping pullup, but keep it for debug.
Signed-off-by: Vitaly Kuzmichev <[email protected]>
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Port USB gadget RNDIS protocol support from linux-2.6.26
(.27 gadget stack actually has composite drivers).
Signed-off-by: Vitaly Kuzmichev <[email protected]>
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Signed-off-by: Vitaly Kuzmichev <[email protected]>
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Port struct net_device_stats and statistics collecting needed for
RNDIS protocol.
Signed-off-by: Vitaly Kuzmichev <[email protected]>
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Disconnecting USB gadget with pending interrupt may cause its wrong
handling in the next time when interface will be started again
(especially actual for RNDIS). This interrupt may force the gadget
to queue unexpected response before setup stage.
Despite the fact that such interrupt handled after dropped pullup
also may add pending response, this will not bring to any issues due to
usb_ep_disable (which clears the queue) called on gadget unregistering.
Signed-off-by: Vitaly Kuzmichev <[email protected]>
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Driver originally written by NVIDIA Corporation, modified to
handle odd-length packets.
Signed-off-by: Simon Glass <[email protected]>
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