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dev_read_addr does not return a void* but fdt_addr_t.
Replace invalid usage of dev_read_addr by dev_read_addr_ptr.
v2:
- Replace dev_read_addr by dev_read_addr_ptr
- Change error to EINVAL
Signed-off-by: Francois Berder <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Reviewed-by: Hal Feng <[email protected]>
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Use dev_remap_addr() to replace devfdt_remap_addr which supports both live
device tree and flat DT backends, avoiding direct dependency on
devfdt_* helpers.
No functional changes.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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devfdt_get_addr() returns FDT_ADDR_T_NONE(-1UL) when fail, using
"!priv->regs" to check return value is wrong.
Replace devfdt_read_addr() with dev_read_addr_ptr() when retrieving the
register base address.
dev_read_addr_ptr() supports both live device tree and flat DT backends,
avoiding direct dependency on devfdt_* helpers.
Also use "void __iomem *" to replace "phys_addr_t" to avoid type
casting.
No functional changes.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Replace devfdt_read_addr_size_index() with dev_read_addr_size_index() when
retrieving the register base address.
dev_read_addr_size_index() supports both live device tree and flat DT
backends, avoiding direct dependency on devfdt_* helpers.
No functional changes.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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The OcteonTX watchdog driver currently matches arm,sbsa-gwdt.
On systems with multiple watchdog devices this can be ambiguous since
arm,sbsa-gwdt is a generic SBSA binding.
Replace the SBSA match with SoC-specific Marvell compatibles
marvell,cn10624-wdt and marvell,cn9670-wdt.
These compatibles align with the upstream Linux device tree binding:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/watchdog/marvell,cn10624-wdt.yaml
Reviewed-by: Aaro Koskinen <[email protected]>
Signed-off-by: Juuso Rinta <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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The WOR register is 32 bits, so any tick count exceeding U32_MAX is
truncated by writel(). A large requested timeout can wrap to a small
value causing the watchdog to fire sooner than requested.
Clamp the calculated value to U32_MAX prior to writing the register so
over-large requests will be set to the maximum timeout value.
Found by code review.
Signed-off-by: Juuso Rinta <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Rockchip SoCs typically reset with all (or most) clocks ungated. Because
of this, U-Boot clock drivers for Rockchip typically do not implement
the optional clk-uclass enable/disable ops.
Normal driver model behavior is to return -ENOSYS when an uclass ops
is not implemented.
Ignore -ENOSYS to allow the designware watchdog driver to be probed on
platforms that do not implement the clk-uclass enable/disable ops, e.g.
Rockchip RK3308.
Signed-off-by: Jonas Karlman <[email protected]>
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As exposed by "make randconfig", we have an issue with the dependencies
for WDT_MAX6370. It needs to select both GPIO and DM_GPIO not just
DM_GPIO.
Signed-off-by: Tom Rini <[email protected]>
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Update the orion_wdt.c to support armada-xp and similar SoCs. The WDT
block used in armada-xp is fairly close to the armada-380 with just a
few differences that can be handled based on the compatible property.
Signed-off-by: Chris Packham <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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The original PolarFire SoC mailbox devicetree bindings described the
control/status and interrupt registers as standalone reg regions of the
mailbox device. This was incorrect, as these registers are shared system
control blocks and should instead be modeled as syscon devices.
Linux has since corrected this by introducing syscon-based bindings for
the MPFS mailbox and updating the mailbox driver to access the control
and interrupt registers via syscon/regmap. U-Boot, however, continued to
expect the legacy binding, causing mailbox access to fail when using
Linux-aligned devicetrees.
Update the U-Boot MPFS mailbox driver to support the new syscon-based
bindings by resolving the control and sysreg syscon nodes and accessing
the registers through regmap. Support for the legacy mailbox binding is
retained for backwards compatibility with existing firmware-provided
devicetrees.
This brings the U-Boot mailbox driver in line with the corrected hardware
description and matches the behavior of the Linux mailbox driver.
Signed-off-by: Jamie Gibbons <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
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Remove an unused and invalid struct mbox_chan pointer from the private
data and fix incorrect memory handling in the probe path, where the
private data structure was allocated.
This change corrects a functional bugs and cleans up the driver without
altering its behavior.
Fixes: 111e9bf6a5ac ("mailbox: add PolarFire SoC mailbox driver")
Signed-off-by: Jamie Gibbons <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
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The MPFS mailbox driver declares priv_auto but also allocates a second
private data structure in the legacy probe path and overwrites the
device’s private pointer using dev_set_priv().
This results in leaking the auto-allocated private data and replacing
the driver’s private state mid-probe, which is incorrect usage of the
U-Boot Driver Model and can lead to undefined behavior.
Remove the redundant allocation and dev_set_priv() call so that the
driver consistently uses the auto-allocated private data provided by
U-Boot.
Fixes: 111e9bf6a5ac ("mailbox: add PolarFire SoC mailbox driver")
Signed-off-by: Jamie Gibbons <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
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Correct the MMIO mapping size calculation, which
previously relied on an invalid start/end subtraction.
This change corrects a functional bug and cleans up the driver without
altering its behavior.
Fixes: 111e9bf6a5ac ("mailbox: add PolarFire SoC mailbox driver")
Signed-off-by: Jamie Gibbons <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
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Prepare v2026.07-rc4
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Enable the Rockchip reset controller driver in SPL to allow resetting
attached devices like UFS during early boot.
Reviewed-by: Jonas Karlman <[email protected]>
Signed-off-by: Alexey Charkov <[email protected]>
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The CLK_REF_USB3OTGx clocks are used as reference clocks for the two
DWC3 blocks.
Add simple support to get rate of CLK_REF_USB3OTGx clocks to fix
reference clock period configuration.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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The CLK_REF_USB3OTG clock is used as reference clock for the DWC3 block.
Add simple support to get rate of CLK_REF_USB3OTG clock to fix reference
clock period configuration.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Implement the rst_reset operation in the ZynqMP reset driver to use
PM_RESET_ACTION_PULSE. This allows the reset controller to perform
a reset pulse in a single firmware call instead of separate assert
and deassert calls.
This matches the Linux kernel implementation of zynqmp_reset_reset().
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/be77d6f1b60f591ef626c14229d85c5cab867967.1779709539.git.michal.simek@amd.com
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Use the new reset_reset_bulk() API to properly cycle reset signals
during probe instead of just deasserting them. This ensures the
controller is properly reset before initialization.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/92e614075d2c4820d3e4485aa0bdda11efd1f7ca.1779709539.git.michal.simek@amd.com
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Add a sandbox reset controller compatible string
"sandbox,reset-ctl-fallback-only" that reuses the existing sandbox assert,
deassert, request, and free helpers but omits rst_reset. That forces
reset_reset() through the core assert / udelay / deassert fallback.
Extend the reset-ctl-test DT node with a fifth reset line named "fallback"
that points at the new provider, and add dm_test_reset_reset_fallback_path
which verifies sandbox_reset_get_count() stays zero (rst_reset is never
invoked) while the line ends deasserted after reset_reset().
This complements the existing rst_reset coverage on sandbox,reset-ctl and
matches the approach of using a separate controller to exercise the
fallback path in unit tests.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/c1d40db6e2332a8b23ba842385b3f8c3d0290109.1779709539.git.michal.simek@amd.com
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Add DM test coverage for the new reset_reset() and reset_reset_bulk()
API functions.
The sandbox reset driver implements rst_reset so these tests exercise that
op (not the assert/udelay/deassert fallback in reset_reset()).
reset_reset_bulk() calls reset_reset() on each bulk entry in order, so each
line's rst_reset runs in sequence.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/be5411daf0de8eb64fbddf06e8ad82f50066e811.1779709539.git.michal.simek@amd.com
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Add reset_reset() and reset_reset_bulk() functions to the reset
controller API. These functions assert and then deassert reset signals
in a single call, providing a convenient way to pulse/toggle a reset
line.
This mimics the Linux kernel's reset_control_reset() and
reset_control_bulk_reset() APIs. The new functions are useful for
drivers that need to cycle a reset line during initialization or
error recovery but with also passing delay parameter.
If a driver implements the rst_reset op, it will be called directly
with the delay parameter. Otherwise, the reset core performs
reset_assert(), optional udelay(), and reset_deassert() as fallback.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/55ddd313c9e7b2d4dc79ab36bdd0040f871610f6.1779709539.git.michal.simek@amd.com
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Add zynqmp_pm_get_pmc_global_pggs_reg() to read PMC Global PGGS3
and PGGS4 registers via firmware IOCTL. Supports IOCTL_READ_PGGS
as the preferred path and falls back to IOCTL_READ_REG for older
PLM firmware versions that do not support IOCTL_READ_PGGS.
Signed-off-by: Padmarao Begari <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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%s/requird/required/
%s/current XHCI/currently XHCI/
Reviewed-by: Marek Vasut <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Heinrich Schuchardt <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/30357
- Several conversions to OF_UPSTREAM.
- Improvements for TQMa6UL boards.
- Add iMX8MP UltraLite Part CPU type.
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Signed-off-by: Alexander Feilke <[email protected]>
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Retrofit from upstream linux to try resetting the device after power loss.
Reviewed-by: Alexander Sverdlin <[email protected]>
Signed-off-by: Alexander Feilke <[email protected]>
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Use previously ignored quartz-load-femtofarads property from device tree
to set load capacitance. If missing, leave the device unconfigured
as a default might have been set. force_cap is left out for now but
can be retrofitted in the future as there may be different hardware
without the 12.500pF flag.
Reviewed-by: Alexander Sverdlin <[email protected]>
Signed-off-by: Alexander Feilke <[email protected]>
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Sync from upstream linux v6.19.
Reviewed-by: Alexander Sverdlin <[email protected]>
Signed-off-by: Alexander Feilke <[email protected]>
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Sync definitions from upstream linux v6.19.
Reviewed-by: Alexander Sverdlin <[email protected]>
Signed-off-by: Alexander Feilke <[email protected]>
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Supported devices:
- generic PCF85063 / PCF85063TP (no alarm regs)
- PCF85063A / PCF85073A (alarm regs)
Tested with TQMa8MPxL SOM from TQ-Systems GmbH.
Also add missing .data field to rv8263 which represents the number
of available registers (= linux `pcf85063_config.max_register + 1`).
Signed-off-by: Markus Niebel <[email protected]>
Reviewed-by: Alexander Sverdlin <[email protected]>
Signed-off-by: Alexander Feilke <[email protected]>
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The rtc_time documentation in rtc_def.h notes a differences
to the common "struct time" that specifies tm_mon as 1 ... 12
and tm_year as year since 0. Also trim register values to valid bits.
Fixes: 1c2a2253f798 ("drivers: rtc: add PCF85063 support")
Reviewed-by: Alexander Sverdlin <[email protected]>
Signed-off-by: Alexander Feilke <[email protected]>
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The mpidr's type is u32, however dev_read_addr returns a value with type
fdt_addr_t(phys_addr_t) which is 64bit long. So the check never fail.
This patch we still keep mpidr as u32 type, because i.MX8 only has max
two cluster, the higher 32bit will always be 0. Use a variable addr
to do the check, if check pass, assign the lower 32 bit to plat->mpidr.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
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iMX8MP UltraLite part is missed in the cpu type print
Signed-off-by: Ye Li <[email protected]>
Acked-by: Peng Fan <[email protected]>
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Introduce a sysinfo driver that can be instantiated from the device,
which will provide information from the EEPROM found on all TQ-Systems
SoMs.
Signed-off-by: Nora Schiffer <[email protected]>
Signed-off-by: Max Merchel <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Alexander Feilke <[email protected]>
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sysinfo_detect() is commonly called after sysinfo_get(). Make the API a
bit more convenient to use by introducing a helper.
Signed-off-by: Nora Schiffer <[email protected]>
Signed-off-by: Alexander Feilke <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Reference the struct itself for the size as it is more robust,
even if it contains just a bool at the moment.
Signed-off-by: Nora Schiffer <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Alexander Feilke <[email protected]>
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When commit 1d7993d1d0ef
("clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: v5.1.12)")
introduced the parts of Linux Common Clock Framework, it was done for i.MX6
only and even had "depends on SPL_CLK_IMX6Q" conditions. Since commit
ccab06689aa2 ("clk: imx: expose CCF entry for all") the framework can be
reused with SoCs of other vendors (say, TI), but NXP SoC-specific code is
still being build. It is especially problematic for size-constrained SPL
images on TI AM62x.
Make the build of the i.MX/RTxxxx code not only dependent on
CONFIG_$(PHASE_)CLK_CCF, but also on CONFIG_MACH_IMX options which shall
cover the i.MX platform users.
This saves 2264 bytes on 32-bit ARM platforms [using CCF].
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Alexander Sverdlin <[email protected]>
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iMX8MP added 4 new variant parts for low cost industrial and HMI.
The parts disabled HIFI DSP and ISP while other functions are enabled.
Part number:
- MIMX8ML2DVNLZAB and MIMX8ML2CVNKZAB (2-core)
- MIMX8ML5DVNLZAB and MIMX8ML5CVNKZAB (4-core)
Signed-off-by: Ye Li <[email protected]>
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Replace hardcoded WDOG_BASE_ADDR with driver model based dynamic address
lookup from device tree, allowing reset_cpu() to dynamically locate
watchdog devices from device tree.
This change also enables CONFIG_WDT for relevant boards and ensures the
watchdog nodes are available for driver model usage.
- Remove hardcoded WDOG_BASE_ADDR from hw_watchdog_* functions
- Reimplement reset_cpu() using UCLASS_WDT device iteration
- Add ulp_wdt_expire_now() callback for standard WDT interface
- Pass wdog register pointer to hw_watchdog_set_timeout()
- Enable CONFIG_WDT for boards using ULP watchdog
- Remove wdog3 status = "disabled" overrides from U-Boot device tree
overlays, as the watchdog device needs to be accessible for driver
model based reset functionality.
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Francesco Dolcini <[email protected]> # Toradex boards
Reviewed-by: Peng Fan <[email protected]>
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Should not use CONFIG_IMX_TMU to determine the print of CPU market
segment information. Only iMX8 platforms don't have segment fuse.
And there is no extended commercial part on iMX9 (91/93/94/95),
fix it to extended industrial.
Signed-off-by: Ye Li <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-ufs
- fix dcache invalidation range in identify command
- avoid deleting uncreated queues
- free prp_pool on nvme_init() failure paths
- Log I/O timeouts
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https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
Updates for RPi for 2026.07-rc4:
- pci: bcmstb: Support for bcm2712
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Fix-ups for the BCM root complex when it is located behind an AXI
bridge and clocked with 54MHz. Some are from kernel commit
377bced88c326, some where picked by Oleksii off a now-stale older
branch. All reworked for the simpler setup code in U-Boot.
Signed-off-by: Torsten Duwe <[email protected]>
Co-authored-by: Oleksii Moisieiev <[email protected]>
Tested-by: Pedro Falcato <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
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Rework the setup of inbound PCIe windows: use the convenience functions
from Linux kernel commit ae6476c6de187 to calculate the BAR offsets and
factor out the setup code into a separate function.
The Linux kernel first allocates and populates an array of inbound_win[]
and sets the BARs from it later, while U-Boot does it all on the fly,
in one go, so the code is not 1:1 comparable.
Signed-off-by: Torsten Duwe <[email protected]>
Tested-by: Pedro Falcato <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
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Fix inbound window size calculation, like Linux commit 25a98c7270156.
Signed-off-by: Torsten Duwe <[email protected]>
Tested-by: Pedro Falcato <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
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Check whether the device tree has nodes for the two reset controls and use
them if so.
Signed-off-by: Torsten Duwe <[email protected]>
Co-authored-by: Oleksii Moisieiev <[email protected]>
Tested-by: Pedro Falcato <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
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A driver for Broadcom rescal reset controllers ported from
linux/drivers/reset/reset-brcmstb-rescal.c to U-Boot.
Signed-off-by: Torsten Duwe <[email protected]>
Co-authored-by: Oleksii Moisieiev <[email protected]>
Tested-by: Pedro Falcato <[email protected]>
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A driver for Broadcom reset controllers ported from
linux/drivers/reset/reset-brcmstb.c to U-Boot.
Signed-off-by: Torsten Duwe <[email protected]>
Co-authored-by: Oleksii Moisieiev <[email protected]>
Tested-by: Pedro Falcato <[email protected]>
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The Linux kernel driver already had support for multiple hardware
variants when the bcm2712 was added (see e.g. linux commit
10dbedad3c818 which is the last in a longer set of changes). This
patch brings in this required infrastructure and adds a
differentiation between 2711 and 2712 register layouts on top.
Signed-off-by: Torsten Duwe <[email protected]>
Co-authored-by: Oleksii Moisieiev <[email protected]>
Tested-by: Pedro Falcato <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
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