| Age | Commit message (Collapse) | Author |
|---|
|
The ufshcd_read_string_desc() can perform out of bounds write and
corrupt heap in case the input utf-16 string contains code points
which convert to anything more than plain 7-bit ASCII string.
This occurs because utf16_to_utf8(dst, src, size) in U-Boot behaves
differently than Linux utf16s_to_utf8s(..., maxlen), but the porting
process did not take that into consideration. The U-Boot variant of
the function converts up to $size utf-16 fixed-length 16-bit input
characters into as many 1..4 Byte long variable-length utf-8 output
characters. That means for 16 Byte input, the output can be up to 64
Bytes long. The Linux variant converts up utf-16 input into up to
$maxlen Bytes worth of utf-8 output, but stops at the $maxlen limit.
That means for 16 Byte input with maxlen=32, the processing will stop
after writing 32 output Bytes.
In case of U-Boot, use of utf16_to_utf8() leads to potential corruption
of data past the $size Bytes and therefore corruption of surrounding
content on the heap.
The fix is as simple, allocate buffer that is sufficient to fit the
utf-8 string. The rest of the code in ufshcd_read_string_desc() does
correctly limit the buffer to fit into the DMA descriptor afterward.
Signed-off-by: Marek Vasut <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|
|
Assert Rockchip UFS controller resets during initialization and HCE
enable, as it is done by the Linux driver.
This is required to make some UFS chips, such as Foresee FEUDNN064G-C2G0,
work properly.
Note that the resets were already requested in the probe function, just
not used.
Signed-off-by: Alexey Charkov <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Neil Armstrong <[email protected]>
|
|
signed_hdmi_imx8m.bin is already signed and has a IVT header. It should not
be put in u-boot-spl-mkimage.signed.bin. Move it to head of flash.bin
following NXP imx-mkimage. Keeping it in u-boot-spl-mkimage.signed.bin also
consumes a lot of TCM space which is not expected.
While moving it to head of flash.bin, other changes are required,
u-boot.itb is put at sector 768 per defconfig, so u-boot.itb binman
offset should be updated and it should be moved out from binman section.
Also binman symbol address are updated, so need to subtract u-boot-spl
image_pos + CONFIG_SPL_TEXT_BASE to find the correct location of ddr phy
firmware.
Because there is 1KB padding in HDMI firmware, use 32KB when burning
flash.bin to sd card.
Signed-off-by: Peng Fan <[email protected]>
|
|
1. Add optional serdes-supply regulator property support.
2. Enable 10Gbps feature for the controller, configure netc blkctrl
CFG_LINK_PCS_PROT_2 to 10G SXGMII.
3. Add internal xpcs phy initialization to 10G XGMII Mode without
auto-negotiation interface.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
|
|
Current timeout for PHY out of reset is 50ms which is too short.
Increase it to 2s to align with kernel.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Acked-by: Tim Harvey <[email protected]>
|
|
The 'default' directive should be before 'help'.
Signed-off-by: Simona Toaca <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
|
|
The generated .S files for fonts and splash screens use .incbin with the
full prerequisite path. When building with O= this bakes an absolute
path into the .S file. If the build directory is later used on a
different machine (e.g. in a container), the assembler cannot find the
source file.
Follow the existing DTB convention: rename the object targets to use
compound suffixes (.ttf.o, .bmp.o), switch the pattern rules from
direct $(call cmd,...) to FORCE + $(call if_changed,...), and register
the new suffixes with intermediate_targets so that kbuild loads their
.cmd files. This lets if_changed detect when the recorded command
(including source paths) has changed and regenerate the .S file
automatically.
The EFI rule is left unchanged since its prerequisite is a generated
file in the build directory, like the DTB and DTBO rules.
The intermediate_targets entries stay in scripts/Makefile.build rather
than moving to scripts/Makefile.lib-u-boot, because that file is
included before intermediate_targets is defined and 'targets' is ':=',
so a '$(call intermediate_targets, ...)' inside it would expand to
empty and silently drop the entries. To keep the upstream block
untouched, the U-Boot additions go in a separate 'targets +=' block
immediately below.
Suggested-by: Rasmus Villemoes <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Rasmus Villemoes <[email protected]>
|
|
Casey Connolly <[email protected]> says:
This series implements various improvements to Linux header
compatibility, largely in preparation for a full port of Linux CCF but
many of these changes would also be helpful when porting other drivers.
Beside the basic header/compat stuff there are a few larger patches:
Patch 1 adds the "%pOF" format specifier to vsprintf, this behaves the
same as it does in Linux printing the name of the ofnode, but notably it
expects an ofnode pointer rather than a device_node.
Patch 2 adds an option to skip doing a full DM scan pre-relocation.
Some platforms like Qualcomm don't actually need devices to be probed
prior to relocation, it is also quite slow to scan the entire FDT before
caches are up. This option gets us to main loop 30-50% faster.
Unfortunately it isn't possible to totally skip DM since U-Boot will
panic if it can't find a serial port, but the serial uclass code will
bind the serial port itself by reading /chosen/stdout-path, however any
dependencies like clocks won't be found so this should only be enabled
if the serial driver gracefully handles missing clocks.
Patch 3 adds [k]strdup_const(), this works the same as the Linux version
saving a small amount of memory by avoiding duplicating strings stored
in .rodata, this is particularly useful for CCF.
Patch 4 adds 64-bit versions of some 32-bit ofnode utilities functions,
making it possible to parse 64-bit arrays.
Patch 6 provides a simple implementation of kref, this will be used
by CCF.
Patch 9 adds devm_krealloc() support to devres, it relies on storing
allocation sizes in the devres struct which will add a small overhead.
Link: https://lore.kernel.org/r/[email protected]
|
|
These are similar to their Linux counterparts, adding helpers
for reading arrays of 64-bit values with of_access and fdtdec
implementations.
Signed-off-by: Casey Connolly <[email protected]>
|
|
Add a new driver for the Mediatek XS-PHY. This is found on some newer
Mediatek SoCs.
Upstream devicetree bindings already exist. MAINTAINERS is already
covered by drivers/phy/phy-mtk-*.
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
|
|
Add some clocks required for UFS on MT8189 targets.
Reviewed-by: Macpaul Lin <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
|
|
Remove spurious blank line and trailing comma of the zero terminator at
the end of the devicetree compatible list.
Reviewed-by: Neil Armstrong <[email protected]>
Reviewed-by: Macpaul Lin <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
|
|
Add a new compatible match for mediatek,mt8183-ufshci.
This compatible is already defined in upstream devicetree bindings.
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
|
|
Add MT8195 compatible string.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
|
|
Implement clocking.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
|
|
Currently mphy is declared as a pointer inside ufs_mtk_host struct, but
it is never initialized.
Fix this by using a struct phy directly in ufs_mtk_host struct instead
of a struct phy*. Update all call to mphy accordingly.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
|
|
When priv_auto is specified, we should not manually alloc memory for
priv data.
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
|
|
Disable clocks in power_off(). Also define ufs_mtk_phy_set_inactive()
helper function to keep consistency with power_on() and
ufs_mtk_phy_set_active().
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
|
|
simply the driver by using clk_bulk functions
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
|
|
Use tabs instead of spaces to indent defines
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
|
|
Remove unneeded headers and sort them alphabetically
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Julien Stephan <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
|
|
The clk_ops structures (mtk_clk_apmixedsys_ops, mtk_clk_topckgen_ops,
mtk_clk_infrasys_ops) are already declared with extern in clk-mtk.h,
which is included by this file. The forward declarations in clk-mtk.c
are therefore redundant and can be removed.
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
Link: https://patch.msgid.link/e9c95470374cb78254dacfe1d657a26f2f908981.1776326933.git.weijie.gao@mediatek.com
Signed-off-by: David Lechner <[email protected]>
|
|
Add grandparent device variable in mtk_find_parent_rate() to allow
the grandparent device being reused instead of calling
dev_get_parent(priv->parent) multiple times.
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
Link: https://patch.msgid.link/726ccc71593f6c224c13142a0bd4a9f6f0f81445.1776326933.git.weijie.gao@mediatek.com
Signed-off-by: David Lechner <[email protected]>
|
|
The refactoring in commit 00d0ff7f81bf ("clk: mediatek: refactor parent
rate lookup functions") introduced a regression where fixed PLL clocks
using mtk_clk_fixed_pll_ops are not properly recognized as valid parents
in the CLK_PARENT_APMIXED case.
Fixed PLL clocks are implemented using mtk_clk_fixed_pll_ops instead of
mtk_clk_apmixedsys_ops, but they can also serve as parent clocks in the
APMIXED domain. The parent lookup function needs to check for both
driver ops to properly resolve the parent clock device.
Add mtk_clk_fixed_pll_ops checks alongside mtk_clk_apmixedsys_ops checks
in mtk_find_parent_rate() to restore support for fixed PLL parent clocks.
Fixes: 00d0ff7f81bf ("clk: mediatek: refactor parent rate lookup functions")
Signed-off-by: Sam Shih <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
Link: https://patch.msgid.link/923e50db696d910803828cd26b0ca0fbbfe11570.1776326933.git.weijie.gao@mediatek.com
Signed-off-by: David Lechner <[email protected]>
|
|
This patch fixes mt7981 pin register offsets and field definitions.
Signed-off-by: Weijie Gao <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
|
|
- dwc3 memory leak fixes
|
|
In dwc3_free_one_event_buffer(), only the DMA buffer (evt->buf) was
being freed via dma_free_coherent(), but the evt structure itself was
never explicitly freed, causing a memory leak.
In dwc3_free_event_buffers(), the ev_buffs pointer array allocated
with memalign() was never freed after iterating and releasing all
individual event buffers, causing another memory leak.
Fix both leaks by freeing the evt struct in
dwc3_free_one_event_buffer() and freeing dwc->ev_buffs in
dwc3_free_event_buffers() after all entries have been released.
Signed-off-by: Gurumoorthy Santhakumar <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
|
|
Add some capability flags for mx25u12835f.
In particular, we are interested in using the lock feature. According to
the datasheet, dual/quad read is also supported.
Signed-off-by: David Lechner <[email protected]>
|
|
The SPI_FLASH_SST functionality is a subset of SPI_FLASH_LOCK today, so
express this dependency in Kconfig.
Signed-off-by: Tom Rini <[email protected]>
|
|
Add is25wx128 and is25lx128 ISSI chips to
spi-nor id table.
Both chips have a size of 16MB but is25wx128
is the 1.8V version and is25lx128 is the 3v
version.
Signed-off-by: Flaviu Nistor <[email protected]>
|
|
Add a new entry for the IS25WP01GG SPI NOR flash (ID 0x9d7021,
64KB sectors, 2KB page size) with 4K sectors, dual and quad read
support. This flash is used and tested on N5X boards.
Datasheet :
https://www.issi.com/WW/pdf/25LP-WP01GG.pdf
Signed-off-by: Chen Huei Lok <[email protected]>
|
|
Add gd25lx128j GIGADEVICE chip to spi-nor id table.
Signed-off-by: Flaviu Nistor <[email protected]>
|
|
Add JEDEC ID table entries for additional ISSI SPI-NOR devices.
These parts previously not yet supported.
With these entries, U-Boot can match the device by JEDEC ID
and use the existing ISSI SPI-NOR device handling.
Newly added devices include:
- IS25LP512MJ (JEDEC 0x9d6020)
https://www.issi.com/WW/pdf/25LP-WP512MJ.pdf
- IS25WP512MJ (JEDEC 0x9d7020)
https://www.issi.com/WW/pdf/25LP-WP512MJ.pdf
- IS25LP010E (JEDEC 0x9d4011)
https://www.issi.com/WW/pdf/25LP-WP040E-020E-010E-512E-025E.pdf
- IS25LP020E (JEDEC 0x9d4012)
https://www.issi.com/WW/pdf/25LP-WP040E-020E-010E-512E-025E.pdf
- IS25LP040E (JEDEC 0x9d4013)
https://www.issi.com/WW/pdf/25LP-WP040E-020E-010E-512E-025E.pdf
- IS25LP01GJ (JEDEC 0x9d6021)
https://www.issi.com/WW/pdf/25LP-WP01GJ.pdf
- IS25LP02GG (JEDEC 0x9d6022)
https://www.issi.com/WW/pdf/25LP-WP02GG.pdf
- IS25LP02GJ (JEDEC 0x9d6022)
https://www.issi.com/WW/pdf/25LP-WP02GJ.pdf
- IS25WP01GG (JEDEC 0x9d7021)
https://www.issi.com/WW/pdf/25LP-WP01GG.pdf
- IS25WP01GJ (JEDEC 0x9d7021)
https://www.issi.com/WW/pdf/25LP-WP01GJ.pdf
- IS25WJ128F (JEDEC 0x9d7118)
https://www.issi.com/WW/pdf/25WJ128F.pdf
- IS25WP02GG (JEDEC 0x9d7022)
https://www.issi.com/WW/pdf/25LP-WP02GG.pdf
- IS25WP02GJ (JEDEC 0x9d7022)
https://www.issi.com/WW/pdf/25LP-WP02GJ.pdf
Signed-off-by: jeffrey yu <[email protected]>
[trini: Fix spacing issues]
Signed-off-by: Tom Rini <[email protected]>
|
|
Enable automatic allocation of platform data for the Cadence XSPI
controller by setting .plat_auto.
Without this, dev_get_plat() may return invalid or uninitialized
platform data when multiple XSPI controllers are present, leading
to incorrect IOBASE/SDMABASE/AUXBASE values and causing SPI flash
probe failures.
Setting .plat_auto ensures each controller instance receives a
properly sized cdns_xspi_plat structure, allowing SF probe to work
correctly.
Tested on an Altera Simics platform with multiple XSPI controllers.
Signed-off-by: Chen Huei Lok <[email protected]>
|
|
Add support for dosilicon ds25m4cb, ds25m4dn, ds25q4cb, ds25q4dn
Datasheets:
ds25m4cb:
https://www.dosilicon.com/resources/SPI%20NOR/DS25M4CB-XXXXX_Rev04.pdf
ds25m4dn:
https://www.dosilicon.com/resources/SPI%20NOR/DS25M4DN-XXXXX_Rev03.pdf
ds25q4cb:
https://www.dosilicon.com/resources/SPI%20NOR/DS25Q4CB-XXXXX_Rev03.pdf
ds25q4dn:
https://www.dosilicon.com/resources/SPI%20NOR/DS25Q4DN-XXXXX_Rev01.pdf
Signed-off-by: Ssunk <[email protected]>
[trini: Adjust spacing]
Signed-off-by: Tom Rini <[email protected]>
|
|
Add support for XMC XM25QH01D SPI NOR flash.
Datasheet: https://www.xmcwh.com/uploads/958/XM25QH01D_Ver1.0.pdf
Link: https://lore.kernel.org/u-boot/[email protected]/
|
|
Add JEDEC IDs for Puyasemi PY25F512HB, PY25F01GHB, PY25F512LC,
and PY25F01GLC flash parts.
Datasheets:
PY25F512HB:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash%20%E8%8A%AF%E7%89%87/PY25F512HB_Datasheet_V1.2.pdf
PY25F01GHB:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F01GHB_Datasheet_V1.1.pdf
PY25F512LC:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash/PY25F512LC_Datasheet_V1.3.pdf
PY25F01GLC:
https://www.puyasemi.com/download_path/%E6%95%B0%E6%8D%AE%E6%89%8B%E5%86%8C/Flash%20%E8%8A%AF%E7%89%87/PY25F01GLC_Datasheet_V1.0.pdf
Reviewed-by: Anshul Dalal <[email protected]>
Signed-off-by: Ssunk <[email protected]>
|
|
This series from Daniel Palmer <[email protected]> improves debug UART
support on QEMU on M68K by adding debug uart support to the serial
driver.
Link: https://lore.kernel.org/r/[email protected]
|
|
Add debug support for the goldfish tty so it can be used for
early debugging. This will be really useful when adding support
for relocation to the m68k qemu virt machine.
Signed-off-by: Daniel Palmer <[email protected]>
Reviewed-by: Kuan-Wei Chiu <[email protected]>
Tested-by: Kuan-Wei Chiu <[email protected]>
|
|
The current code sets RV3028_STATUS_PORF instead of clearing it, so the
flag remains asserted. Use dm_i2c_reg_clrset() to clear the bit.
Signed-off-by: Javier Viguera <[email protected]>
|
|
Assorted fixes and tweaks, HUSH parser, preboot env variable, SMC
command enablement, s_init and 32bit/64bit code clean up, DBSC and APMU
remoteproc clean ups, UFS dev_phys_to_bus() remap support and SCIF R-Car
Gen5 support.
|
|
https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/29808
- Add env variables to assist boot for various LS boards
- Add gpio scmi driver
- Fix setting the function for scmi pinctrl
- Use standard device tree pin muxing format for scmi pinctrl
- Fix protocol version fetch for non-CCF platforms in scmi clk
|
|
The process through which the MC firmware parses the DPL and initializes
all the requested DPAA2 objects is a complex one which can take quite a
bit of time. For the those circumstances in which a fast boot is
required on DPAA2 based SoCs, add the 'nowait' optional parameter for
the fsl_mc [lazy]apply dpl command.
When this option is used, the Linux kernel fsl-mc bus must wait for
the firmware to finish parsing the DPL before proceeding with probing
all the DPAA2 objects.
Signed-off-by: Ioana Ciornei <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
|
|
All the parameters that can be currently passed to the fsl_mc command
are positional arguments which are mandatory. This is not perfectly
clear when reading the help text because of the use of square brackets.
Fix this by changing the square brackets, which are commonly used for
optional parameters, with < .. >.
Signed-off-by: Ioana Ciornei <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
|
|
The first parameter of the wait_for_mc() function - booting_mc - is not
used. Remove it.
Signed-off-by: Ioana Ciornei <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
|
|
In the original code, I wrote a custom pin muxing parser but the
upstream device trees wouldn't accept something like that so it would
have complicated mergine the device tree files.
Use the standard device tree format with function and groups:
pinmux1: pinmux1 {
function = "f_gpio1";
groups = "grp_1", "grp_3";
};
Signed-off-by: Dan Carpenter <[email protected]>
Acked-by: Linus Walleij <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
|
|
Set BIT(10) when the function needs to be set, otherwise the setting is
ignored.
Fixes: 0cb160f1b629 ("scmi: pinctrl: add pinctrl driver for SCMI")
Signed-off-by: Dan Carpenter <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
|
|
This provides GPIO support over SCMI. It is built on top of the
pinctrl-scmi driver. A typical device tree entry might look like
this:
gpio1 {
compatible = "scmi-pinctrl-gpio";
gpio-controller;
#gpio-cells = <2>;
ngpios = <10>;
gpio-ranges = <&scmi_pinctrl 0 8 4>,
<&scmi_pinctrl 4 12 1>,
<&scmi_pinctrl 5 15 1>,
<&scmi_pinctrl 6 17 4>;
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
};
In this GPIO driver the one thing which is different is that in the
gpio-ranges the first numbers which represent how the pins are exposed
to the users have to start at zero and it can't have gaps.
Signed-off-by: Dan Carpenter <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
|
|
The SCMI clock protocol version was only being fetched when CLK_CCF
was enabled. On non-CCF platforms, the probe function returned early
without fetching the version, leaving priv->version as 0.
This caused issues because code paths like scmi_clk_gate() and
scmi_clk_get_permissions() depend on priv->version to determine
which protocol message format to use, even in non-CCF mode.
Fix this by moving the scmi_generic_protocol_version() call before
the CLK_CCF check, ensuring the version is fetched for both CCF and
non-CCF platforms.
Tested on am62lx_evm.
Fixes: ae7e0330ce22 ("clk: scmi: add compatibility with clock protocol 2.0")
Signed-off-by: Kamlesh Gurudasani <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
|
|
Use dev_phys_to_bus() to convert CPU addresses of DMA descriptors
into bus addresses of DMA descriptors. This is necessary on hardware
which does not have 1:1 mapping between CPU and memory addressed by
the DMA. This has no impact on other hardware which does not need
this conversion.
Signed-off-by: Marek Vasut <[email protected]>
|
