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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20230525
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- i.MX93 series
- Fixes
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16412
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Add trivial driver for the MXS AUART IP. This is the other UART IP
present in i.MX23 and i.MX28, used to drive the non-DUART ports.
Signed-off-by: Marek Vasut <[email protected]>
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The rank setting flow should be updated to support multi
fsp config.
Signed-off-by: Jacky Bai <[email protected]>
Reviewed-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Update the DDR init flow for multi-setpoint support on i.MX93. A new
fsp_cfg struct need to be added in the timing file to store the diff
part of the DDRC and DRAM MR register for each setpoint.
Signed-off-by: Jacky Bai <[email protected]>
Reviewed-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Add 625M bypass clock that may be used DRAM 625M
bypass mode support.
Signed-off-by: Jacky Bai <[email protected]>
Reviewed-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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change the ddr saved info to the last 16KB of the OCRAM.
Signed-off-by: Jacky Bai <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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According to DDRPHY errata, the Rank-to-Rank Spacing and tphy_rdcsgap
specification does not include the Critical Delay Difference (CDD) to
properly define the required rank-to-rank read command spacing after
executing PHY training firmware.
Following the errata workaround, at the end of data training, we get
all CDD values through the MessageBlock, then re-configure the DDRC
timing of WWT/WRT/RRT/RWT with comparing MAX CDD values.
Signed-off-by: Ye Li <[email protected]>
Acked-by: Peng Fan <[email protected]>
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According to datasheet, iMX93 has fused parts with CORE1 or NPU or
both disabled. So update code to support it, the kernel device tree
runtime update will be added in future patches.
Signed-off-by: Peng Fan <[email protected]>
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There will be build error if CONFIG_SYSRESET is enabled, so guard
the reset_cpu with condition check here
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Support print out cpu grade temperature
Signed-off-by: Peng Fan <[email protected]>
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Use CONFIG_DM_THERMAL to make the temperature function could be reused
by i.MX8 and i.MX9
Signed-off-by: Peng Fan <[email protected]>
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Add CPU_IMX Kconfig
Support imx8_cpu driver for i.MX9
Signed-off-by: Peng Fan <[email protected]>
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For local functions, use static for function.
Signed-off-by: Peng Fan <[email protected]>
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Move imx8 sci header file to include/firmware/imx, then we could
use build macro to reuse some i.MX8 drivers for i.MX9, such as
drivers/cpu/imx8_cpu.c.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Stefano Babic <[email protected]>
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The TMU used on iMX93 is IP revision 2.1 which is different with previous
revision used on iMX8MQ. So add a new FLAG V4 for this revision to
distinguish the operations.
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Stop polluting the architecture directory with driver specific code,
move it into driver where it should be. Split the code slightly so
the MX8MM/MX8MN fuse readout and programming and MX8MP fuse readout
and programming are in their separate functions, and called in case
of matching SoC.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Reviewed-by: Andrejs Cainikovs <[email protected]>
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Use dev_(dev, ...) for all printing and debug logging, since this
already includes the device name. Drop device name where duplicate.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Reviewed-by: Andrejs Cainikovs <[email protected]>
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into next
- USB and SPL related Kconfig clean-up / re-organization
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Use the same prop as linux to control the use of fifo or dma mode. Also
add a u-boot,spl-sfc-no-dma prop to control the same in SPL.
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Loading part of TF-A into SRAM from eMMC using DMA fails on RK3399
similar to other Rockchip SoCs. Checksum validation fails with:
## Checking hash(es) for Image atf-2 ... sha256 error!
Bad hash value for 'hash' hash node in 'atf-2' image node
spl_load_simple_fit: can't load image loadables index 1 (ret = -1)
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Add a device tree property, u-boot,spl-fifo-mode, to control when the
rockchip_sdhci driver should disable the use of DMA and fallback on PIO
mode. Same device tree property is used by the rockchip_dw_mmc driver.
In commit 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") the DMA mode was disabled using a CONFIG
option on RK3588. Revert that and instead disable DMA using the device
tree property for all RK3588 boards, also apply similar workaround for
all RK3399 boards.
Fixes: 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks read in a single command")
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Tested-by: Quentin Schulz <[email protected]> # RK3399 Puma, RK3588 Tiger
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The workaround to limit number of blocks to read in a single command
should only be applied to RK3568 and RK3588. Change to be more strict
when to apply the workaround.
Fixes: 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks read in a single command")
Suggested-by: Simon Glass <[email protected]>
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Tested-by: Quentin Schulz <[email protected]> # RK3399 Puma, RK3588 Tiger
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Add support for rk3588 phy variant.
The PHY clock is fixed at 100MHz.
Signed-off-by: Jon Lin <[email protected]>
[[email protected]: update pcie pll parameters]
Co-developed-by: Kever Yang <[email protected]>
Signed-off-by: Kever Yang <[email protected]>
[[email protected]: squashed, tidy up]
Signed-off-by: Eugen Hristev <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Some variants of the PHY have more than just one reset.
To cover all cases, request the rests in bulk rather than just
the reset at index 0.
Co-developed-by: Ren Jianing <[email protected]>
Signed-off-by: Ren Jianing <[email protected]>
Signed-off-by: Eugen Hristev <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add support for max_link_speed specified in the PCI DT binding.
Signed-off-by: Jon Lin <[email protected]>
[[email protected]: port to latest API, set default correctly,
align to 80 chars]
Signed-off-by: Eugen Hristev <[email protected]>
[[email protected]: switch to dev_read_u32_default]
Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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Add compatible for RK3588 SoC.
Signed-off-by: Jon Lin <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
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The current DT bindings for the rk3588 clock use a different ID than the
one that is supposed to be written to the hardware registers.
Thus, we cannot use directly the id provided in the phandle, but rather
use a lookup table to correctly setup the hardware.
This approach has been implemented already in Linux, by commit :
f1c506d152ff ("clk: rockchip: add clock controller for the RK3588")
Hence, implement a similar approach using the lookup table, and adapt
the existing reset driver to work with SoCs using lookup table.
The file rst-rk3588.c has been copied as much as possible from Linux.
Adapt the clk rk3588 driver as well to bind the reset driver with the
lookup table.
Reviewed-by: Kever Yang <[email protected]>
Signed-off-by: Eugen Hristev <[email protected]>
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Reviewed-by: Kever Yang <[email protected]>
Fixes: 226fce6108fe ("phy: Track power-on and init counts in uclass")
Signed-off-by: Jonas Karlman <[email protected]>
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Add initial support for the rk3588 PHY variant.
The lookup for the host-port reg inside the struct now does a do {} while()
instead of a while() {} in order to allow a first check for reg == 0.
Reviewed-by: Kever Yang <[email protected]>
Co-developed-by: Frank Wang <[email protected]>
Signed-off-by: Frank Wang <[email protected]>
Signed-off-by: Eugen Hristev <[email protected]>
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phy-supply is now handled at uclass level. Remove it from the drivers that
implement it at the driver level.
Acked-by: Neil Armstrong <[email protected]>
Suggested-by: Jonas Karlman <[email protected]>
Signed-off-by: Eugen Hristev <[email protected]>
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Some phys require a phy-supply property that is a phandle to a regulator
that needs to be enabled for phy operations.
Implement basic supply lookup, enable and disabling, if DM_REGULATOR is
available.
Reviewed-by: Kever Yang <[email protected]>
[[email protected]:
use regulator_set_enable_if_allowed and disable if power_on ops fails]
Signed-off-by: Jonas Karlman <[email protected]>
Signed-off-by: Eugen Hristev <[email protected]>
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Define SPL_USB_ETH_RNDIS symbol to make it possible to select USB
gadget ethernet support in SPL and U-Boot separately in Kconfig .
Make use of the new symbols in gadget Makefile and move the rndis.o
just below the now merged USB_ETHER symbol in Makefile.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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To avoid piling up all the various Kconfig symbols in one place, i.e.
common/spl/Kconfig, move the USB Kconfig symbols into drivers/usb/ .
This commit moves SPL_USB_GADGET and related symbols. Fix typo and
rename SPL_USB_GADGET to "USB Gadget Support in SPL" .
Update the gadget Makefile to match the symbol changes.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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To avoid piling up all the various Kconfig symbols in one place, i.e.
common/spl/Kconfig, move the USB Kconfig symbols into drivers/usb/ .
This commit moves SPL_USB_STORAGE and matching SYS_USB_FAT_BOOT_PARTITION .
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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To avoid piling up all the various Kconfig symbols in one place, i.e.
common/spl/Kconfig, move the USB Kconfig symbols into drivers/usb/ .
This commit moves SPL_USB_HOST and updates help text of both USB_HOST
and SPL_USB_HOST .
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Remove identify wrapper functions.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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- Merge in a long-standing fix for some exynos platforms, correct a
Kconfig description, fix some env issues, fix an issue in
devfdt_get_addr_size_index_ptr and look for "panel-timings" not
"panel-timing" per upstream binding.
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https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2023.07-rc3
.mailmap
- Fix Xilinx IDs
ZynqMP:
- Fix R5 split boot mode
- DT fixes - sync with Linux
Xilinx:
- Enable virtio and RNG support
- Enable ADI ethernet phy
SPI/Zynq:
- Fix dummy byte calculation
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For the devfdt_get_addr_size_index_ptr() function use
map_sysmem() function as cast for the return for use in
sandbox.
Signed-off-by: Johan Jonker <[email protected]>
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In case where a single timing resolution is implemented in the
device-tree, the property is named "panel-timing", as specify
in Linux kernel binding file:
Documentation/devicetree/bindings/display/panel/panel-common.yaml
# Display Timings
panel-timing:
description:
Most display panels are restricted to a single resolution and
require specific display timings. The panel-timing subnode expresses those
timings.
$ref: panel-timing.yaml#
display-timings:
description:
Some display panels support several resolutions with different timings.
The display-timings bindings supports specifying several timings and
optionally specifying which is the native mode.
$ref: display-timings.yaml#
Fixes: 0347cc773270 ("drivers: core: ofnode: Add panel timing decode.")
Signed-off-by: Raphael Gallais-Pou <[email protected]>
Signed-off-by: Patrick Delaunay <[email protected]>
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This reverts commit a034ec06ff1d558bbe11d5ee05edbb4de3ee2215.
Commit 4a3ea75de4c5 ("Revert "mmc: sdhci: set to INT_DATA_END when
there are data"") reverted the alternative fix that was added for
Exynos 4 devices, causing an error when trying to boot from an sdcard:
<...>
Loading Environment from MMC... sdhci_send_command: Timeout for status update!
mmc fail to send stop cmd
<...>
Re-add the quirk to allow booting from sdcards again.
Signed-off-by: Henrik Grimler <[email protected]>
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Make it clear that this is the SPL option to avoid potential confusion
when the description for CONFIG_SPL_VIDEO is the same as that for
CONFIG_VIDEO.
Signed-off-by: John Keeping <[email protected]>
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- cfi: respect reg address length (Nuno)
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flash_get_size() will get the flash size from the device itself and go
through all erase regions to read protection status. However, the device
mappable region (eg: devicetree reg property) might be lower than the
device full size which means that the above cycle will result in a data
bus exception. This change fixes it by reading the 'addr_size' during
probe() and also use that as one possible upper limit.
Signed-off-by: Nuno Sá <[email protected]>
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This reverts commit e09784728689de7949d4cdd559a9590e0bfcc702. The
commit wrongly divides the dummy bytes by dummy bus width to calculate
the dummy bytes. The framework already converts the dummy cycles to the
number of bytes and the controller use the SPI flash command to
determine the dummy cycles via the address width.
Signed-off-by: Stefan Herbrechtsmeier <[email protected]>
Acked-by: Ashok Reddy Soma <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-sh
- R-Car RZN1 support
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This causes crashes on some boards, e.g. rockpro64. In any case, we
should not do it.
Check the usb_started flag to avoid this.
Signed-off-by: Simon Glass <[email protected]>
Tested-by: Jonas Karlman <[email protected]>
Tested-by: Tom Rini <[email protected]>
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This should be declared in a header file so that type-checking works
correctly.
Add a single declaration to usb.h and remove the others.
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Add support for Schneider Electric RZ/N1D and RZ/N1S boards, which
are based on the Reneasas RZ/N1 SoC devices.
The intention is to support both boards using a single defconfig, and to
handle the differences at runtime.
Signed-off-by: Ralph Siemsen <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Driver for Cadence EDAC DDR controller, as found in the Renesas RZ/N1.
Signed-off-by: Ralph Siemsen <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Pinctrl/pinconf driver for Renesas RZ/N1 (R906G032) SoC.
This is quite rudimentary right now, and only supports applying a
default pin configuration as specified by the device tree.
Signed-off-by: Ralph Siemsen <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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