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2023-06-10net: sh_eth: Drop reset GPIO handling in favor of common codeMarek Vasut
The common code is now capable of handling reset GPIO associated with PHY. Drop the local ad-hoc code in favor of common code. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2023-06-10net: ravb: Drop reset GPIO handling in favor of common codeMarek Vasut
The common code is now capable of handling reset GPIO associated with PHY. Drop the local ad-hoc code in favor of common code. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2023-06-10net: phy: Handle reset-delay-us/reset-post-delay-us propertiesMarek Vasut
These two properties are used by various DTs in place of current reset-assert-us/reset-deassert-us , handle both . Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2023-06-10net: phy: Bind ETH_PHY uclass driver to each new PHYMarek Vasut
In case a new PHY is created and DM_ETH_PHY is enabled, bind a generic PHY driver from ETH_PHY uclass to the PHY to have a matching DM representation of that PHY. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2023-06-10net: phy: Unpublish phy_connect_dev()Marek Vasut
The phy_connect_dev() is legacy API, now that there are no users, make it internal to phy.c and unpublish it from headers. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2023-06-10net: sunxi_emac: Switch to new U-Boot PHY APIMarek Vasut
Use new U-Boot phy_connect() API which also supports fixed PHYs. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2023-06-10net: sh_eth: Switch to new U-Boot PHY APIMarek Vasut
Use new U-Boot phy_connect() API which also supports fixed PHYs. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2023-06-10net: pch_gbe: Switch to new U-Boot PHY APIMarek Vasut
Use new U-Boot phy_connect() API which also supports fixed PHYs. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2023-06-10net: ethoc: Switch to new U-Boot PHY APIMarek Vasut
Use new U-Boot phy_connect() API which also supports fixed PHYs. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2023-06-10net: ave: Switch to new U-Boot PHY APIMarek Vasut
Use new U-Boot phy_connect() API which also supports fixed PHYs. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2023-06-10net: altera_tsa: Switch to new U-Boot PHY APIMarek Vasut
Use new U-Boot phy_connect() API which also supports fixed PHYs. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2023-06-10net: eth-phy: staticize eth_phy_reset()Marek Vasut
The eth_phy_reset() is not used outside of this file, staticize it. No functional change. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2023-06-10mtd: spi: renesas: Add 4 bytes address mode supportCong Dang
This patch adds 4-byte address mode support. Because traditional access based on FIFO/shift register, it's complex to specify information like opcode, address length, dummy bytes etc to flash. Replace the traditional access by spi-mem layer which is essential to make 4-byte address mode support possible. Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Cong Dang <[email protected]> Signed-off-by: Hai Pham <[email protected]> Signed-off-by: Marek Vasut <[email protected]>
2023-06-10mtd: spi: renesas: Add R-Car Gen4 supportHai Pham
Support RPC SPI on R-Car Gen4 R8A779F0 S4 and R8A779G0 V4H SoCs. Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Hai Pham <[email protected]> Signed-off-by: Marek Vasut <[email protected]> [Marek: Squash S4 and V4H patches, fix brackets around STRTIM2]
2023-06-10mtd: spi: renesas: Enable SPI_FLASH_SFDP_SUPPORTHai Pham
Enable support for parsing and auto discovery of parameters for SPI NOR flashes using Serial Flash Discoverable Parameters (SFDP) tables as per JESD216 standard. Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Hai Pham <[email protected]> Signed-off-by: Cong Dang <[email protected]> Signed-off-by: Marek Vasut <[email protected]> # Make SFDP the default unconditionally
2023-06-10mtd: spi: renesas: Extract strobe delay setting code into separate functionHai Pham
Move strobe delay setting code into extra function and reflect the latest setting in datasheet (R-Car Gen3 v2.20, R-Car V3U v0.50). i.e. STRTIM[2:0] should be set to 110 (RCar M3-W) or 111 (Other products) This is also a preparation for new R-Car Gen4 SoC which has 4-bits STRTIM Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Hai Pham <[email protected]> Signed-off-by: Marek Vasut <[email protected]> # Fix for RZ/A1
2023-06-09FWU: Add FWU metadata access driver for MTD storage regionsMasami Hiramatsu
In the FWU Multi Bank Update feature, the information about the updatable images is stored as part of the metadata, on a separate region. Add a driver for reading from and writing to the metadata when the updatable images and the metadata are stored on a raw MTD region. The code is divided into core under drivers/fwu-mdata/ and some helper functions clubbed together under lib/fwu_updates/ Signed-off-by: Masami Hiramatsu <[email protected]> Signed-off-by: Jassi Brar <[email protected]>
2023-06-09fwu: meta-data: switch to management by common codeJassi Brar
The common code can now read, verify and fix meta-data copies while exposing one consistent structure to users. Only the .read_mdata() and .write_mdata() callbacks of fwu_mdata_ops are needed. Get rid of .get_mdata() .update_mdata() .get_mdata_part_num() .read_mdata_partition() and .write_mdata_partition() and also the corresponding wrapper functions. Signed-off-by: Jassi Brar <[email protected]> Reviewed-by: Etienne Carriere <[email protected]> Reviewed-by: Ilias Apalodimas <[email protected]> Tested-by: Sughosh Ganu <[email protected]>
2023-06-09fwu: gpt: implement read_mdata and write_mdata callbacksJassi Brar
Moving towards using common code for meta-data management, implement the read/write mdata hooks. Signed-off-by: Jassi Brar <[email protected]> Reviewed-by: Etienne Carriere <[email protected]> Reviewed-by: Ilias Apalodimas <[email protected]> Tested-by: Sughosh Ganu <[email protected]>
2023-06-09fwu: move meta-data management in coreJassi Brar
Instead of each i/f having to implement their own meta-data verification and storage, move the logic in common code. This simplifies the i/f code much simpler and compact. Signed-off-by: Jassi Brar <[email protected]> Reviewed-by: Ilias Apalodimas <[email protected]> Tested-by: Sughosh Ganu <[email protected]>
2023-06-09fwu: gpt: use cached meta-data partition numbersJassi Brar
Use cached values and avoid parsing and scanning through partitions everytime for meta-data partitions because they can't change after bootup. Acked-by: Etienne Carriere <[email protected]> Reviewed-by: Ilias Apalodimas <[email protected]> Signed-off-by: Jassi Brar <[email protected]> Tested-by: Sughosh Ganu <[email protected]>
2023-06-08Merge https://source.denx.de/u-boot/custodians/u-boot-usbTom Rini
2023-06-08pinctrl: renesas: r8a779a0: Remove incorrect AVB[01] pinmux configurationHai Pham
AVB[01]_{MAGIC,MDC,MDIO,TXCREFCLK} are registered as both PINMUX_SINGLE(fn) and PINMUX_IPSR_GPSR(fn) in the pinmux_data array. The latter are correct, hence remove the former. Without this fix, the Ethernet PHY is not operational on the MDIO bus. Ported from Linux kernel commit a145c9a8674ac8fbfa1595276e1b6cbfc5139038 . Signed-off-by: Hai Pham <[email protected]> Signed-off-by: LUU HOAI <[email protected]> Fixes: 741a7370fc3b8b54 ("pinctrl: renesas: Initial R8A779A0 (V3U) PFC support") Signed-off-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/6fd217b71e83ba9a8157513ed671a1fa218b23b6.1674824958.git.geert+renesas@glider.be --- Cc: Geert Uytterhoeven <[email protected]> Cc: Hai Pham <[email protected]> Cc: LUU HOAI <[email protected]> Cc: Marek Vasut <[email protected]>
2023-06-08usb: musb-new: sunxi: remove unused defineSam Edwards
This is a remnant from when the USB controller driver managed the reset signal itself. A patch from the very end of 2018 changed this driver to delegate reset (and clock) management to the proper control unit driver, but left this unused define behind. Signed-off-by: Sam Edwards <[email protected]> Reviewed-by: Marek Vasut <[email protected]>
2023-06-07phy: rockchip-inno-usb2: Implement clock operations for usb2phy clockXavier Drudis Ferran
This clock doesn't seem needed but appears in a phandle list used by ehci-generic.c to bulk enable it. The phandle list comes from linux, where it is needed for suspend/resume to work [1]. My tests give the same results with or without this patch, but Marek Vasut found it weird to declare an empty clk_ops [2]. So I adapted the code from linux 6.1-rc8 so that it hopefully works if it ever has some user. For now, without real use, it seems to at least not give any errors when called. Link: [1] https://lkml.kernel.org/lkml/1731551.Q6cHK6n5ZM@phil/T/ [2] https://patchwork.ozlabs.org/project/uboot/patch/Y5IWpjYLB4aXMy9o@localhost/ Cc: Simon Glass <[email protected]> Cc: Philipp Tomsich <[email protected]> Cc: Kever Yang <[email protected]> Cc: Lukasz Majewski <[email protected]> Cc: Sean Anderson <[email protected]> Cc: Marek Vasut <[email protected]> Cc: Christoph Fritz <[email protected]> Cc: Jagan Teki <[email protected]> Signed-off-by: Xavier Drudis Ferran <[email protected]> Reviewed-by: Kever Yang <[email protected]> Reviewed-by: Jagan Teki <[email protected]> Tested-by: Jagan Teki <[email protected]> # rk3399, rk3328, rv1126
2023-06-07phy: rockchip-inno-usb2: Add usb2phy clock provider of 480MHz clockXavier Drudis Ferran
arch/arm/dts/rk3399.dtsi has a node usb_host0_ehci: usb@fe380000 { compatible = "generic-ehci"; with clocks: clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>, <&u2phy0>; The first 2 refer to nodes with class UCLASS_CLK, but &u2phy0 has class UCLASS_PHY. u2phy0: usb2phy@e450 { compatible = "rockchip,rk3399-usb2phy"; Since clk_get_bulk() only looks for devices with UCLASS_CLK, it fails with -ENODEV and then ehci_usb_probe() aborts. The consequence is peripherals connected to a USB 2 port (e.g. in a Rock Pi 4 the white port, nearer the edge) not being detected. They're detected if CONFIG_USB_OHCI_GENERIC is selected in Kconfig, because ohci_usb_probe() does not abort when one clk_get_by_index() fails, but then they work in USB 1 mode. rk3399.dtsi comes from linux and the u2phy0 was added[1] to the clock list in: commit b5d1c57299734f5b54035ef2e61706b83041f20c Author: William wu <[email protected]> Date: Wed Dec 21 18:41:05 2016 +0800 arm64: dts: rockchip: add u2phy clock for ehci and ohci of rk3399 We found that the suspend process was blocked when it run into ehci/ohci module due to clk-480m of usb2-phy was disabled. [...] Suspend concerns don't apply to U-Boot, and the problem with U-Boot failing to probe EHCI doesn't apply to linux, because in linux rockchip_usb2phy_clk480m_register makes u2phy0 a proper clock provider when called by rockchip_usb2phy_probe(). So I can think of a few alternative solutions: 1- Change ehci_usb_probe() to make it more similar to ohci_usb_probe(), and survive failure to get one clock. Looks a little harder, and I don't know whether it could break something if it ignored a clock that was important for something else than suspend. 2- Change rk3399.dtsi effectively reverting the linux commit b5d1c57299734f5b54035ef2e61706b83041f20c. This dealigns the .dtsi from linux and seems fragile at the next synchronisation. 3- Change the clock list in rk3399-u-boot.dtsi or somewhere else. This survives .dts* sync but may survive "too much" and miss some change from linux that we might want. 4- Enable CONFIG_USB_OHCI_GENERIC and use the ports in USB 1 mode. This would need to be made for all boards using rk3399. In a simple test reading one file from USB storage it gave 769.5 KiB/s instead of 20.5 MiB/s with solution 2. 5- Trying to replicate linux and have usb2phy somehow provide a clk, or have a separate clock device for usb2phy in addition to the phy device. This patch tries to implement option 5 as Marek Vasut requested in December 5th. Options 1 and 3 didn't get through [2][3]. It just registers usb2phy as a clock driver (device_bind_driver() didn't work but device_bind_driver_to_node() did), without any specific operations, so that ehci-generic.c finds it and is happy. It worked in my tests on a Rock Pi 4 B+ (rk3399). Link: [1] https://lkml.kernel.org/lkml/1731551.Q6cHK6n5ZM@phil/T/ [2] https://patchwork.ozlabs.org/project/uboot/patch/20220701185959.GC1700@begut/ [3] https://patchwork.ozlabs.org/project/uboot/patch/Y44+ayJfUlI08ptM@localhost/ Cc: Simon Glass <[email protected]> Cc: Philipp Tomsich <[email protected]> Cc: Kever Yang <[email protected]> Cc: Lukasz Majewski <[email protected]> Cc: Sean Anderson <[email protected]> Cc: Marek Vasut <[email protected]> Cc: Christoph Fritz <[email protected]> Cc: Jagan Teki <[email protected]> Signed-off-by: Xavier Drudis Ferran <[email protected]> Reviewed-by: Kever Yang <[email protected]> Reviewed-by: Jagan Teki <[email protected]> Tested-by: Jagan Teki <[email protected]> # rk3399, rk3328, rv1126
2023-06-07usb: musb-new: sunxi: fix error checkSam Edwards
The `musb_register` function returns some ERR_PTR(...) on failure, not NULL, so update the check here appropriately. Signed-off-by: Sam Edwards <[email protected]> Reviewed-by: Marek Vasut <[email protected]>
2023-06-07serial: meson: fix meson_serial_pending() tx logicMattijs Korpershoek
According to the dm_serial_ops documentation, pending() should: > @return number of waiting characters, 0 for none, -ve on error And: > It is acceptable to return 1 if an indeterminant number > of characters is waiting. With the current implementation, we have: * FIFO is full -> pending() returns 0 * FIFO is partially used -> pending() returns 1 * FIFO is empty -> pending() returns 1 This is not the same as what the documentation requires. Moreover, since [1], arm reset now flushes all console devices (including serial) before the cpu gets reset. Because of the flawed logic: => reset # user calls reset flush() is called _serial_flush() is called ops->pending(dev, false) # never returns false # board hangs indefinitely without resetting. Fix it by using AML_UART_TX_EMPTY instead of AML_UART_TX_FULL. [1] commit c5f4cdb8eb60 ("console: Use flush() before panic and reset"), Signed-off-by: Mattijs Korpershoek <[email protected]> Acked-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Neil Armstrong <[email protected]>
2023-06-05I2C: cdns: Fix broken retry mechanism on arbitration lost.Andrea Merello
In the current implementation, in case of I2C arbitration lost, a retry is attempted; the message counter and pointer are reset to the original values and the I2C xfer process is restart from the beginning. However the message counter and message pointer are respectively decremented and incremented by one before attempting any transfer, causing the 1st transfer not to be actually retried (in case of a single transfer, nothing is actually retried at all). This patch fixes this: in case of retry, the 1st transfer is also retried. Tested on a ZynqMP Kria board, with upstream older u-boot, but the involved file and underlying logic seem basically the same. Signed-off-by: Andrea Merello <[email protected]>
2023-06-05i2c: rockchip: De-initialize the bus after start bit failureOndrej Jirman
Failure can happen when i2c is used without initializing pinctrl properly, which U-Boot happily allows in SPL. Without this fix, further I2C access would fail, even after proper pinctrl initialization. Signed-off-by: Ondrej Jirman <[email protected]> Cc: Heiko Schocher <[email protected]> Reviewed-by: Kever Yang <[email protected]> Reviewed-by: Heiko Schocher <[email protected]>
2023-06-01phy: ti: phy-j721e-wiz: Add j721s2-wiz-10g module supportRavi Gunasekaran
Add support for j721s2-wiz-10g device to use clock-names interface instead of explicitly defining clock nodes within device tree node. Signed-off-by: Ravi Gunasekaran <[email protected]>
2023-06-01axi: fix definition of axi_sandbox_get_emul()Heinrich Schuchardt
Compiling with gcc 13 results in an error: drivers/axi/axi-emul-uclass.c:16:5: warning: conflicting types for ‘axi_sandbox_get_emul’ due to enum/integer mismatch; have ‘int(struct udevice *, ulong, enum axi_size_t, struct udevice **)’ {aka ‘int(struct udevice *, long unsigned int, enum axi_size_t, struct udevice **)’} [-Wenum-int-mismatch] 16 | int axi_sandbox_get_emul(struct udevice *bus, ulong address, | ^~~~~~~~~~~~~~~~~~~~ In file included from drivers/axi/axi-emul-uclass.c:14: ./arch/sandbox/include/asm/axi.h:48:5: note: previous declaration of ‘axi_sandbox_get_emul’ with type ‘int(struct udevice *, ulong, uint, struct udevice **)’ {aka ‘int(struct udevice *, long unsigned int, unsigned int, struct udevice **)’} 48 | int axi_sandbox_get_emul(struct udevice *bus, ulong address, uint length, | ^~~~~~~~~~~~~~~~~~~~ Adjust the header definition to match the implementation. Define the size parameter as constant. Fixes: 9a8bcabd8ada ("axi: Add AXI sandbox driver and simple emulator") Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2023-06-01firmware: ti_sci: Add missing LF in error messageAndreas Dannenberg
The "Message not acknowledged" error message is missing a line feed, leading to the console log getting garbled and joined together with whatever the next output is in case this error happens: "ti_sci system-controller@44043000: Message not acknowledgedAuthentication failed!" Fix ths by adding the missing linefeed character. Signed-off-by: Andreas Dannenberg <[email protected]> Acked-by: Andrew Davis <[email protected]>
2023-06-01pinctrl: nuvoton: set output state before enabling the outputJim Liu
The default output state may be different to request, change the configuration sequence to avoid glitch. Signed-off-by: Jim Liu <[email protected]>
2023-05-31mmc: fix improper use of memsetSam Edwards
Buffers created through DEFINE_(CACHE_)ALIGN_BUFFER are actually pointers to the real underlying buffer. Using sizeof(...) is not appropriate in this case. Signed-off-by: Sam Edwards <[email protected]> Reviewed-by: Peng Fan <[email protected]>
2023-05-31common: dfu: Remove leading space charactersRavi Gunasekaran
As per [1], dfu_alt_info is mentioned to be as semicolon separated string of information on each alternate and the parsing logic in the dfu.c is based on this. Typically, the dfu_alt_info_* is defined in .h files as preprocessor macros with 'alt' info separated by semicolon. But when dfu_alt_info_* is added in the environment files(.env) the script at "scripts/env2string.awk" converts a newline to space. Thus adding a space character after semicolon. This results in incorrect parsing in dfu.c which is based on the information that 'alt' info are only semicolon separated. One option is to add dfu_alt_info_* variable in .env in single line. But there is possiblity for it to exceed the line length limit. So update the parsing logic to remove leading space characters before adding to the dfu list. [1]: https://u-boot.readthedocs.io/en/latest/usage/dfu.html Signed-off-by: Ravi Gunasekaran <[email protected]>
2023-05-31fastboot: Only call the bootm command if it is enabledSamuel Holland
This fixes an error with trying to link against do_bootm() when CONFIG_CMD_BOOTM is disabled. Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Mattijs Korpershoek <[email protected]> Reviewed-by: Patrick Delaunay <[email protected]>
2023-05-31exynos: fix header inclusion guardAndre Przywara
It seems like the header inclusion guard for the Exynos pinctrl header was misspelled. Make the preprocessor symbol for the #ifndef and #define lines the same, so that the double inclusion protection works as expected. Signed-off-by: Andre Przywara <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2023-05-31arm: Remove ti816x_evm board and ti816x SoC supportTom Rini
This platform is currently unmaintained and untested, so remove it. Further, as it is the only TI816X SoC example, remove related files as well. Signed-off-by: Tom Rini <[email protected]>
2023-05-30pci: apple: Add support for M2 Pro/MaxMark Kettenis
The PCIe controller on the M2 Pro/Max is different from the one found on earlier Apple SoCs. Some registers moved and te meaning of the bits in some other registers changed. But they are still similar enough to handle both controllers in the same driver. Signed-off-by: Mark Kettenis <[email protected]>
2023-05-25Merge tag 'u-boot-imx-20230525' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20230525 ------------------- - i.MX93 series - Fixes CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/16412
2023-05-21serial: mxs: Add MXS AUART driverMarek Vasut
Add trivial driver for the MXS AUART IP. This is the other UART IP present in i.MX23 and i.MX28, used to drive the non-DUART ports. Signed-off-by: Marek Vasut <[email protected]>
2023-05-21ddr: imx9: update the rank setting for multi fsp supportJacky Bai
The rank setting flow should be updated to support multi fsp config. Signed-off-by: Jacky Bai <[email protected]> Reviewed-by: Ye Li <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2023-05-21ddr: imx93: update the ddr init to support mult setpointsJacky Bai
Update the DDR init flow for multi-setpoint support on i.MX93. A new fsp_cfg struct need to be added in the timing file to store the diff part of the DDRC and DRAM MR register for each setpoint. Signed-off-by: Jacky Bai <[email protected]> Reviewed-by: Ye Li <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2023-05-21ddr: imx93: Add 625M bypass clock supportJacky Bai
Add 625M bypass clock that may be used DRAM 625M bypass mode support. Signed-off-by: Jacky Bai <[email protected]> Reviewed-by: Ye Li <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2023-05-21ddr: imx9: Change the saved ddr data base to 0x2051c000Jacky Bai
change the ddr saved info to the last 16KB of the OCRAM. Signed-off-by: Jacky Bai <[email protected]> Reviewed-by: Peng Fan <[email protected]> Reviewed-by: Ye Li <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2023-05-21ddr: imx9: Add workaround for DDRPHY rank-to-rank errataYe Li
According to DDRPHY errata, the Rank-to-Rank Spacing and tphy_rdcsgap specification does not include the Critical Delay Difference (CDD) to properly define the required rank-to-rank read command spacing after executing PHY training firmware. Following the errata workaround, at the end of data training, we get all CDD values through the MessageBlock, then re-configure the DDRC timing of WWT/WRT/RRT/RWT with comparing MAX CDD values. Signed-off-by: Ye Li <[email protected]> Acked-by: Peng Fan <[email protected]>
2023-05-21imx9: add i.MX93 variants supportPeng Fan
According to datasheet, iMX93 has fused parts with CORE1 or NPU or both disabled. So update code to support it, the kernel device tree runtime update will be added in future patches. Signed-off-by: Peng Fan <[email protected]>
2023-05-21watchdog: ulp_wdog: guard reset_cpu with condition checkPeng Fan
There will be build error if CONFIG_SYSRESET is enabled, so guard the reset_cpu with condition check here Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2023-05-21imx: imx8_cpu: print cpu grade temperaturePeng Fan
Support print out cpu grade temperature Signed-off-by: Peng Fan <[email protected]>