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The USB SS-PHY needs its own clock, however, some clocks don't have
clock gates. Define missing clock entries for the PHY as reference
clock.
Signed-off-by: Kunihiko Hayashi <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Add reset control support in USB glue logic. This needs to control
the external clocks and resets for the logic before accessing the
glue logic.
The USB dm tree when using dwc3-generic is the following:
USB glue
+-- controller (need controller-reset)
+-- controller-reset (need syscon-reset)
+-- phy
The controller needs to deassert "controller-reset" in USB glue before
the controller registers are accessed. The glue needs to deassert
"syscon-reset" before the glue registers are accessed.
The glue itself doesn't have "syscon-reset", so the controller-reset
controls "syscon-reset" instead.
Signed-off-by: Kunihiko Hayashi <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Add the size of regs property to the glue structure to correctly
specify the register region to map.
Signed-off-by: Kunihiko Hayashi <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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In order to allow external SoC-dependent glue drivers to use dwc3-generic
functions, push the glue structures and export the functions to a header
file.
The exported structures and functions are:
- struct dwc3_glue_data
- struct dwc3_glue_ops
- dwc3_glue_bind()
- dwc3_glue_probe()
- dwc3_glue_remove()
The SoC-dependent glue drivers can only define their own wrapper driver
and specify these functions. The drivers can also add their own compatible
strings and configure functions.
Signed-off-by: Kunihiko Hayashi <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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Same as the reset cotnrol, should add a clock initialization in child DT
node, if the glue node doesn't have any clocks.
Signed-off-by: Kunihiko Hayashi <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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The most of devicetree has the following USB node structure.
The controller node is placed as a child node of the glue node.
Current dwc3-generic driver works on this premise.
glue {
/* glue node */
usb {
/* controller node */
};
};
However, UniPhier original devicetree has the following USB node structure.
The controller node is separately placed from the glue node.
usb {
/* controller node */
};
glue {
/* glue node */
};
In dwc_glue_bind(), this patch provides .glue_get_ctrl_dev() callback to
get such a controller node and binds the driver related to the node.
If this callback isn't defined, dwc_glue_bind() looks for the controller
nodes from the child nodes, as before.
Suggested-by: Marek Vasut <[email protected]>
Signed-off-by: Kunihiko Hayashi <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
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There are currently four disparate placement possibilities of DWC3
reference clock phandle in SoC DTs:
- in top level glue node, with generic subnode without clock (ZynqMP)
- in top level generic node, with no subnode (i.MX8MQ)
- in generic subnode, with other clock in top level node (i.MX8MP)
- in both top level node and generic subnode (Rockchip)
Cover all the possibilities here by looking into both nodes, start
with the top level node as that seems to be used in majority of DTs
to reference the clock.
Signed-off-by: Marek Vasut <[email protected]>
Acked-by: Kunihiko Hayashi <[email protected]>
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As the "reset-gpios" property is optional, don't return the
error and just skip the gpio reset sequence.
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
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cpsw_mdio_get_alive reads the wrong register.
See page 2316 in SPRUH73Q AM335x TRM
Signed-off-by: Ulf Samuelsson <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
Reviewed-by: Siddharth Vadapalli <[email protected]>
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This patch fixes following warning for the riscv32 toolchain.
drivers/cache/cache-v5l2.c:122:16: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
122 | regs = (struct l2cache *)dev_read_addr(dev);
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Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
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Update the compatible string of L2 cache.
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
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The L2C configuration register has MAP field to indicate its version
is v0 (Gen1) or v1 (Gen2) L2-cache. This patch makes the driver
compatible with both memory-mapped scheme.
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
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There is no need for RISCV_NDS_CACHE config to control cache switches.
Signed-off-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
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Update various build and test components to use the new schema.
Signed-off-by: Simon Glass <[email protected]>
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Add a CONFIG option to deal with this automatically, printing a warning
when U-Boot starts up. This can be useful if the device tree comes from
another project.
We will maintain this through the 2023.07 release, providing 6 months
for people to notice.
Signed-off-by: Simon Glass <[email protected]>
Version 4:
Acked-by: Michal Simek <[email protected]>
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Enable driver to fetch the optional parameter (fifo-depth) from device
tree. If the parameter is not found in the device tree, it will use
the default value declared in the driver.
Signed-off-by: Pei Yue Ho <[email protected]>
Reviewed-by: Wei Liang Lim <[email protected]>
Reviewed-by: Eng Lee Teh <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Add i2c new register mode driver to support AST2600 i2c
new register mode. AST2600 i2c controller have legacy and
new register mode. The new register mode have global register
support 4 base clock for scl clock selection, and new clock
divider mode.
Signed-off-by: Ryan Chen <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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Printing the I2C controller base address in decimal notation
is not helpful.
Change it to hex notation, which is the standard format found
in the Reference Manual and devicetree.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Dhruva Gole <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-clk
Clock changes for 2023.04-rc1
This contains various fixes and small features. I've included a reset patch as
well since it was in the same series as a clock patch.
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https://source.denx.de/u-boot/custodians/u-boot-mpc8xx
- A fix for a long standing bug that has been exposed by commit
50128aeb0f8 ("cyclic: get rid of cyclic_init()") preventing 8xx boards
from booting since u-boot 2023.01
- A GPIO driver for powerpc 8xx chip
- Fixup for powerpc 8xx SPI driver
- A new powerpc 8xx board
- The two devices having that board.
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This allows devm_reset_control_get(dev, NULL) to work and get the first
reset control, which is common in code ported from Linux.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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This allows devm_clock_get(dev, NULL) to work and get the first clock,
which is common in code ported from Linux.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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[backport from linux commit 2626cf67f20b28446dfc3a5b9493dd535cdb747b]
According to the "Clock Root" table of the reference manual (document
IMX8MNRM Rev 2, 07/2022):
Clock Root offset Source Select (CCM_TARGET_ROOTn[MUX])
... ... ...
ENET_PHY_REF_CLK_ROOT 0xAA80 000 - 24M_REF_CLK
001 - SYSTEM_PLL2_DIV20
010 - SYSTEM_PLL2_DIV8
011 - SYSTEM_PLL2_DIV5
100 - SYSTEM_PLL2_DIV2
101 - AUDIO_PLL1_CLK
110 - VIDEO_PLL_CLK
111 - AUDIO_PLL2_CLK
... ... ...
while the imx8mn_enet_phy_sels list didn't contained audio_pll1_out for
source select bits 101b.
Signed-off-by: Dario Binacchi <[email protected]>
Acked-by: Sean Anderson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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[backport from linux commit bedcf9d1dcf88ed38731f0ac9620e5a421e1e9d6]
Unlike audio_pll1 and audio_pll2, there is no video_pll2. Further, the
name used in the RM is video_pll. So, let's rename "video_pll1" to
"video_pll" to be consistent with the RM and avoid misunderstandings.
No functional changes intended.
Signed-off-by: Dario Binacchi <[email protected]>
Acked-by: Sean Anderson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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[backport from linux commit a429c60baefd95ab43a2ce7f25d5b2d7a2e431df]
The IMX8MN platform does not have any video processing unit (VPU), and
indeed in the reference manual (document IMX8MNRM Rev 2, 07/2022) there
is no occurrence of its pll. From an analysis of the code and the RM
itself, I think vpu pll is used instead of m7 alternate pll, probably
for copy and paste of code taken from modules of similar architectures.
Signed-off-by: Dario Binacchi <[email protected]>
Acked-by: Sean Anderson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Fix bug for npcm7xx bmc calculate pll clock.
PLLCON1 need to divide by 2.
Signed-off-by: Jim Liu <[email protected]>
Acked-by: Sean Anderson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Tracing is typically enabled by the time driver model starts up, so there
is no point in adding a 'notrace' to the timer-init function. However,
once the driver model timer is enabled, we do need to be able to access
the timer's private data when reading the timer, so add it to the core
function needed for that.
Update the function's documentation while we are here.
Signed-off-by: Simon Glass <[email protected]>
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When dropping the unused fotg210 gadget driver a leading 0 was
introduced to the next line, drop it.
Fixes: e9b4678bc78e ("usb: Drop unused fotg210 gadget")
Reported-by: Samuel Holland <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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This patch fixes the mpc8xx SPI driver:
- A stub callbacks for mode and speed,
- Use chip selects defined as GPIOs,
- Write proper value to disable relocation, other it fails on mpc885,
- Don't modify ports setup, ports can be different from one board to
another and are already set by board_early_init_r().
This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.
Signed-off-by: Christophe Leroy <[email protected]>
Reviewed-by: FRANJOU Stephane <[email protected]>
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Ports A, C and D are 16 bits ports.
Ports B and E are 32 bits ports.
The "compatible" is used to determine each port type.
This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.
Signed-off-by: Christophe Leroy <[email protected]>
Reviewed-by: FRANJOU Stephane <[email protected]>
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Register mii_bus with read and write callbacks to allow the 'mii'
command to work. Use a timeout of 10 ms to wait for the R/W
operations to complete.
Signed-off-by: Sergei Antonov <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
Tested-by: Rick Chen <[email protected]>
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Replace 'phys_addr_t iobase' with 'struct ftmac100 *ftmac100' in
struct ftmac100_data. It allows to remove casting in a number of places.
Since priv->iobase is phys_addr_t, use phys_to_virt() to make
a pointer from it.
Signed-off-by: Sergei Antonov <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
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So it will be named similarly to the related ftgmac100 driver.
The old name 'nds32_mac' is not referred to anywhere in U-Boot.
Signed-off-by: Sergei Antonov <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
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Bootmenu requires an input device with arrows and enter key.
A common smartphone luckily has power, volume up/down buttons,
which may be used for controlling bootmenu.
To use driver, add 'button-kbd' to stdin.
Signed-off-by: Dzmitry Sankouski <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Linux event code must be used in input devices, using buttons.
Signed-off-by: Dzmitry Sankouski <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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GPIO button driver requires direction functions to probe
button gpio. Those functions are blank, since pwrkey is not
really gpio, and don't support direction settings.
Signed-off-by: Dzmitry Sankouski <[email protected]>
Reviewed-by: Sumit Garg <[email protected]>
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Add support for Qualcomm I2C QUP driver which is inspired from
corresponding driver in Linux: drivers/i2c/busses/i2c-qup.c.
Currently this driver only support FIFO polling mode which is sufficient
to support devices like eeprom, rtc etc.
Co-developed-by: Mike Worsfold <[email protected]>
Signed-off-by: Mike Worsfold <[email protected]>
Signed-off-by: Sumit Garg <[email protected]>
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The Qualcom ETHQOS hardware supports an RGMII macro which needs to be
configured according to following link speeds:
- SPEED_1000
- SPEED_100
- SPEED_10
So add a corresponding glue driver to configure RGMII macro.
Signed-off-by: Sumit Garg <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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The GMAC controller on QCS404 SoC (support added by upcoming patch) fails
to work with maximum tx/rx_fifo_sz supported by the hardware (16K). So
allow platforms to override FIFO size using corresponding DT node
properties.
Signed-off-by: Sumit Garg <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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Signed-off-by: Sumit Garg <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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This converts 1 usage of this option to the non-SPL form, since there is
no SPL_ATMEL_PIO4 defined in Kconfig
Reviewed-by: Eugen Hristev <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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This converts 1 usage of this option to the non-SPL form, since there is
no SPL_PANEL defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
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This converts 3 usages of this option to the non-SPL form, since there is
no SPL_OF_BOARD defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Matthias Brugger <[email protected]>
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This converts 3 usages of this option to the non-SPL form, since there is
no SPL_FASTBOOT_FLASH_NAND defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
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This converts 5 usages of this option to the non-SPL form, since there is
no SPL_FASTBOOT_FLASH_MMC defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
Reviewed-by: Mattijs Korpershoek <[email protected]>
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This converts 1 usage of this option to the non-SPL form, since there is
no SPL_ARCH_VERSAL defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
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This converts 2 usages of this option to the non-SPL form, since there is
no SPL_DISPLAY_AER_BRIEF defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
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This converts 2 usages of this option to the non-SPL form, since there is
no SPL_ZYNQMP_FIRMWARE defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
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This converts 4 usages of this option to the non-SPL form, since there is
no SPL_XEN_SERIAL defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
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This converts 1 usage of this option to the non-SPL form, since there is
no SPL_VIDEO_BPP32 defined in Kconfig
Signed-off-by: Simon Glass <[email protected]>
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