| Age | Commit message (Collapse) | Author |
|---|
|
Add this to the metrics so we can later adjust the font size without
changing the font itself.
Signed-off-by: Simon Glass <[email protected]>
|
|
At present the truetype console supports only a single font and size. It
is useful to be able to support different combinations. As a first step,
move the metrics into there own structure and allow having multiple
metrics.
Signed-off-by: Simon Glass <[email protected]>
|
|
Put this check into a function so we can use it elsewhere. Also drop the
macros which do the same thing but are not actually used.
Signed-off-by: Simon Glass <[email protected]>
|
|
It is useful to show the logo from other code, coming in a later feature.
Add a function to obtain it.
Signed-off-by: Simon Glass <[email protected]>
|
|
Generalise the video_clear() function to allow filling with a different
colour.
Tidy up the comments while we are here.
Signed-off-by: Simon Glass <[email protected]>
|
|
This is actually a panel, not a video device. Rename the option, move it
into the right place and make it depend on PANEL.
Signed-off-by: Simon Glass <[email protected]>
|
|
Move these commands and the implementation to the cmd/ directory, which is
where most commands are kept.
Signed-off-by: Simon Glass <[email protected]>
Acked-by: Ilias Apalodimas <[email protected]>
[agust: keep vidconsole_position_cursor() in vidconsole uclass]
Signed-off-by: Anatolij Gustschin <[email protected]>
|
|
Use the existing function rather that duplicating the code. Also fix up
the missing error handling.
Signed-off-by: Simon Glass <[email protected]>
|
|
Add an exported function which allows the cursor position to be set to
pixel granularity. Make use of this in the existing code.
Signed-off-by: Simon Glass <[email protected]>
|
|
At present these are attached to vidconsole which means that the video
uclass requires that a console is enabled. This is not the intention.
The colours are a reasonable way of indexing common colours in any case,
so move them to the video uclass instead.
Rename vid_console_color() to video_index_to_colour() now that it is more
generic. Also fix the inconsistent spelling in these functions.
Signed-off-by: Simon Glass <[email protected]>
|
|
It introduces the way to rotate the screen for boards with rotated screen.
Signed-off-by: Takumi Sueda <[email protected]>
|
|
The wrong fields are pulled out of the timings here so the values
programmed into the DSI_VID_HSA_LINES/DSI_VID_HBP_LINES and
DSI_VID_VSA_LINES/DSI_VID_VBP_LINES registers are swapped.
Use the right fields so that the correct values are programmed.
Fixes: d4f7ea83fc ("video: add MIPI DSI host controller bridge")
Signed-off-by: John Keeping <[email protected]>
|
|
When probing a device fails NULL pointer is returned, and following
devices in uclass list cannot be iterated. Skip to next device on error
instead.
With that the only condition under which these simple iteration
functions return error is when the dm is not initialized at uclass_get
time. This is not all that interesting, change return type to void.
Fixes: 6494d708bf ("dm: Add base driver model support")
Signed-off-by: Michal Suchanek <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
uclass_first_device/uclass_next_device return value will be removed,
don't use it.
With the current implementation dev is equivalent to !ret. It is
redundant to check both, ret check can be replaced with dev check, and
ret check inside the iteration is dead code.
Signed-off-by: Michal Suchanek <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Clarify documentation, fix a few more cases that could be broken by the
change.
Signed-off-by: Michal Suchanek <[email protected]>
|
|
This is needed in the platforms that use "ranges" node property for
address translation in their dts for TPL.
Signed-off-by: William Zhang <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
The call to device_bind_with_driver_data() passes id->data but if
the entry has no of_match then the id has not been set by the selected
driver.
Normally this passes unnoticed since a previous driver likely had an
of_match value, so the id is set to that. Of course it is not correct
to pass the id->data from a different driver.
With clang-14 the driver ordering is such that the id is never actually
set in the 'bind /usb@1 usb_ether' line in test_bind_unbind_with_node()
thus causing a crash.
Fix this by passing 0 if the of_match for a driver does not exist.
Signed-off-by: Simon Glass <[email protected]>
|
|
Matching anything that just happens to have the sought-for label as a
prefix is wrong. For example, if the board designer has designated 10
lines for debug purposes, named "debug1" through "debug10", and we are
looking up "debug1", if debug10 happens to be met first during the
iteration we'd wrongly return that.
In theory, this can break existing users that could rely on this
quirk, but OTOH keeping the current broken semantics can cause a lot
of grief for people hitting this in the future and not understanding
why they don't find the line they expect. Considering how few in-tree
defconfigs currently set DM_GPIO_LOOKUP_LABEL (ignoring sandbox, only
four "real" boards), let's fix it before the use becomes more
widespread.
Signed-off-by: Rasmus Villemoes <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Reviewed-by: Heiko Schocher <[email protected]>
|
|
Add Nuvoton NPCM BMC Peripheral SPI controller driver.
NPCM750 include two general-purpose SPI interface.
Signed-off-by: Jim Liu <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
The GPMC is a unified memory controller dedicated for interfacing
with external memory devices like
- Asynchronous SRAM-like memories and ASICs
- Asynchronous, synchronous, and page mode burst NOR flash
- NAND flash
- Pseudo-SRAM devices
This driver will take care of setting up the GPMC based on
the settings specified in the Device tree and then
probe its children.
Signed-off-by: Roger Quadros <[email protected]>
|
|
Introduce UCLASS_MEMORY for future Memory Controller
device drivers.
Signed-off-by: Roger Quadros <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
Fix SHA512 config name and add missing SHA384 config.
Signed-off-by: Benjamin Bara <[email protected]>
|
|
|
|
- nuvoton: add expire function for generic reset (Jim)
- handle watchdogs during keyed autoboot (Rasmus)
- cyclic: Don't disable cylic function upon exceeding CPU time (Stefan)
- ulp wdog: Updates to support iMX93 and DM (Alice)
|
|
Avoid concatenation with following message.
Signed-off-by: Michal Suchanek <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
|
|
If a regulator does not support .set_suspend_enable or
.set_suspend_value then ret is set to ENOSYS early in the function.
The most serious impact of this is that when no automatic setting of
voltage is needed then the final regulator_set_enable() is skipped
because ret has not been cleared.
It seems that the error handling for regulator_set_suspend_value() is
also wrong as if this succeeds then the normal boot-on checks are still
required, and again ENOSYS needs special treatment here.
Fixes: 11406b8f7e ("dm: regulator: support regulator more state")
Signed-off-by: John Keeping <[email protected]>
|
|
- Add s28hl512t, s28hl01gt (Takahiro)
- Rework s25hx_t_post_bfpt_fixup() (Takahiro)
|
|
|
|
https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20221024
-------------------
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13916
- for 2022.01
- rework Kontron boards (mx6 and mx8)
- fixes for Toradex
- fixes (SPI, CAAM, )
- sync DT with Linux
- fixes for Gateworks GW7903 and GW7904 PMIC
- Engicam i.Core MX8M Plus EDIMM2.2
|
|
Commit 290ffe5788 (imx8m: fix reading of DDR4 MR registers) lifted a
private definition of lpddr4_mr_read() from imx8mm-cl-iot-gate board
code to drivers/ddr/imx/imx8m/ddrphy_utils.c, because that version
actually seems to work in practice.
However, commit 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
reintroduced the broken version in drivers/ddr/imx/imx8m/ddr_init.c,
copied most of the rest of ddrphy_utils.c to
drivers/ddr/imx/phy/ddrphy_utils.c, and stopped building
drivers/ddr/imx/imx8m/ddrphy_utils.c [and that file was then finally
completely removed with 7e9bd84883 (imx8m: ddrphy_utils: Remove unused
file)].
I assume this must have broken the imx8mm-cl-iot-gate board, at least
those that have not had their eeprom programmed with the proper
information. It certainly did break our out-of-tree board which always
reads back the ID register and uses that for a sanity check.
So apply the fix from 290ffe5788 once again.
Fixes: 99c7cc58e1 (ddr: imx: Add i.MX9 DDR controller driver)
Signed-off-by: Rasmus Villemoes <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
|
|
Enable driver model for ulp watchdog timer. When CONFIG_WDT=y and the
status of device node is "okay", initr_watchdog will be called and
finally calls ulp_wdt_probe() and ulp_wdt_start().
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Ye Li <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
|
|
The reset source of the external PMIC on i.MX93 is WDOG_ANY PAD and the
source of WDOG_ANY PAD is interrupt. Therefore, using PMIC to reset
needs to enable the watchdog interrupt.
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
|
|
The WDOG clocks are sourced from the fixed 32KHz (lpo_clk).When the
timeout period exceeds 2 seconds, the value written to the TOVAL
register is larger than 16-bit can represent. Enabling watchdog
prescaler to solve this problem.
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
|
|
To use 32bits refresh and unlock command as default, check the CMD32EN
bit to select the corresponding commands.
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
|
|
In order to test that U-Boot actually maintains the watchdog device(s)
during long-running busy-loops, such as those where we wait for the
user to stop autoboot, we need a watchdog device that actually does
something during those loops; we cannot test that behaviour via the DM
test framework.
So introduce a relatively simple watchdog device which is simply based
on calling the host OS' alarm() function; that has the nice property
that a new call to alarm() simply sets a new deadline, and alarm(0)
cancels any existing alarm. These properties are precisely what we
need to implement start/reset/stop. We install our own handler so that
we get a known message printed if and when the watchdog fires, and by
just invoking that handler directly, we get expire_now for free.
The actual calls to the various OS functions (alarm, signal, raise)
need to be done in os.c, and since the driver code cannot get access
to the values of SIGALRM or SIG_DFL (that would require including a
host header, and that's only os.c which can do that), we cannot simply
do trivial wrappers for signal() and raise(), but instead create
specialized functions just for use by this driver.
Apart from enabling this driver for sandbox{,64}_defconfig, also
enable the wdt command which was useful for hand-testing this new
driver (especially with running u-boot under strace).
Signed-off-by: Rasmus Villemoes <[email protected]>
|
|
This is a companion to u-boot,noautostart. If one has a single
watchdog device that one does want to have auto-started, but several
others that one doesn't, the only way currently is to set the
CONFIG_WATCHDOG_AUTOSTART and then use the opt-out for the majority.
The main motivation for this is to add an autostarted watchdog device
to the sandbox (to test a fix) without having to set AUTOSTART in
sandbox_defconfig and add the noautostart property to the existing
devices. But it's also nice for symmetry, and the logic in
init_watchdog_dev() becomes simpler to read because we avoid all the
negations.
Signed-off-by: Rasmus Villemoes <[email protected]>
|
|
Add expire_now function for generic sysreset request
Signed-off-by: Jim Liu <[email protected]>
|
|
Correct pointer dereferencing check to be more consistent.
Eliminate the below smatch warning:
drivers/mmc/mmc.c:3118 mmc_init_device()
warn: variable dereferenced before check 'm' (see line 3116)
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Reviewed-by: Michal Simek <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
|
|
Unconditionally clearing DTO when RXDR is set leads to spurious timeouts
in FIFO mode transfers if events occur in the following order:
mask = dwmci_readl(host, DWMCI_RINTSTS);
// Hardware asserts DWMCI_INTMSK_DTO here
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);
if (mask & DWMCI_INTMSK_DTO) {
// Unreachable as DTO is cleared without being handled!
return 0;
}
Only clear interrupts that we have seen and are handling so that DTO is
not missed.
Signed-off-by: John Keeping <[email protected]>
Tested-by: Jerome Forissier <[email protected]> (Rock PI 4B)
Tested-by: Quentin Schulz <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
|
|
The SDMMC IOs can be in an IO domain, that has to be enabled.
This is done by enabling vqmmc in the driver.
This has no impact on configurations not using an IO domain, the check
can then be executed on all platforms managing regulator, and the vqmmc
regulator enabled on all platforms having it in their DT.
Signed-off-by: Yann Gautier <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
|
|
The UHS modes for SD, HS200 and HS400 modes for eMMC are not supported
by the stm32_sdmmc2 driver.
Make it clear by removing the corresponding caps after parsing the DT.
Signed-off-by: Yann Gautier <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
|
|
To support dual data rate with STM32 sdmmc2 driver, the dedicated bit
(DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass
(no divider) is not allowed in this case. This is required for the
eMMC DDR modes.
Signed-off-by: Yann Gautier <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
|
|
Add Socionext F_SDH30_E51 IP support. The features of this IP includes
CMD/DAT line delay and force card insertion mode for non-removable cards.
And the IP needs to add some quirks.
Signed-off-by: Kunihiko Hayashi <[email protected]>
|
|
This patch defines a quirk to disable the block count
for single block transactions.
This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").
Signed-off-by: Kunihiko Hayashi <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
|
|
Get rid of discrepancy beween comment /* 250 ms */ and code
which shifts by 4 thus dividing by 16.
So change code to shift by 2 and make the timeout value 250 ms.
Signed-off-by: Sergei Antonov <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
|
|
Array index for SCCR 22th DWORD should be 21.
Fixes: bebdc237507c ("mtd: spi-nor: Parse SFDP SCCR Map")
Signed-off-by: Takahiro Kuwano <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
address mode
The flash's internal address mode is tracked by nor->add_mode_nbytes and
it is set to 3 in BFPT parse. SEMPER multi-die package parts (>1Gb) are
3- or 4-byte address mode by default, depending on model number. We need
to make sure that 4-byte address mode is used for multi-die package parts.
For single-die package parts (<=1Gb), registers can be accessed by 3-byte
address. Read, program, and erase use the 4B opcodes that always take
4-byte address regardless of flash's internal address mode.
Signed-off-by: Takahiro Kuwano <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
Read/Write Any Register commands take 3- or 4- byte address depending on
flash's internal address mode. The nor->addr_width tracks number of
address bytes used in read/program/erase ops that can be 4
(with 4B opcodes) regardless of flash's internal address mode. The
nor->addr_mode_nbytes tracks flash's internal address mode so replace
nor->addr_width by that.
Signed-off-by: Takahiro Kuwano <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
The nor->addr_width tracks number of address bytes used in
read/program/erase ops and eventually set to 4 for >16MB chips, regardless
of flash's internal address mode. For Infineon SEMPER flash's, we use
Read/Write Any Register commands for configuration and status check.
These commands take 3- or 4-byte address depending on flash's internal
address mode.
Signed-off-by: Takahiro Kuwano <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
|
JESD216D-01 mentions that "defaults to 3-Byte mode; enters 4-Byte mode on
command."
Signed-off-by: Takahiro Kuwano <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
|
