| Age | Commit message (Collapse) | Author |
|---|
|
This patch makes mtk-tphy driver available for MediaTek MT7621 SoC
Signed-off-by: Weijie Gao <[email protected]>
|
|
This patch makes xhci-mtk driver available for MediaTek MT7621 SoC
Signed-off-by: Weijie Gao <[email protected]>
|
|
This patch adds pinctrl support for MediaTek MT7621 SoC.
The MT7621 SoC supports pinconf, but it is not the same as mt7628.
Reviewed-by: Daniel Schwierzeck <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
|
|
This patch adds a clock driver for MediaTek MT7621 SoC.
This driver provides clock gate control as well as getting clock frequency
for CPU/SYS/XTAL and some peripherals.
Reviewed-by: Sean Anderson <[email protected]>
Signed-off-by: Weijie Gao <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-stm
- Alignment with Linux kernel device tree v5.19 for stm32mp15 and stm32mp13
- Add OP-TEE nodes for stm32mp13x, alligned with upstreamed OP-TEE
- Introduce of_to_plat ops in stm32_sdmmc2 driver
- Activate more features in stm32mp13 defconfig and support of STM32MP13x Rev.Y
- Drop fastboot and stm32prog trigger gpios on STM32MP15x DHCOM board
|
|
ISP1760/61/63 are a family of usb controllers, here the main
goal is to support the ISP1763 hcd part found in the MPS3 FPGA
board form Arm. This is based on the kernel driver and ported
to u-boot.
Signed-off-by: Rui Miguel Silva <[email protected]>
|
|
Move urb code from musb only use to a more common scope, so other
drivers in the future can use the handling of urb in usb.
Signed-off-by: Rui Miguel Silva <[email protected]>
|
|
When usb PHY initialization is done, the PHY need to be reset.
Signed-off-by: T Karthik Reddy <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
|
|
New IP adds a conditional reset that impact the clock
error management. It is now linked to a new compatible.
Signed-off-by: Lionel Debieve <[email protected]>
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
The stm32mp13 soc differs from the stm32mp15 in terms of
clear register offset for controlling the FMP (Fast Mode Plus).
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
Add support for new compatible st,stm32mp1-rcc-secure used when the
RCC resource is managed by secured world (RCC_TZCR.TZEN=1)
iand when SCMI is used.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
Add the uclass ops of_to_plat to parse the device tree properties
to respect the expected sequence by the driver model.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
All the elements of privdata are static and build from device tree,
they are moved in platdata to prepare the support of ops
of_to_plat.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
|
|
Rename stm32_sdmmc_bind to stm32_sdmmc2_bind as all other functions
in SDMMCv2 driver
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
Change-Id: Ic51acdfbbba6e971809c1029dd2227038bfe879d
|
|
|
|
As the migration deadline has passed, and all platforms have been
migrated, remove the non-DM code here.
Signed-off-by: Tom Rini <[email protected]>
|
|
There are no platforms using this architecture anymore, remove it.
Signed-off-by: Tom Rini <[email protected]>
|
|
https://source.denx.de/u-boot/custodians/u-boot-dm into next
nman external-symbol improvements
Driver model memory-usage reporting
patman test-reporting improvements
Add bloblist design goals
|
|
Commit d293759d55cc ("serial: ns16550: Add support for
SPL_DEBUG_UART_BASE") fixed support for setting correct early debug UART
base address in SPL.
But after this commit, output from Marvell A385 BootROM is truncated or
lost and not fully present on serial console.
Debugging this issue showed that BootROM just put bytes into UART HW output
buffer and does not wait until UART HW transmit all characters. U-Boot
ns16550 early debug is initialized very early and during its initialization
is resetting UART HW and flushing remaining transmit buffer (which still
contains BootROM output).
Fix this issue by waiting in init function prior resetting UART HW until
TxEmpty bit in UART Line Status Register is set. TxEmpty is set when all
remaining bytes from HW buffer are transmitted.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
[trini: Add comment, move ';' to new line per checkpatch.pl]
Signed-off-by: Tom Rini <[email protected]>
|
|
The top level DT node of pwm-leds is not a LED itself, bind NOP uclass
driver to it, and bind different LED uclass driver to its subnodes which
represent the actual LEDs. This change removes the top-level node from
the 'led list' command output and is based on the commit 01074697801b
("led: gpio: Use NOP uclass driver for top-level node").
Signed-off-by: Stefan Herbrechtsmeier <[email protected]>
|
|
With the current code if the board has an ONFI compliant NAND without
support to the get and set features, U-boot returns an ENOTSUP error when
trying to tune the timings which prevents the probe of the device.
Indeed onfi_set_features() return ENOTSUP error if set/get features is not
supported. In the case of timings we should not return ENOTSUP because we
can use the default timings. The NAND is already capable of listening at
its highest supported rate, so we assume in this case that it is fine to
skip the operation.
Fix it by adding an intermediate nand_onfi_set_timings() function which
does not error out if set/get feature is not supported.
Signed-off-by: Kory Maincent <[email protected]>
Reviewed-by: Miquel Raynal <[email protected]>
|
|
sandbox_defconfig builds the DA7219 driver. It should be possible to
build the sandbox without ACPI support.
ACPI support in the DA7219 driver is only needed when creating an ACPI
table. Fix building with ACPIGEN=n.
Fixes: 0324b7123e22 ("sound: Add an ACPI driver for Dialog Semicondutor da7219")
Signed-off-by: Heinrich Schuchardt <[email protected]>
|
|
sandbox_defconfig builds the max98357a driver. It should be possible to
build the sandbox without ACPI support.
ACPI support in the max98357a driver is only needed when creating an ACPI
table. Fix building with ACPIGEN=n.
Fixes: 54bcca29737f ("sound: Add an ACPI driver for Maxim MAX98357ac")
Signed-off-by: Heinrich Schuchardt <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_SYS_BOOTCOUNT_LE
CONFIG_SYS_BOOTCOUNT_BE
Signed-off-by: Tom Rini <[email protected]>
|
|
With the last platform for this architecture removed, remove the rest of
the architecture support as well.
Cc: Marek Vasut <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_PALMAS_POWER
Signed-off-by: Tom Rini <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_SYS_DISCOVER_PHY
Signed-off-by: Tom Rini <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_SYS_UNIFY_CACHE
Signed-off-by: Tom Rini <[email protected]>
|
|
At this point, the only user of ohci-hcd that also uses PCI is using DM,
so we can drop CONFIG_PCI_OHCI* usage. No platforms set either of
CONFIG_SYS_USB_OHCI_BOARD_INIT or CONFIG_SYS_USB_OHCI_CPU_INIT so those
hooks can be removed as well.
Signed-off-by: Tom Rini <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_SYS_OHCI_SWAP_REG_ACCESS
CONFIG_SYS_USB_OHCI_CPU_INIT
CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS
CONFIG_SYS_USB_OHCI_SLOT_NAME
CONFIG_USB_ATMEL
CONFIG_USB_ATMEL_CLK_SEL_PLLB
CONFIG_USB_ATMEL_CLK_SEL_UPLL
CONFIG_USB_OHCI_LPC32XX
CONFIG_USB_OHCI_NEW
Signed-off-by: Tom Rini <[email protected]>
|
|
Tighten up symbol dependencies in a number of places. Ensure that a SPL
specific option has at least a direct dependency on SPL. In places
where it's clear that we depend on something more specific, use that
dependency instead. This means in a very small number of places we can
drop redundant dependencies.
Reported-by: Pali Rohár <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_USB_XHCI_EXYNOS
CONFIG_USB_EHCI_EXYNOS
Signed-off-by: Tom Rini <[email protected]>
|
|
add nuvoton BMC npcm750 host configuration driver
Signed-off-by: Jim Liu <[email protected]>
|
|
Request and enable the controller level clocks.
Signed-off-by: Joel Stanley <[email protected]>
|
|
The Aspeed SDHCI controller is arranged with some shared control
registers, followed by one or two sets of actual SDHCI registers.
Adjust the driver to probe this controller device first. The driver then
wants to iterate over the child nodes to probe the SDHCI proper:
ofnode node;
dev_for_each_subnode(node, parent) {
struct udevice *dev;
int ret;
ret = device_bind_driver_to_node(parent, "aspeed_sdhci",
ofnode_get_name(node),
node, &dev);
if (ret)
return ret;
}
However if we did this the sdhci driver would probe twice; once
"naturally" from the device tree and a second time due to this code.
Instead of doing this we can rely on the probe order, where the
controller will be set up before the sdhci devices. A better solution is
preferred.
Select MISC as the controller driver is implemented as a misc device.
Signed-off-by: Joel Stanley <[email protected]>
|
|
Signed-off-by: Joel Stanley <[email protected]>
|
|
In order to use the clock from the sdhci driver, add the SD clock.
Signed-off-by: Joel Stanley <[email protected]>
|
|
Adjust clock to stay compatible with those used by the Linux kernel
device tree.
Signed-off-by: Joel Stanley <[email protected]>
|
|
A common message across platforms that prints the clock number.
Signed-off-by: Joel Stanley <[email protected]>
|
|
Signed-off-by: Joel Stanley <[email protected]>
Reviewed-by: Ryan Chen <[email protected]>
|
|
The reset control was written for the ast2500 and directly programs the
clocking register.
So we can share the code with other SoC generations use the reset device
to deassert the I2C reset line.
Signed-off-by: Joel Stanley <[email protected]>
Reviewed-by: Ryan Chen <[email protected]>
|
|
The I2C driver shares a reset line between buses, so allow it to test
the state of the reset line before resetting it.
Signed-off-by: Joel Stanley <[email protected]>
Reviewed-by: Ryan Chen <[email protected]>
|
|
Anytime a new revision of a chip is produced, Texas Instruments
will increment the 4 bit VARIANT section of the CTRLMMR_WKUP_JTAGID
register by one. Typically this will be decoded as SR1.0 -> SR2.0 ...
however a few TI SoCs do not follow this convention.
Rather than defining a revision string array for each SoC, use a
default revision string array for all TI SoCs that continue to follow
the typical 1.0 -> 2.0 revision scheme.
Signed-off-by: Bryan Brattlof <[email protected]>
|
|
add BMC NPCM750 phy control driver
Signed-off-by: Jim Liu <[email protected]>
|
|
Static DMA channel data for R5 SPL is mostly board agnostic so use SOC
configs instead of EVM specific config to ease adding new board support.
Drop J7200 EVM specific settings as its same as J721e
Signed-off-by: Vignesh Raghavendra <[email protected]>
Reviewed-by: Nishanth Menon <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_SYS_FSL_PCI_VER_3_X
Signed-off-by: Tom Rini <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_PCI_MSC01
Signed-off-by: Tom Rini <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_SH7751_PCI
Signed-off-by: Tom Rini <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_PCI_CONFIG_HOST_BRIDGE
Signed-off-by: Tom Rini <[email protected]>
|
|
This converts the following to Kconfig:
CONFIG_PCI_GT64120
Signed-off-by: Tom Rini <[email protected]>
|
