summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)Author
2022-06-28tpl: Ensure all TPL symbols in Kconfig have some TPL dependencyTom Rini
Tighten up symbol dependencies in a number of places. Ensure that a TPL specific option has at least a direct dependency on TPL. In places where it's clear that we depend on something more specific, use that dependency instead. Reported-by: Pali Rohár <[email protected]> Signed-off-by: Tom Rini <[email protected]>
2022-06-28usb: ehci-mx5: Remove non-DM codeTom Rini
The deadline for DM_USB migration has passed and all users have been migrated. Remove now unused code. Signed-off-by: Tom Rini <[email protected]>
2022-06-28usb: ehci-mxc: RemoveTom Rini
There are no platforms enabling this driver, remove. Signed-off-by: Tom Rini <[email protected]>
2022-06-28usb: xhci-fsl: Remove non-DM codeTom Rini
The deadline for DM_USB migration has passed and all users have been migrated. Remove now unused code. Signed-off-by: Tom Rini <[email protected]>
2022-06-28Convert CONFIG_USB_EHCI_TXFIFO_THRESH to KconfigTom Rini
This converts the following to Kconfig: CONFIG_USB_EHCI_TXFIFO_THRESH Signed-off-by: Tom Rini <[email protected]>
2022-06-28usb: ehci-fsl: Remove non-DM codeTom Rini
The deadline for DM_USB migration has passed and all users have been migrated. Remove now unused code. Signed-off-by: Tom Rini <[email protected]>
2022-06-28Convert CONFIG_EHCI_HCD_INIT_AFTER_RESET to KconfigTom Rini
This converts the following to Kconfig: CONFIG_EHCI_HCD_INIT_AFTER_RESET Signed-off-by: Tom Rini <[email protected]>
2022-06-28Convert CONFIG_EHCI_DESC_BIG_ENDIAN et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_EHCI_DESC_BIG_ENDIAN CONFIG_EHCI_MMIO_BIG_ENDIAN Signed-off-by: Tom Rini <[email protected]>
2022-06-28ehci-mxs: Remove non-DM codeTom Rini
This code is not enabled anywhere, drop it. Signed-off-by: Tom Rini <[email protected]>
2022-06-28Convert CONFIG_E1000_NO_NVM to KconfigTom Rini
This converts the following to Kconfig: CONFIG_E1000_NO_NVM Signed-off-by: Tom Rini <[email protected]>
2022-06-28pmic: pca9450: Add optional SD_VSEL GPIO for LDO5Frieder Schrempf
LDO5 has two separate control registers. LDO5CTRL_L is used if the input signal SD_VSEL is low and LDO5CTRL_H if it is high. The current driver implementation only uses LDO5CTRL_H. To make this work on boards that have SD_VSEL connected to a GPIO, we add support for specifying an optional GPIO and setting it to high at probe time. In the future we might also want to add support for boards that have SD_VSEL set to a fixed low level. In this case we need to change the driver to be able to use the LDO5CTRL_L register. This is a port of the same change in the Linux kernel: 8c67a11bae88 ("regulator: pca9450: Add SD_VSEL GPIO for LDO5") Signed-off-by: Frieder Schrempf <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Tested-by: Fabio Estevam <[email protected]>
2022-06-28misc: i2c_eeprom: remove 24aa02e48Eugen Hristev
This compatible does not exist in the bindings. All occurences in DT have been replaced by at24c02 which is equivalent. Fixes: 7264066707 ("misc: i2c_eeprom: Add compatible for 24AA02E48") Signed-off-by: Eugen Hristev <[email protected]> Reviewed-by: Michael Walle <[email protected]> Reviewed-by: Heiko Schocher <[email protected]>
2022-06-28sandbox: cast to pointer from integer of different sizeHeinrich Schuchardt
Building sandbox_defconfig on ARMv7 with HOST_32BIT=y results in: drivers/misc/qfw_sandbox.c:51:25: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] 51 | void *address = (void *)be64_to_cpu(dma->address); Add the missing type conversion. Fixes: 69512551aa84 ("test: qemu: add qfw sandbox driver, dm tests, qemu tests") Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2022-06-28dm: spl: Allow SPL to show memory usageSimon Glass
Add an option to tell SPL to show memory usage for driver model just before it boots into the next phase. Signed-off-by: Simon Glass <[email protected]>
2022-06-28dm: core: Add a command to show driver model statisticsSimon Glass
This command shows the memory used by driver model along with various hints as to what it might be if some 'core' tags were moved to use the tag list instead of a core (i.e. always-there) pointer. This may help with future work to reduce memory usage. Signed-off-by: Simon Glass <[email protected]>
2022-06-28dm: core: Add a way to collect memory usageSimon Glass
Add a function for collecting the amount of memory used by driver model, including devices, uclasses and attached data and tags. This information can provide insights into how to reduce the memory required by driver model. Future work may look at execution speed also. Signed-off-by: Simon Glass <[email protected]>
2022-06-28dm: core: Support accessing core tagsSimon Glass
At present tag numbers are only allocated for non-core data, meaning that the 'core' data, like priv and plat, are accessed through dedicated functions. For debugging and consistency it is convenient to use tags for this 'core' data too. Add support for this, with new tag numbers and functions to access the pointer and size for each. Update one of the test drivers so that the uclass-private data can be tested here. There is some code duplication with functions like device_alloc_priv() but this is not addressed for now. At some point, some rationalisation may help to reduce code size, but more thought it needed on that. Signed-off-by: Simon Glass <[email protected]>
2022-06-28dm: core: Switch the testbus driver to use a new structSimon Glass
At present this driver uses 'priv' struct to hold 'plat' data, which is confusing. The contents of the strct don't matter, since only dtoc is using it. Create a new struct with the correct name. Signed-off-by: Simon Glass <[email protected]>
2022-06-28dm: core: Fix addresses in the dm static commandSimon Glass
This command converts pointers to addresses, but the pointers being converted are in the image's rodata region. For sandbox this means it is not in DRAM so it does not make sense to do this conversion. Fix this by showing a simple pointer instead. Drop the unnecessary @ and hex prefixes. Signed-off-by: Simon Glass <[email protected]>
2022-06-28dm: core: Rename dm_dump_all()Simon Glass
This is not a good name anymore as it does not dump everything. Rename it to dm_dump_tree() to avoid confusion. Signed-off-by: Simon Glass <[email protected]>
2022-06-28dm: fix formatting of uclass dumpHeinrich Schuchardt
Insert an empty line after each uclass independent of whether it has devices or not. Signed-off-by: Heinrich Schuchardt <[email protected]>
2022-06-28dm: core: Use device_foreach_child where possibleSean Anderson
We have some nice macros for iterating over devices in device.h, but they are not used by the driver core. Convert all the users I could find. Signed-off-by: Sean Anderson <[email protected]>
2022-06-28sandbox: usb: Fix out-of-bounds read when fd=-1Sean Anderson
sandbox_flash_bulk uses priv->read_len to determine if priv->buff contains the response data (such as from SCSI_INQUIRY). However, if priv->fd=-1 in handle_read, then priv->read_len is not set even though we are going to PHASE_DATA. This causes sandbox_flash_bulk to try and read len bytes from priv->buff, which likely goes past the end of the buffer. Fix this by always setting priv->read_len even if we aren't going to read anything. Fixes: f4f715360c ("dm: usb: sandbox: Add an emulator for USB flash devices") Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2022-06-27Merge tag 'xilinx-for-v2022.10' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2022.10 cpu: - Add driver for microblaze cpu net: - Add support for DM_ETH_PHY to AXI emac and emaclite xilinx: - Switch platforms to DM_ETH_PHY - DT chagnes in ZynqMP and Zynq - Enable support for SquashFS zynqmp: - Add support for KR260 boards - Move BSS from address 0 - Move platform identification from board code to soc driver - Improve zynqmp_psu_init_minimize versal: - Enable loading app at EL1 serial: - Setup default address and clock rates for DEBUG uarts pinctrl: - Add support for tri state and output enable properties relocate-rela: - Clean relocate-rela implementation for ARM64 - Add support for Microblaze microblaze: - Add support for runtime relocation - Rework cache handling (wiring, Kconfig) based on cpuinfo - Remove interrupt support timer: - Extract axi timer driver from Microblaze to generic location
2022-06-27timer: Add SPL_REGMAP dependency for Xilinx timerMichal Simek
Add SPL_REGMAP dependency when SPL is enabled. This can avoid compilation issues if timer is selected but SPL_REGMAP not. Reported-by: Ovidiu Panait <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/8f6c187e04cb3127bf5148ae2dbbdf55b25ea544.1655982509.git.michal.simek@amd.com
2022-06-26clk: sunxi: Add additional RTC compatible stringsSamuel Holland
Compatible strings for some new RTC hardware variants were added to the binding. Add them to the driver in preparation for supporting those new SoCs. Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Andre Przywara <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2022-06-26gpio: sunxi: Fix build with CONFIG_SPL_SERIAL=nSamuel Holland
This driver uses simple_strtol(), so it needs SPL_STRTO. Before commit 88ca8e26958b6 ("disk: Add an option for partitions in SPL"), SPL_STRTO was always selected indirectly. Now it is not, so select it here. Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Andre Przywara <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2022-06-26sunxi: usb: convert PHY GPIO functions to DMAndre Przywara
The Allwinner USB PHY driver is still using the legacy GPIO interface, which is now implemented by the DM_GPIO compat functions. Those seem to have some design flaws, as setting the direction, then later setting the value will not work, if the DM_GPIO driver is implementing set_flags. Fix this by using the dm_ version of the direct GPIO interface, which uses struct gpio_desc structs to handle requested GPIOs, and actually keeps the flags we set earlier. This fixes USB operation on boards which need to toggle the VBUS supply via a GPIO, like the Teres-I laptop or the BananaPi M2 Berry board. Signed-off-by: Andre Przywara <[email protected]> Reported-by: Milan P. Stanić <[email protected]> Reviewed-by: Samuel Holland <[email protected]>
2022-06-25video: stm32: remove test on CONFIG_DM_REGULATORPatrick Delaunay
The tests on CONFIG_DM_REGULATOR, added to avoid compilation issues, can now be removed, they are no more needed since the commit 16cc5ad0b439 ("power: regulator: add dummy helper"). Signed-off-by: Patrick Delaunay <[email protected]>
2022-06-25driver: video: Check allocated pointersBin Meng
The codes that call STBTT_malloc() / stbtt__new_active() do not check the return value at present which may cause segfault. Signed-off-by: Bin Meng <[email protected]>
2022-06-24soc: xilinx: zynqmp: Add machine identification supportStefan Herbrechtsmeier
Add machine identification support based on the zynqmp_get_silicon_idcode_name function and use the soc_get_machine function of the soc uclass to get silicon idcode name for the fpga init. Signed-off-by: Stefan Herbrechtsmeier <[email protected]> Link: https://lore.kernel.org/r/20220620163650.18756-8-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <[email protected]>
2022-06-24soc: xilinx: zynqmp: Remove redundant checks for zynqmp_mmio_readStefan Herbrechtsmeier
Remove the redundant SPL and CurrentEL checks for the zynqmp_mmio_read function call because the function itself runs the same checks. Signed-off-by: Stefan Herbrechtsmeier <[email protected]> Link: https://lore.kernel.org/r/20220620163650.18756-7-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <[email protected]>
2022-06-24firmware: zynqmp: Probe driver before useStefan Herbrechtsmeier
Probe the driver before use to ensure that the driver is always available and the global data are valid. Initialize the global data with zero and probe the driver if the global data are still zero. This allows a usage of the firmware functions from other drivers with arbitrary order between the drivers. Signed-off-by: Stefan Herbrechtsmeier <[email protected]> Link: https://lore.kernel.org/r/20220620163650.18756-2-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <[email protected]>
2022-06-24firmware: zynqmp: Check if rx channel dev pointer is validStefan Herbrechtsmeier
Check if rx channel dev pointer is valid and not if the address of the pointer is valid. Signed-off-by: Stefan Herbrechtsmeier <[email protected]> Link: https://lore.kernel.org/r/20220620163650.18756-1-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <[email protected]>
2022-06-24microblaze: Convert axi timer to DM driverMichal Simek
Move axi timer driver from Microblaze to generic location. Origin implementation was irq based with counting down timer. CONFIG_TIMER drivers are designed differently that timer is free running up timer with automatic reload without any interrupt. Information about clock rates are find out in timer_pre_probe() that's why there is no need to get any additional information from DT in the driver itself (only register offset). Signed-off-by: Michal Simek <[email protected]> Tested-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/6c12fc86bbc1f17d05c25018862e7b7b03346b36.1654684731.git.michal.simek@amd.com
2022-06-24cpu: add CPU driver for microblazeOvidiu Panait
Add a basic CPU driver that retrieves information about the microblaze CPU core. cpu_ops handlers are implemented so that the "cpu" command can work properly: U-Boot-mONStR> cpu list 0: cpu@0 MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000 U-Boot-mONStR> cpu detail 0: cpu@0 MicroBlaze @ 50MHz, Rev: 11.0, FPGA family: zynq7000 ID = 0, freq = 50 MHz: L1 cache, MMU Note: cpu_ver_lookup[] and family_string_lookup[] arrays were imported from linux. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24microblaze: cache: introduce flush_dcache_range()Ovidiu Panait
Align microblaze with the other architectures and provide an implementation for flush_dcache_range(). Also, remove the microblaze exception in drivers/core/device.c. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24cpu-uclass: relocate ops pointers for CONFIG_NEEDS_MANUAL_RELOCOvidiu Panait
Relocate cpu_ops pointers when CONFIG_NEEDS_MANUAL_RELOC is enabled. The (gd->flags & GD_FLG_RELOC) check was added to make sure the reloc_done logic works for drivers that use DM_FLAG_PRE_RELOC. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-06-24pinctrl: zynqmp: Add support for output-enable and bias-high-impedanceAshok Reddy Soma
Add support to handle 'output-enable' and 'bias-high-impedance' configurations. DT property output-enable brings out the pins from tri-state, whereas bias-high-impedance changes the pins state to tri-state. Signed-off-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/1a02cd41d183d397ebce23c497178281c7286692.1655286745.git.michal.simek@amd.com
2022-06-24serial: Setup serial base and freq for zynq/zynqmpMichal Simek
Setup default values for debug console, base address and frequency. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/ce93efd3ed67aa6390810ce0b79e0d00e7c36b4b.1652871485.git.michal.simek@amd.com
2022-06-24net: xilinx: axi_emaclite: Use shared MDIO bus support for axi emaclite driverT Karthik Reddy
CONFIG_DM_ETH_PHY enables support to utilize generic ethernet phy framework. Though if ethernet PHY node is in other ethernet node, it will use shared MDIO to access the PHY of other ethernet. Move ethernet print info statement from plat function to probe function, as phyaddr is not enumerated when CONFIG_DM_ETH_PHY is enabled. Signed-off-by: T Karthik Reddy <[email protected]> Signed-off-by: Michal Simek <[email protected]> Reviewed-by: Ramon Fried <[email protected]> Acked-by: Ashok Reddy Soma <[email protected]> Link: https://lore.kernel.org/r/93e11ccca56b6e52b2dcc283d08d5042537f828f.1652181968.git.michal.simek@amd.com
2022-06-24net: xilinx: axi_emac: Use shared MDIO bus support for axi emac driverT Karthik Reddy
CONFIG_DM_ETH_PHY enables support to utilize generic ethernet phy framework. Though if ethernet PHY node is in other ethernet node, it will use shared MDIO to access the PHY of other ethernet. Move ethernet print info statement from plat function to probe function, as phyaddr is not enumerated when CONFIG_DM_ETH_PHY is enabled. Signed-off-by: T Karthik Reddy <[email protected]> Signed-off-by: Michal Simek <[email protected]> Reviewed-by: Ramon Fried <[email protected]> Acked-by: Ashok Reddy Soma <[email protected]> Link: https://lore.kernel.org/r/ecfec78234233fefdc172c141c207b2d78ef70c5.1652181968.git.michal.simek@amd.com
2022-06-23Merge branch '2022-06-23-scmi-optee-and-smccc-updates' into nextTom Rini
This consists of two slightly related series. For the first, to quote the author: This series implements 2 features in driver/firmware/scmi. First, a single change adds support for SCMI OP-TEE transport to use OP-TEE native shared memory. See the 1st patch in this series: "firmware: scmi: optee: use TEE shared memory for SCMI messages". Then come changes for supporting multi-channel in the SCMI drivers. I've split the implementation in 11 several small incremental changes in the hope it helps the review. Few minor fixup commits are also inserted in the series. And the second series implements some smccc improvements.
2022-06-23drivers: rng: add smccc trng driverEtienne Carriere
Adds random number generator driver using Arm SMCCC TRNG interface to get entropy bytes from secure monitor. The driver registers as an Arm SMCCC feature driver to allow PSCI driver to bind a device for when secure monitor exposes RNG support from Arm SMCCC TRNG interface. Cc: Sughosh Ganu <[email protected]> Cc: Heinrich Schuchardt <[email protected]> Signed-off-by: Etienne Carriere <[email protected]>
2022-06-23firmware: psci: bind arm smccc features when discoveredEtienne Carriere
Use PSCI device to query Arm SMCCC v1.1 support from secure monitor and if so, bind drivers for the SMCCC features that monitor supports. Drivers willing to be bound from Arm SMCCC features discovery can use macro ARM_SMCCC_FEATURE_DRIVER() to register to smccc feature discovery, providing target driver name and a callback function that returns whether or not the SMCCC feature is supported by the system. Signed-off-by: Etienne Carriere <[email protected]>
2022-06-23firmware: psci: reorder header files inclusionEtienne Carriere
Fixes ordering of header files inclusion in PSCI firmware driver. Signed-off-by: Etienne Carriere <[email protected]>
2022-06-23firmware: scmi: use multi channel in mailbox, optee and smccc agentsEtienne Carriere
Updates .process_msg operators of the SCMI transport drivers that supports multi-channel to use it now that drivers do provide the reference through channel argument. These are the mailbox agent, the optee agent and the smccc agent. Signed-off-by: Etienne Carriere <[email protected]>
2022-06-23power: regulator: scmi: simplify scmi_voltd_set_enable()Etienne Carriere
Simplify scmi_voltd_set_enable() exit sequence. Cc: Jaehoon Chung <[email protected]> Signed-off-by: Etienne Carriere <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2022-06-23power: regulator: scmi: support SCMI multi-channelEtienne Carriere
Update SCMI regulator controller driver to get its assigned SCMI channel during initialization. This change allows SCMI voltage domain protocol to use a dedicated channel when defined in the DT. The reference is saved in SCMI regulator controller driver private data. Cc: Jaehoon Chung <[email protected]> Signed-off-by: Etienne Carriere <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2022-06-23reset: scmi: support SCMI multi-channelEtienne Carriere
Update SCMI reset controller driver to get its assigned SCMI channel during initialization. This change allows SCMI reset domain protocol to use a dedicated channel when defined in the DT. The reference is saved in SCMI reset controller driver private data. Signed-off-by: Etienne Carriere <[email protected]>