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This is used to avoid the ports status of IPPC being brought in kernel
stage, it may cause ports error especially when the xhci controller is
a component of dual-role controller.
Reported-by: Yun-Chien Yu <[email protected]>
Signed-off-by: Chunfeng Yun <[email protected]>
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CONFIG_VAL(DEBUG_UART_BASE) expands to CONFIG_DEBUG_UART_BASE or
CONFIG_SPL_DEBUG_UART_BASE or CONFIG_TPL_DEBUG_UART_BASE and allows boards
to set different values for SPL, TPL and U-Boot Proper.
For ns16550 driver this support is there since commit d293759d55cc
("serial: ns16550: Add support for SPL_DEBUG_UART_BASE").
Signed-off-by: Pali Rohár <[email protected]>
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Add a check for calloc() failing to allocate the requested memory.
Make decode_regions() return an error code.
Cc: Bin Meng <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stefan Roese <[email protected]>
Signed-off-by: Pierre-Clément Tosi <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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access
CONFIG_MMC only initializes drivers for devices in UCLASS_MMC, we need
to initialize drivers for devices of type IF_TYPE_MMC in UCLASS_BLK as
well because they are the child devices of devices in UCLASS_MMC. This
is required for feature RPMB since it will access eMMC in optee-os.
Signed-off-by: Judy Wang <[email protected]>
[trini: Add my SoB line and adjust Judy's name in git, having emailed
off-list]
Signed-off-by: Tom Rini <[email protected]>
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ARM semihosting provides no provisions for determining if there is
pending input. The only way to determine if there is console input is to
do a read (and block until the user types something). For this reason,
we always return true for tstc (since you will always get input if you
try). However, this behavior can cause problems for code which expects
tstc to eventually be empty. In query_console_serial, there is the
following construct:
/* empty input buffer */
while (tstc())
getchar();
with the current implementation, this effectively turns into an infinite
loop. To avoid this, fake tstc by returning false half of the time. This
is generally OK because the other common construct looks like
do {
if (tstc())
process(getchar());
} while (!timeout());
so it's fine if we only read a new character every other loop. This will
break things like CYGACC_COMM_IF_GETC_TIMEOUT, but that could be
reworked to test on the timeout instead of calling tstc again (and
ymodem over semihosted serial is not that useful in the first place).
Signed-off-by: Sean Anderson <[email protected]>
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Replace in the function of_machine_is_compatible(), the used API
fdt_node_check_compatible() by ofnode_device_is_compatible()
to support a live tree.
Signed-off-by: Patrick Delaunay <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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Set correct type for 3rd argument of ofnode_get_addr_size_index_notrans()
function. It expects fdt_size_t * and not fdt_addr_t *.
When these two types do not have same size then U-Boot throw compile
warning:
drivers/mtd/mtdpart.c: In function ‘add_mtd_partitions_of’:
drivers/mtd/mtdpart.c:906:57: warning: passing argument 3 of ‘ofnode_get_addr_size_index_notrans’ from incompatible pointer type [-Wincompatible-pointer-types]
offset = ofnode_get_addr_size_index_notrans(child, 0, &size);
^~~~~
In file included from include/dm/device.h:13,
from include/linux/mtd/mtd.h:26,
from include/ubi_uboot.h:28,
from drivers/mtd/mtdpart.c:27:
include/dm/ofnode.h:530:25: note: expected ‘fdt_size_t *’ {aka ‘long long unsigned int *’} but argument is of type ‘fdt_addr_t *’ {aka ‘long unsigned int *’}
fdt_size_t *size);
~~~~~~~~~~~~^~~~
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Marek Behún <[email protected]>
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We have many cases of SPL (or TPL or VPL) drivers that don't depend on
SPL_MISC (and so on) but rather just MISC.
Cc: Sean Anderson <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Sean Anderson <[email protected]>
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CONFIG_DM_EVENT without CONFIG_EVENT is non-functional.
Let CONFIG_DM_EVENT depend on CONFIG_EVENT.
Remove superfluous stub in include/event.h.
Fixes: 5b896ed5856f ("event: Add events for device probe/remove")
Reported-by: Jan Kiszka <[email protected]>
Signed-off-by: Heinrich Schuchardt <[email protected]>
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CONFIG_FIXED_SDHCI_ALIGNED_BUFFER is needed on some Marvell SoCs when
booting from MMC. All existing usages of this have the same value so
make this the default and have the Kconfig option depend on SPL &&
MVEBU_SPL_BOOT_DEVICE_MMC.
Signed-off-by: Chris Packham <[email protected]>
Reviewed-by: Marek Behún <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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This converts the following to Kconfig:
CONFIG_TPL_NAND_INIT
Signed-off-by: Tom Rini <[email protected]>
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There are no platforms that set this, remove the code.
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_SPL_COMMON_INIT_DDR
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_SPL_SYS_MALLOC_SIMPLE
The problem here is that a few platforms have been doing:
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_MALLOC_SIMPLE
#endif
instead of defining CONFIG_SPL_SYS_MALLOC_SIMPLE directly. Correct this
and update the documentation in a few places to match usage.
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_SYS_CFI_FLASH_STATUS_POLL
Signed-off-by: Tom Rini <[email protected]>
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This converts the following to Kconfig:
CONFIG_SYS_FLASH_CFI_WIDTH
Signed-off-by: Tom Rini <[email protected]>
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This is always defined to 2, and referenced in two places. Move the
define to <asm/omap_common.h> and make sure the code that uses this
includes that file. Make <asm/arch-omap*/clock.h> not include that
file, as we don't need to be doing so.
Signed-off-by: Tom Rini <[email protected]>
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If the device fails to probe - for example, when there is no
ethaddr set - then the private data is automatically freed
but the mdiobus remains registered.
Fixes: 1e354cb39314 ("drivers: net: fsl_enetc: register internal MDIO bus")
Signed-off-by: Michael Walle <[email protected]>
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This driver depends on PCI. Update the Kconfig accordingly.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Tim Harvey <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.07-rc4
zynqmp:
- Fix DP PLL configuration for zcu102/zcu106 and SOM
- Fix split mode for starting R5s
- DT fixes
- Remove firmware node for mini configurations
- Wire TEE for multi DTB fit image
xilinx:
- Handle board_get_usable_ram_top(0) properly
phy:
- Extend psgtr timeout
mmc:
- Fix mini configuration which misses zynqmp_pm_is_function_supported()
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The bulk of it is (finally!) some DT sync from the kernel. We refrained
from syncing one incompatible change, as this would spoil booting Linux
kernels before v5.13 with U-Boot's DT (via UEFI, for instance).
I test booted Linux v5.18 and v5.4 with that new DT on some boards, and
the headless peripherals (MMC, USB, Ethernet) seemed to work.
The rest are fixes:
- silencing missing clock warnings due to the new pinctrl driver
- fixing "UART0 on PortF", allowing UART access through the SD card pins
- add an F1C100s clock driver, to enable MMC support (SPI comes later)
- some cleanups for CONS_INDEX_n in Kconfig
Tested on BananaPi-M1, Pine64-LTS, Pine-H64, X96-Mate (H616) and
OrangePi-Zero.
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Add support for i2c devices
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These were only ever implied by sunxi platforms, and that usage has
been removed. Current practice is to specify CONFIG_CONS_INDEX in each
board's defconfig.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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Some devices enumerate various clocks in their DT, and many drivers
just blanketly try to enable all of them. This creates problems
since we only model a few gate clocks, and the clock driver outputs
a warning when a clock is not described:
=========
sunxi_set_gate: (CLK#3) unhandled
=========
Some clocks don't have an enable bit, or are already enabled in a
different way, so we might want to just ignore them.
Add a CCU_CLK_F_DUMMY_GATE flag that indicates that case, and define
a GATE_DUMMY macro that can be used in the clock description array.
Define a few clocks, used by some pinctrl devices, that way to suppress
the runtime warnings.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
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The introduction of the DM pinctrl driver made its probe function enable
all clocks enumerated in the DT. This includes the "CLK_BUS_PIO" (and
variations) gate clock. Also CLK_PLL_PERIPH0 is used by the R_CCU device.
So far we didn't describe those clocks in our clock driver.
As we enable them already in the SPL, the devices happen to work, but
the clock driver still complains about not finding those clocks:
=========
sunxi_set_gate: (CLK#58) unhandled
=========
Add the one-liners that are needed to announce the gate bit for those
clocks, to silence that message on the console.
Signed-off-by: Andre Przywara <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
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H6 is from the sun50i family, not sun6i.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Heinrich Schuchardt <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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Now that the pinmux conflict is handled in the board code (by skipping
setup for the one conflicting MMC controller), the driver does not need
to be entirely disabled based on the UART pinmux.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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Add the tpm2_tis_i2c driver that should support any TPMv2 compliant
I2C chips, such as the NPCT75X chip.
[Ilias rename priv_auto_alloc_size to priv_auto]
Signed-off-by: Eddie James <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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Commit 0980cbba7b3c ("mmc: fsl_esdhc_spl: pre-PBL: implement redundancy
support") changed number of sectors which are read but did not adjusted
error check.
Fix it and check for if correct number of sectors were read.
Fixes: 0980cbba7b3c ("mmc: fsl_esdhc_spl: pre-PBL: implement redundancy support")
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Jaehoon Chung <[email protected]>
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Now, spi_flash_probe_bus_cs() relies on DT for spi speed and mode
and logically calls spi_get_bus_and_cs(). In case spi mode and speed are
not read from DT, make usage of spi_flash_probe() instead.
To sum-up:
- Previous call tree was:
spi_flash_probe() -> spi_flash_probe_bus_cs() -> spi_get_bus_and_cs()
- Current call tree is:
spi_flash_probe() -> _spi_get_bus_and_cs()
spi_flash_probe_bus_cs() -> spi_get_bus_and_cs()
This patch impacts the following :
- cmd/sf.c: if spi mode and/or speed is passed in argument of
do_spi_flash_probe(), call spi_flash_probe() otherwise call
spi_flash_probe_bus_cs().
- drivers/net/fm/fm.c: as by default spi speed and mode was set to
0 and a comment indicates that speed and mode are read from DT,
use spi_flash_probe_bus_cs().
- drivers/net/pfe_eth/pfe_firmware.c: spi speed and mode are not read
from DT by all platforms using this driver, so keep legacy and replace
spi_flash_probe_bus_cs() by spi_flash_probe();
- drivers/net/sni_netsec.c : spi speed and mode are not read from DT,
so replace spi_flash_probe_bus_cs() by spi_flash_probe().
- drivers/usb/gadget/max3420_udc.c: Can't find any platform which make
usage of this driver, nevertheless, keep legacy and replace
spi_get_bus_and_cs() by _spi_get_bus_and_cs().
- env/sf.c: a comment indicates that speed and mode are read
from DT. So use spi_flash_probe_bus_cs().
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Marek Behun <[email protected]>
Cc: Jagan Teki <[email protected]>
Cc: Vignesh R <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: "Pali Rohár" <[email protected]>
Cc: Konstantin Porotchkin <[email protected]>
Cc: Igal Liberman <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Pratyush Yadav <[email protected]>
Cc: Sean Anderson <[email protected]>
Cc: Anji J <[email protected]>
Cc: Biwen Li <[email protected]>
Cc: Priyanka Jain <[email protected]>
Cc: Chaitanya Sakinam <[email protected]>
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Move legacy spi_get_bus_and_cs() code to _spi_get_bus_and_cs().
Add new spi_get_bus_and_cs() implementation which rely on DT
for speed and mode and don't need any drv_name nor dev_name
parameters. This will prepare the ground for next patch.
Update all callers to use _spi_get_bus_and_cs() to keep the
same behavior.
Signed-off-by: Patrice Chotard <[email protected]>
Cc: Marek Behun <[email protected]>
Cc: Jagan Teki <[email protected]>
Cc: Vignesh R <[email protected]>
Cc: Joe Hershberger <[email protected]>
Cc: Ramon Fried <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Stefan Roese <[email protected]>
Cc: "Pali Rohár" <[email protected]>
Cc: Konstantin Porotchkin <[email protected]>
Cc: Igal Liberman <[email protected]>
Cc: Bin Meng <[email protected]>
Cc: Pratyush Yadav <[email protected]>
Cc: Sean Anderson <[email protected]>
Cc: Anji J <[email protected]>
Cc: Biwen Li <[email protected]>
Cc: Priyanka Jain <[email protected]>
Cc: Chaitanya Sakinam <[email protected]>
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Requesting the locality uses the timeout values, so they need
to be set beforehand.
Signed-off-by: Eddie James <[email protected]>
Reviewed-by: Ilias Apalodimas <[email protected]>
Reviewed-by: Joel Stanley <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20220523
-------------------
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12087
Additionally to u-boot-imx20200520:
- DH MX8MP
- i.MX GPIO: reading GPIO when direction is output
- Menlo i.MX53: switch to DM
And from u-boot-imx20200520:
- fix Verdin hang
- add pca9450 regulator
- conversion to DM_SERIAL
- NAND block handling
- fix crypto
- enable cache on some boards
- add ACC board (MX6)
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Add support for reading GPIO pin value when function is output.
With this patch applied, gpio toggle command is working.
Signed-off-by: Christoph Fritz <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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The f1c100s has a clock tree similar to those of other sunxi parts.
Add support for it.
Signed-off-by: George Hilliard <[email protected]>
Signed-off-by: Yifan Gu <[email protected]>
Acked-by: Sean Anderson <[email protected]>
[Andre: add PIO and I2C]
Signed-off-by: Andre Przywara <[email protected]>
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Missing nodes may also be signaled via -ENODATA. We need to check for
that to prevent failing in non-usb3 setups.
Furthermore, dev.phy must be NULL'ed in case usb3-phy was not found.
Fixes: 142d50fbce7c ("usb: dwc3: Add support for usb3-phy PHY configuration")
Signed-off-by: Jan Kiszka <[email protected]>
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Add PCA9450 regulator driver. This is complementary driver for the BUCKn
and LDOn regulators provided by the PCA9450 PMIC driver. Currently the
driver permits reading the settngs and configuring the BUCKn and LDOn
regulators.
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
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The upstream DT regulators node subnodes are named BUCKn and LDOn,
the downstream DT regulators node subnodes are named buckn and ldon,
add the upstream match.
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
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The specific implementation was having bug. Those bugs are since
the beginning of the implementation. Some manufactures can already
experience this bug in their SPL code. This bug can be more visible on
architecture that has complicated boot process like imx8mn. Older
version of uboot can be affected if the bad block
appear in correspoding of the beginning of u-boot image. In order to
adjust the function we scan from the first erase block.
The problematic part of old code was in this part:
while (is_badblock(mtd, offs, 1)) {
page = page + nand_page_per_block;
/* Check i we've reached the end of flash. */
if (page >= mtd->size >> chip->page_shift) {
free(page_buf);
return -ENOMEM;
}
}
Even we fix it adding increment of the offset of one erase block size
, we don't fix the problem, because the first erase block where the
image start is not checked. The code was tested on an imx8mn where
the boot rom api was not able to skip it. This code is used by other
architecures like imx6 and imx8mm
Cc: Han Xu <[email protected]>
Cc: Fabio Estevam <[email protected]>
Acked-by: Han Xu <[email protected]>
Tested-By: Tim Harvey <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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Move the hook after nand_scan_tail is called. The hook must be replaced
to the mxs specific one but those must to be assignment later in the
probe function.
With this fix markbad is working again. Before this change:
nand markbad 0xDEC00
NXS NAND: Writing OOB isn't supported
NXS NAND: Writing OOB isn't supported
block 0x000dec00 NOT marked as bad! ERROR 0
Cc: Han Xu <[email protected]>
Cc: Fabio Estevam <[email protected]>
Acked-by: Han Xu <[email protected]>
Tested-By: Tim Harvey <[email protected]>
Signed-off-by: Michael Trimarchi <[email protected]>
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HW accelerated hash operations are giving incorrect hash output.
so add flush and invalidate for input/output hash buffers.
Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware acceleration.)
Signed-off-by: Gaurav Jain <[email protected]>
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implement get f/w version api.
print ele f/w version in spl.
Signed-off-by: Gaurav Jain <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Pankaj Gupta <[email protected]>
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When the device tree indicates support for role switching through
the "usb-role-switch" property, take the "role-switch-default-mode"
property into account when deciding which role to put the
controller into.
This makes USB devices work on Apple M1 systems where the device
tree may include a "dr_mode" property that is set to "otg", but
where we need to put the controller into "host" mode to see
devices connected to the type-C ports.
Signed-off-by: Mark Kettenis <[email protected]>
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I was trying to employ lpddr4_mr_read() to something similar to what
the imx8mm-cl-iot-gate board is doing for auto-detecting the RAM
type. However, the version in drivers/ddr/imx/imx8m/ddrphy_utils.c
differs from the private one used by that board in how it extracts the
byte value, and I was only getting zeroes. Adding a bit of debug
printf'ing gives me
tmp = 0x00ffff00
tmp = 0x00070700
tmp = 0x00000000
tmp = 0x00101000
and indeed I was expecting a (combined) value of 0xff070010 (0xff
being Manufacturer ID for Micron). I can't find any documentation that
says how the values are supposed to be read, but clearly the iot-gate
definition is the right one, both for its use case as well as my
imx8mp-based board.
So lift the private definition of lpddr4_mr_read() from the
imx8mm-cl-iot-gate board code to ddrphy_utils.c, and add a declaration
in the ddr.h header where e.g. get_trained_CDD() is already declared.
This has only been compile-tested for the imx8mm-cl-iot-gate
board (since I don't have the hardware), but since I've merely moved
its definition of lpddr4_mr_read(), I'd be surprised if it changed
anything for that board.
Signed-off-by: Rasmus Villemoes <[email protected]>
Tested-by: Ying-Chun Liu (PaulLiu) <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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rng driver enabled to read random number using caam.
Signed-off-by: Gaurav Jain <[email protected]>
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RNG Hardware error is reported due to incorrect entropy delay
rng self test are run to determine the correct ent_dly.
test is executed with different voltage and temperature to identify the
worst case value for ent_dly. after adding a margin value(1000),
ent_dly should be at least 12000.
Signed-off-by: Gaurav Jain <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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Because mxs_nand_spl driver does not support DM, to use the minimum ECC
layout, it needs to handle the CONFIG_NAND_MXS_USE_MINIMUM_ECC.
Signed-off-by: Ye Li <[email protected]>
Reviewed-by: Han Xu <[email protected]>
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Waiting for SR_BUSY bit when receiving a new command is not needed.
SR_BUSY bit is already managed in the previous command treatment.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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Currently, SR_TCF flag is checked in case there is data, this criteria
is not correct.
SR_TCF flags is set when programmed number of bytes have been transferred
to the memory device ("bytes" comprised command and data send to the
SPI device).
So even if there is no data, we must check SR_TCF flag.
Signed-off-by: Patrice Chotard <[email protected]>
Reviewed-by: Patrick Delaunay <[email protected]>
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