summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)Author
2022-02-08phy: cadence: Sierra: Prepare driver to add support for multilink configurationsSwapnil Jakhade
Sierra driver currently supports single link configurations only. Prepare driver to support multilink multiprotocol configurations along with different SSC modes. Signed-off-by: Swapnil Jakhade <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: ti: phy-j721e-wiz.c: Fix the condition for setting P_ENABLE_FORCEAswath Govindraju
Fix the condition for setting P_ENABLE_FORCE bit, by syncing with the driver in kernel. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as a clockAswath Govindraju
Sierra has two PLLs, PLL_CMNLC and PLL_CMNLC1 and each of these PLLs has two inputs, plllc_refclk (input from pll0_refclk) and refrcv (input from pll1_refclk). Model PLL_CMNLC and PLL_CMNLC1 as a clock so that it's possible to select one of these two inputs from device tree. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Add a UCLASS_PHY device for linksAswath Govindraju
Add a driver of type UCLASS_PHY for each of the link nodes in the serdes instance. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Add missing clk_disable_unprepare() in .remove callbackKishon Vijay Abraham I
Add missing clk_disable_unprepare() in cdns_sierra_phy_remove(). Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Add array of input clocks in "struct cdns_sierra_phy"Kishon Vijay Abraham I
Instead of having separate structure members for each input clock, add an array for the input clocks within "struct cdns_sierra_phy". This is in preparation for adding more input clocks required for supporting additional clock combination. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Move all reset_control_get*() to a separate functionKishon Vijay Abraham I
No functional change. Group devm_reset_control_get() and devm_reset_control_get_optional() to a separate function. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Move all clk_get_*() to a separate functionKishon Vijay Abraham I
No functional change. Group all devm_clk_get_optional() to a separate function. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Create PHY only for "phy" or "link" sub-nodesKishon Vijay Abraham I
Cadence Sierra PHY driver registers PHY using devm_phy_create() for all sub-nodes of Sierra device tree node. However Sierra device tree node can have sub-nodes for the various clocks in addtion to the PHY. Use devm_phy_create() only for nodes with name "phy" (or "link" for old device tree) which represent the actual PHY. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: Sierra: Fix PHY power_on sequenceKishon Vijay Abraham I
Commit 39b823381d9d ("phy: cadence: Add driver for Sierra PHY") de-asserts PHY_RESET even before the configurations are loaded in phy_init(). However PHY_RESET should be de-asserted only after all the configurations has been initialized, instead of de-asserting in probe. Fix it here. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08phy: cadence: sierra: Fix for USB3 U1/U2 stateSanket Parmar
Updated values of USB3 related Sierra PHY registers. This change fixes USB3 device disconnect issue observed while enternig U1/U2 state. Signed-off-by: Sanket Parmar <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08remoteproc: ipu: Add driver to bring up ipuKeerthy
The driver enables IPU support. Basically enables the clocks, timers, watchdog timers and bare minimal MMU and supports loading the firmware from mmc. Signed-off-by: Keerthy <[email protected]> [Amjad: fix compile warnings] Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08remoteproc: uclass: Add remoteproc resource handling helpersKeerthy
Add remoteproc resource handling helpers. These functions are primarily to parse the resource table and to handle different types of resources. Carveout, devmem, trace & vring resources are handled. Signed-off-by: Keerthy <[email protected]> [Amjad: fix redefinition of "struct resource_table" and compile warnings ] Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08drivers: misc: Makefile: Enable fs_loader compilation at SPL LevelKeerthy
Enable fs_loader compilation at SPL Level. Signed-off-by: Keerthy <[email protected]> [Amjad: fix compilation failures for J721e platform] Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08reset: dra7: Add a reset driverKeerthy
Add a reset driver to bring IPs out of reset. Signed-off-by: Keerthy <[email protected]> [Amjad: reset_ops structure member "free" has been renamed to "rfree", use the latter instead] Signed-off-by: Amjad Ouled-Ameur <[email protected]>
2022-02-08soc: soc_ti_k3: update j721e revision numberingBryan Brattlof
There is a 4 bit VARIANT number inside the JTAGID register that TI increments any time a new variant for a chip is produced. Each family of TI's SoCs uses a different versioning scheme based off that VARIANT number. CC: Dave Gerlach <[email protected]> Signed-off-by: Bryan Brattlof <[email protected]>
2022-02-08soc: ti: k3-socinfo: Add entry for J721S2 SoCDavid Huang
Add support for J721S2 SoC identification. Signed-off-by: David Huang <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08ram: k3-ddrss: Add support for J721S2 SoCDavid Huang
Add support for DDR subsystem in J721S2 SoC. Signed-off-by: David Huang <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08power: domain: ti: Add support for J721S2 SoCDavid Huang
Add support for J721S2 SoC. Signed-off-by: David Huang <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2022-02-08clk: clk-k3: Add support for J721S2 SoCDavid Huang
Add support for J721S2 SoC. Signed-off-by: David Huang <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08drivers: dma: Add support for J721S2David Huang
Add support for DMA in J721S2 SoC. Signed-off-by: David Huang <[email protected]> Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08ram: k3-ddrss: Add support for configuring MSMC subsystem in case of ↵Aswath Govindraju
Multiple DDR subsystems In Multi DDR subystems with interleaving support, the following needs to configured, - interleaving granular size and region - EMIFs to be enabled - EMIFs with ecc to be enabled - EMIF separated or interleaved - number of cycles of unsuccessful EMIF arbitration to wait before arbitrating for a different EMIF port, by default set to 3 Add support for configuring all the above by using a MSMC device Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08ram: k3-ddrss: Add support for multiple instances of DDR subsystemsAswath Govindraju
The current driver only supports single instance of DRR subsystem. Add support for probing multiple instances of DDR subsystem. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08ram: k3-ddrss: lpddr4_structs_if.h: Add a pointer to ddr instanceAswath Govindraju
Add a pointer to ddr instance int the lpddr4_privatedata_s structure for supporting mutliple instances of DDR in the drivers. Signed-off-by: Aswath Govindraju <[email protected]>
2022-02-08remoteproc: k3_system_controller: Support optional boot_notification channelNishanth Menon
If there is an optional boot notification channel that an SoC uses separate from the rx path, use the same. Signed-off-by: Nishanth Menon <[email protected]>
2022-02-05clk: imx: select [SPL_]CLK_COMPOSITE_CCF for imxrt10{20|50}Heiko Thiery
The clock composite is required when using the clock framework. So select it automatically. Signed-off-by: Heiko Thiery <[email protected]> Reviewed-by: Giulio Benetti <[email protected]>
2022-02-05regulator: bd718x7: Bypass bogus warningsMarek Vasut
When regulator consumer attempts to set enabled DVS regulator voltage, the driver aborts with "Only DVS bucks can be changed when enabled". In case the regulator is already set to specified voltage, do nothing instead of failing outright. When regulator consumer attempts to set enables regulator which cannot be controlled because it is already always enabled, the driver aborts with -EINVAL. Again, do nothing in such case and return 0, because the request is really fulfilled, the regulator is enabled. Signed-off-by: Marek Vasut <[email protected]> Cc: Matti Vaittinen <[email protected]>
2022-02-05GPIO: fxl6408: Add support for FXL6408 GPIO expanderOleksandr Suvorov
Initial support for Fairchild's 8 bit I2C gpio expander FXL6408. The CONFIG_FXL6408_GPIO define enables support for such devices. Based on: https://patchwork.kernel.org/patch/9148419/ Signed-off-by: Oleksandr Suvorov <[email protected]> Reviewed-by: Simon Glass <[email protected]> Tested-by: Marcel Ziswiler <[email protected]> Reviewed-by: Heiko Schocher <[email protected]> Signed-off-by: Oleksandr Suvorov <[email protected]>
2022-02-05spi: mxc_spi: remove redundant code in spi_xchg_single()Haolin Li
The value of cnt is overwritten without being used. Signed-off-by: Haolin Li <[email protected]> Reviewed-by: Fabio Estevam <[email protected]>
2022-02-05imx8ulp: ddr: Fix DDR frequency request issueYe Li
After acking the requested frequency, should wait the ack bit clear by DDR controller and check the DFS interrupt for next request polling. Otherwise, the next polling of request bit will get previous value that DDR controller have not cleared it, so a wrong request frequency is used. Reviewed-by: Peng Fan <[email protected]> Signed-off-by: Ye Li <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2022-02-05imx8ulp:ddr: saving the dram config timing data into sramJacky Bai
On i.MX8ULP, The dram config timing need to be saved into sram for ddr retention when APD enter PD mode, so add this support on i.MX8ULP. Reviewed-by: Ye Li <[email protected]> Signed-off-by: Jacky Bai <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2022-02-04spi: zynq_qspi: Add SPI memory operations to zynq qspiT Karthik Reddy
Spi memory operation interface is added to zynq qspi driver to provide an high-level interface to execute qspi controller specific memory operations by avoiding spi_mem_exec_op() from spi-mem framework. Signed-off-by: T Karthik Reddy <[email protected]> Signed-off-by: Ashok Reddy Soma <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-02-04spi: zynq_qspi: Add a check for baudrate and set default if not in limitsSiva Durga Prasad Paladugu
Add a check afer baudrate calculation to see if the resultant value falls within the range, else set it to default baudrate value. Signed-off-by: Siva Durga Prasad Paladugu <[email protected]> Signed-off-by: Ashok Reddy Soma <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-02-04spi: zynq_qspi: Read only one byte at a time from txbufSiva Durga Prasad Paladugu
Read only one byte at a time from txbuf as txbuf may not be aligned and accessing more than a byte at a time may cause alignment issues. This fixes the issue of data abort exception while writing to flash device. Signed-off-by: Siva Durga Prasad Paladugu <[email protected]> Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Ashok Reddy Soma <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-02-04spi: zynq_qspi: Typecast rxbuf properlySiva Durga Prasad Paladugu
This patch typecasts and accesses rx buf properly as an unaligned rxbuf, typecasting with u16 and accessing it causes data abort exception and this patch fixes it. Signed-off-by: Siva Durga Prasad Paladugu <[email protected]> Signed-off-by: Michal Simek <[email protected]> Signed-off-by: Ashok Reddy Soma <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-02-03net: ti: am65-cpsw: Cleanup resources before jump to kernelVignesh Raghavendra
In case fastboot over Ethernet, am65_cpsw_stop() is not called unless DM_FLAG_OS_PREPARE is set. Without call to am65_cpsw_stop(), DMA resources are not released thus leading to failures in kernel. Fix this by adding DM_FLAG_OS_PREPARE flag to am65_cpsw_nuss_port driver. Reported-by: Christian Gmeiner <[email protected]> Signed-off-by: Vignesh Raghavendra <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2022-02-02Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
Update and fixes for ls1088a, FMAN, ls1046ardb, ls1043ardb sync ls1028ardb u-boot and Linux device-tree
2022-02-01net: xilinx: fix the wrong dma base address issueGreentime Hu
If we just use fdtdec_get_addr_size_fixed to get "reg" it will use 64bit address cell to get the base address. soc { #address-cells = <1>; #size-cells = <1>; compatible ="SiFive,FU500-soc", "fu500-soc", "sifive-soc", "simple-bus"; ranges; L28: axidma@30010000 { #dma-cells = <1>; compatible = "xlnx,axi-dma-1.00.a"; axistream-connected = <&L27>; axistream-control-connected = <&L27>; clocks = <&L1>; interrupt-parent = <&L6>; interrupts = <32 33>; reg = <0x30010000 0x4000>; fdtdec_get_addr_size_fixed: reg: addr=3001000000004000 We should get the base address through its parent's address-cells and size-cells settings. So we should use fdtdec_get_addr_size_auto_parent() to get correct base address. After applying this patch, we can get the correct base address of dma by replacing fdtdec_get_addr_size_fixed() with fdtdec_get_addr_size_auto_parent(). fdtdec_get_addr_size_auto_parent: na=1, ns=1, fdtdec_get_addr_size_fixed: reg: addr=30010000 Signed-off-by: Greentime Hu <[email protected]> Signed-off-by: Andy Chiu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-02-01mtd: cfi_mtd: populate mtd->dev with flash_info->devPatrice Chotard
Populate mtd->dev with flash_info->dev which allows to get full mtd information using the "mtd list" command. Before, "mtd list" command returns : List of MTD devices: * nor0 - type: NOR flash - block size: 0x40000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "nor0" After this patch we get for example: List of MTD devices: * nor0 - device: flash@0 - parent: spi@40430000 - driver: cfi_flash - path: /soc/spi@40430000/flash@0 - type: NOR flash - block size: 0x40000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "nor0" Signed-off-by: Patrice Chotard <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2022-02-01rtc: pcf2127: remove U-Boot specific compatible stringVladimir Oltean
Now that all in-tree boards have been converted to the compatible strings from Linux, delete the support for the ad-hoc "pcf2127-rtc" one. Cc: Simon Glass <[email protected]> Signed-off-by: Vladimir Oltean <[email protected]> Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Michael Walle <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>
2022-02-01rtc: pcf2127: sync with Linux compatible stringsVladimir Oltean
Allow this driver to be used by boards which inherit their device trees from Linux. Compatibility is temporarily retained with the old compatible string which is U-Boot specific, and will be removed after a few changes. Cc: Simon Glass <[email protected]> Signed-off-by: Vladimir Oltean <[email protected]> Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Michael Walle <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>
2022-02-01i2c: muxes: pca954x: add PCA9847 variantVladimir Oltean
This seems to be very similar to the already existing PCA9547, save for the fact that it supports 0.8V and doesn't support 5V. In fact, it is so similar to the PCA9547 that the NXP LS1028A-RDB board has been driving this chip using a "nxp,pca9547" compatible string. Create a new compatible for the PCA9847 (which is the same as in Linux) and define the same operating parameters for it as for PCA9547. Cc: Heiko Schocher <[email protected]> Signed-off-by: Vladimir Oltean <[email protected]> Reviewed-by: Heiko Schocher <[email protected]> Reviewed-by: Priyanka Jain <[email protected]> Reviewed-by: Michael Walle <[email protected]>
2022-02-01pci: layerscape: update the searching compatible of LX2160A PCIeHou Zhiqiang
The current fixup of LX2160A PCIe nodes is based on non-production rev1 silicon, and in Linux the nodes have been updated for rev2 silicon, so update the searching compatible string to match the kernel changes. And for compatibility with the rev1 nodes, move forward the board specific fixup. Signed-off-by: Hou Zhiqiang <[email protected]> Reviewed-by: Priyanka Jain <[email protected]>
2022-01-30mmc: sunxi: Use DM_GPIO flags to set pull-upSamuel Holland
Now that the sunxi_gpio driver handles pull-up/down via the driver model, pin configuration does not need a platform-specific function. Signed-off-by: Samuel Holland <[email protected]> Tested-by: Heinrich Schuchardt <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2022-01-30gpio: sunxi: Implement .set_flagsSamuel Holland
This, along with gpio_flags_xlate(), allows the GPIO driver to handle pull-up/down flags provided by consumer drivers or in the device tree. Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Simon Glass <[email protected]> Reviewed-by: Andre Przywara <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2022-01-30i2c: mvtwsi: Add compatible string for allwinner, sun4i-a10-i2cChris Morgan
This adds a compatible string for the Allwinner Sun4i-A10 I2C controller. Without this, boards based on the R8 and A13 (at a minimum) fail to boot. Signed-off-by: Chris Morgan <[email protected]> Acked-by: Akash Gajjar <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2022-01-30sunxi: SPI: fix pinmuxing for Allwinner H6 SoCsDaniel Wagenknecht
The driver for SPI0 on Allwinner H6 SoCs did not use the correct define SUN50I_GPC_SPI0 for the pin function, but one for a different Allwinner SoC series. Fix the conditionals to use the correct define for H6 SoCs. This matches the conditional logic in the SPL spi driver. Tested by probing the spi-flash on a pine64_h64-model-b board with adapted device-tree (disable mmc2, enable spi0). Signed-off-by: Daniel Wagenknecht <[email protected]> Reviewed-by: Andre Przywara <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2022-01-28net: ti: am65-cpsw-nuss: Fix err msg for port bind failuresVignesh Raghavendra
Replace error case print with meaning full message. Signed-off-by: Vignesh Raghavendra <[email protected]>
2022-01-28bootcount: fix printf() codeHeinrich Schuchardt
For printing phys_addr_t we should use %pa to avoid warning like: drivers/bootcount/bootcount_syscon.c:110:17: note: in expansion of macro ‘dev_err’ 110 | dev_err(dev, "%s: Unsupported register size: %d\n", __func__, | ^~~~~~~ seen for sandbox_defconfig with CONFIG_PHYS_64BIT=y. Cf. commit 1eebd14b7902 ("vsprintf: Add modifier for phys_addr_t") Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2022-01-28dfu: mtd: skip empty pages when writing page for UBI partitionPatrick Delaunay
Align the DFU MTD backend for the UBI partitions with the mtd command write behavior when the option .dontskipff is not used: don't write the empty pages (full of 0xFF); it is not required for UBI, see [1] for details. This patch avoids the "free space fixup" procedure in the kernel [2] and allows to program a UBIFS volume generated by mkfs.ubifs without the option -F, --space-fixup. The MTD DFU backend implements this behavior introduced on DFU NAND backend by the commit 13cb7cc9e8e4 ("dfu: Add option to skip empty pages when flashing UBI images to NAND") and also supported by the command nand by CONFIG_CMD_NAND_TRIMFFS and by commit c9494866df83 ("cmd_nand: add nand write.trimffs command"). [1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo [2] http://www.linux-mtd.infradead.org/faq/ubifs.html#L_free_space_fixup Signed-off-by: Patrick Delaunay <[email protected]>