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2022-01-12phy: zynqmp: Add serdes/psgtr driverMichal Simek
Add PSGTR driver for Xilinx ZynqMP. The most of configurations are taken from Linux kernel psgtr driver. USB3.0 and SGMII configurations are tested on SOM. In SGMII case also IOU_SLCR reg is updated to get proper clock setup and signal detection configuration. Signed-off-by: Michal Simek <[email protected]> Reviewed-by: Simon Glass <[email protected]> Link: https://lore.kernel.org/r/36e6e9d3baf8511af1916e91e4887032ca2b6c20.1641458978.git.michal.simek@xilinx.com
2022-01-12serial: zynq: Add missing xlnx,zynqmp-uart compatibleMichal Simek
Based on Linux kernel DT binding xlnx,zynqmp-uart is another compatible string which can be used for this driver. That's why also list it here. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/959a4cbbdd06a7fca2d9251ff0f535863a562b96.1641905717.git.michal.simek@xilinx.com
2022-01-12mmc: dwmmc: return a proper error code when busyJohn Keeping
When failing to send a command because the hardware is busy, return EBUSY to indicate the cause instead of just -1. Signed-off-by: John Keeping <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2022-01-12mmc: fsl_esdhc_imx: set sysctl register for clock initializationSean Anderson
[ fsl_esdhc commit 263ddfc3454ead3a988adef39b962479adce2b28 ] The initial clock setting should be through sysctl register only, while the mmc_set_clock() will call mmc_set_ios() introduce other configurations like bus width, mode, and so on. Signed-off-by: Yangbo Lu <[email protected]> Signed-off-by: Sean Anderson <[email protected]>
2022-01-12mmc: fsl_esdhc_imx: Replace more #ifdefs by ifSean Anderson
This builds on the previous patch by converting yet more preprocessor macros to C ifs. This is split off so that the changes adapted from Micheal's patch may be clearly distinguished from the ones I have authored myself. MMC_SUPPORTS_TUNING should really get a Kconfig conversion. And DM_GPIO needs some -ENOSYS stubs when it isn't defined. Signed-off-by: Sean Anderson <[email protected]>
2022-01-12mmc: fsl_esdhc_imx: replace most #ifdefs by IS_ENABLED()Sean Anderson
[ fsl_esdhc commit 52faec31827ec1a1837977e29c067424426634c5 ] Make the code cleaner and drop the old-style #ifdef constructs where it is possible. Signed-off-by: Michael Walle <[email protected]> Signed-off-by: Sean Anderson <[email protected]>
2022-01-12mmc: fsl_esdhc_imx: simplify esdhc_setup_data()Sean Anderson
[ fsl_esdhc commit 7e48a028a42c111ba38a90b86e5f57dace980fa0 ] First, we need the waterlevel setting for PIO mode only. Secondy, both DMA setup code is identical for both directions, except for the data pointer. Thus, unify them. Signed-off-by: Michael Walle <[email protected]> Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2022-01-12mmc: fsl_esdhc_imx: use dma-mapping APISean Anderson
[ fsl_esdhc commit b1ba1460a445bcc67972a617625d0349e4f22b31 ] Use the dma_{map,unmap}_single() calls. These will take care of the flushing and invalidation of caches. Signed-off-by: Michael Walle <[email protected]> Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2022-01-12mmc: fsl_esdhc_imx: simplify 64bit check for SDMA transfersSean Anderson
[ fsl_esdhc commit da86e8cfcb03ed5c1d8e0718bc8bc8583e60ced8 ] SDMA can only do DMA with 32 bit addresses. This is true for all architectures (just doesn't apply to 32 bit ones). Simplify the code and remove unnecessary CONFIG_FSL_LAYERSCAPE. Also make the error message more concise. Signed-off-by: Michael Walle <[email protected]> Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2022-01-12mmc: fsl_esdhc_imx: fix mmc->clock with actual clockSean Anderson
[ fsl_esdhc commit 30f6444d024a74ee48aa6969c1531aecd3c59deb ] Fix mmc->clock with actual clock which is divided by the controller, and record it with priv->clock. Signed-off-by: Yangbo Lu <[email protected]> Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2022-01-12mmc: fsl_esdhc_imx: drop redundant code for non-removable featureSean Anderson
[ fsl_esdhc commit commit 08197cb8dff7cd097ab07a325093043c39d19bbd ] Drop redundant code for non-removable feature. "non-removable" property has been read in mmc_of_parse(). Signed-off-by: Yangbo Lu <[email protected]> [ set MMC_CAP_NONREMOVABLE in plat->cfg.host_caps ] Signed-off-by: Sean Anderson <[email protected]>
2022-01-12mmc: fsl_esdhc_imx: clean up bus width configuration codeSean Anderson
[ fsl_esdhc commit 07bae1de382723b94244096953b05225572728cd ] This patch is to clean up bus width setting code. - For DM_MMC, remove getting "bus-width" from device tree. This has been done in mmc_of_parse(). - For non-DM_MMC, move bus width configuration from fsl_esdhc_init() to fsl_esdhc_initialize() which is non-DM_MMC specific. And fix up bus width configuration to support only 1-bit, 4-bit, or 8-bit. Keep using 8-bit if it's not set because many platforms use driver without providing max bus width. - Remove bus_width member from fsl_esdhc_priv structure. Signed-off-by: Yangbo Lu <[email protected]> [ converted if statement to switch ] Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2022-01-12mmc: fsl_esdhc_imx: fix voltage validationSean Anderson
[ fsl_esdhc commit 5b05fc0310cd933acf76ee661577c6b07a95e684 ] Voltage validation should be done by CMD8. Current comparison between mmc_cfg voltages and host voltage capabilities is meaningless. So drop current comparison and let voltage validation is through CMD8. Signed-off-by: Yangbo Lu <[email protected]> Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2022-01-12mmc: fsl_esdhc_imx: remove redundant DM_MMC checkingSean Anderson
[ fsl_esdhc commit 2913926f3b3dec282f8773e3c02377c9600d8267 ] Remove redundant DM_MMC checking which is already in DM_MMC conditional compile block. Signed-off-by: Yangbo Lu <[email protected]> Signed-off-by: Sean Anderson <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2022-01-12mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMCSean Anderson
U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already support it, so let's force to use it. - Drop non-BLK support for DM_MMC introduced by below patch. 66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled - Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC). - Use DM_MMC instead of BLK for conditional compile. Signed-off-by: Yangbo Lu <[email protected]> Signed-off-by: Sean Anderson <[email protected]> Signed-off-by: Jaehoon Chung <[email protected]>
2022-01-10Merge branch 'next'Tom Rini
Signed-off-by: Tom Rini <[email protected]>
2022-01-09Merge tag 'u-boot-amlogic-20220107' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-amlogic into next - disable CONFIG_NET_RANDOM_ETHADDR when unnecessary on amlogic based configs - meson64_android: add board specific env settings, in order to support VIM3/L for android - add changes to support VIM3/L android boot by using meson64_android.h config
2022-01-08usb: gadget: dwc2_udc_otg: set ep's desc during enable/disableGary Bisson
Fastboot support has been broken on platforms using dwc2 controller since the gadget gets its max packet size from it. This patch is the equivalent of 723fd5668ff which fixed the same issue but for the chipidea controller. Fixes: 27c9141b111 ("usb: gadget: fastboot: use correct max packet size") Signed-off-by: Gary Bisson <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Tested-by: Mattijs Korpershoek <[email protected]>
2022-01-07Revert "clk: Detect failure to set defaults"Marek Vasut
This reverts commit 92f1e9a4b31c0bf0f4f61ab823a6a88657323646. The aforementioned patch causes massive breakage on all platforms which have 'assigned-clock' DT property in their DT which references any clock that are not supported by the platform clock driver. That can easily happen either in SPL, or because the clock driver is reduced. Currently it seems all iMX8M are affected and fail to boot altogether. Signed-off-by: Marek Vasut <[email protected]> Cc: Peng Fan <[email protected]> Cc: Simon Glass <[email protected]> Reviewed-by: Sean Anderson <[email protected]> Reviewed-by: Fabio Estevam <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2022-01-05net: gem: Reduce timeout of mdio phy idle status checkAshok Reddy Soma
Timeout for checking mdio phy idle status is 20seconds. In case of errors this timeout will be too much. Reduce it to 100ms. Signed-off-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Michal Simek <[email protected]> Reviewed-by: Ramon Fried <[email protected]> Link: https://lore.kernel.org/r/1b73aa57b77587391e1bcd6d9f0480163367ed1b.1637237121.git.michal.simek@xilinx.com
2022-01-05net: zynq: Add support for PHY configuration in SGMII modeMichal Simek
SGMII configuration depends on proper GT setting that's why when node has phys property call PSGTR driver to configure it properly. Signed-off-by: Michal Simek <[email protected]> Reviewed-by: Sean Anderson <[email protected]> Link: https://lore.kernel.org/r/bbc8d7ed9d308199168e4455c7a3e3a5ac0890e7.1639562397.git.michal.simek@xilinx.com
2022-01-05net: zynq: Add support for GEM resetMichal Simek
Perform reset before core initialization. Standard flow which close to 99% users are using getting all IPs out of reset that there is no need to reset IP again. This is because of all low level initialization is done in previous bootloader stage. In SOM case these IPs are not touched by previous bootloader stage that's why reset needs to be called before IP is accessed to make sure that it is in correct state. Signed-off-by: Michal Simek <[email protected]> Reviewed-by: Ramon Fried <[email protected]> Link: https://lore.kernel.org/r/5ae1c85b282d632bb62030f1f24a0065661b9153.1638804318.git.michal.simek@xilinx.com
2022-01-05net: zynq: Add support for mdio bus address decodingMichal Simek
Xilinx DTS files are using two way how to describe ethernet phy. The first (already supported) has phy as subnode of gem node. eth { phy-handle = <&phy0>; phy0: ethernet-phy@21 { ... }; }; The second has mdio subnode (with mdio name) which has phy subnode. This structure allow hadling MDIO reset signal (based on Linux mdio.yaml) eth { phy-handle = <&phy0>; mdio { phy0: ethernet-phy@21 { ... }; }; }; This patch adds support for the second case where mdio subnode is found driver will look at its parent to find out which gem is handling MDIO bus. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/6748007f0b6db9554d7a4b52352dce23ca403f9d.1638798796.git.michal.simek@xilinx.com
2022-01-05microblaze: branch to base vector address on resetOvidiu Panait
Current code assumes that the vector base address is always at 0x0. However, this value is configurable for MicroBlaze using the CONFIG_XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option. Update the reset routines to branch to this location instead. Signed-off-by: Ovidiu Panait <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Michal Simek <[email protected]>
2022-01-05xilinx: firmware: Move dcache handling directly to pmufw load configMichal Simek
Core function should make sure that data is stored properly that's why move cache operations directly to zynqmp_pmufw_load_config_object() to be able to call it from other functions. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/8c92edd3650ce34a3cfd1c1e4e9103980830b1fa.1637236800.git.michal.simek@xilinx.com
2022-01-05clk: zynqmp: Fix gem tx/rx/ref clock handlingMichal Simek
gemX_ref clock IDs starts at number 104. Till now it was at gemX_tx location which wasn't correct. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/d073e159b6316707306092a62bccb876cd89a602.1635506016.git.michal.simek@xilinx.com
2022-01-05clk: zynqmp: Add support for setting up clock for USBMichal Simek
USB range is not enabled but for setting up frequency it is needed. Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/c55c423f48ca8f953a2dfbdcb25068278d8e5ad6.1635506016.git.michal.simek@xilinx.com
2022-01-05zynqmp: gpio: Add support for zynqmp gpio modepin driverT Karthik Reddy
ZynqMP modepin driver has capability to get/set/check status of modepin gpios. These modepins are accessed using xilinx firmware. In modepin register, [3:0] bits set direction, [7:4] bits read IO, [11:8] bits set/clear IO. Signed-off-by: T Karthik Reddy <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/2d802d98fd56d95d764532a33e844d935e0cebb3.1635505900.git.michal.simek@xilinx.com
2021-12-31Merge tag 'efi-next' of https://source.denx.de/u-boot/custodians/u-boot-efi ↵Tom Rini
into next Pull request of efi-next Documentation: * Add Sunxi board description UEFI: * Improvements to U-Boot running on top of UEFI
2021-12-31efi: serial: Support arrow keysSimon Glass
At present only the backspace key is supported in U-Boot, when running as an EFI app. Add support for arrows, home and end as well, to make the CLI more friendly. Signed-off-by: Simon Glass <[email protected]> Acked-by: Heinrich Schuchardt <[email protected]>
2021-12-28Merge tag 'video-next-20211228' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-video into next - various fixes to the sandbox display support - support for showing a logo without splash screen config - support for BMP drawing to depths other than 16bpp - tests for the different types of supported BMP images - support showing a logo when running coreboot via qemu
2021-12-28Merge tag 'video-20211228' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-video - mxsfb axi/disp_axi clock enable fix
2021-12-28Merge tag 'efi-2022-01-rc4-4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2022-01-rc4-4 UEFI: * allow for more than 16 KiB UEFI variable size when using StMM Others: * make watchdog sysreset compatible with separate poweroff driver * avoid OpenSSL deprecation warnings
2021-12-27Convert CONFIG_KIRKWOOD_GPIO to KconfigTom Rini
This converts the following to Kconfig: CONFIG_KIRKWOOD_GPIO Signed-off-by: Tom Rini <[email protected]>
2021-12-27serial: arm_dcc: Use CONFIG_ARM64 not CONFIG_CPU_ARMV8Tom Rini
The only place we use CONFIG_CPU_ARMV8 was in the arm_dcc serial driver. Switch this to CONFIG_ARM64 today, and if in the future we need finer granularity tuning here, a new CONFIG_SERIAL option needs to be introduced. Signed-off-by: Tom Rini <[email protected]>
2021-12-27Finish conversion of CONFIG_SYS_CLK_FREQ to KconfigTom Rini
In order to finish moving this symbol to Kconfig for all platforms, we need to do a few more things. First, for all platforms that define this to a function, introduce CONFIG_DYNAMIC_SYS_CLK_FREQ, similar to CONFIG_DYNAMIC_DDR_CLK_FREQ and populate clock_legacy.h. This entails also switching all users from CONFIG_SYS_CLK_FREQ to get_board_sys_clk() and updating a few preprocessor tests. With that done, all platforms that define a value here can be converted to Kconfig, and a fall-back of zero is sufficiently safe to use (and what is used today in cases where code may or may not have this available). Make sure that code which calls this function includes <clock_legacy.h> to get the prototype. Signed-off-by: Tom Rini <[email protected]>
2021-12-27Finish conversion CONFIG_SYS_NAND_SELF_INIT to KconfigTom Rini
In order to finish this conversion we need to add a symbols for SPL_SYS_NAND_SELF_INIT and TPL_SYS_NAND_SELF_INIT as there are cases there where we need to, or need to not, use that framework as things stand. Signed-off-by: Tom Rini <[email protected]>
2021-12-27Convert CONFIG_TEGRA_NAND to KconfigTom Rini
This converts the following to Kconfig: CONFIG_TEGRA_NAND Signed-off-by: Tom Rini <[email protected]>
2021-12-27Convert CONFIG_SYS_PCI_64BIT to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_PCI_64BIT Signed-off-by: Tom Rini <[email protected]>
2021-12-27Convert CONFIG_SYS_IMMR to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_IMMR We do this by consolidating the SYS_IMMR options we have and providing defaults. We also, in the few places where M68K was also sharing code with these platforms, define it within the file to CONFIG_SYS_MBAR to match usage. This should be cleaned up longer term. Signed-off-by: Tom Rini <[email protected]>
2021-12-27pci: Remove unused FSL_PCI_INIT codeTom Rini
The symbol CONFIG_FSL_PCI_INIT is no longer enabled anywhere, removed now unused code. Signed-off-by: Tom Rini <[email protected]>
2021-12-27Convert CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT In order to do this conversion, expose this option to the user and use "save" not "safe" in the text. Signed-off-by: Tom Rini <[email protected]>
2021-12-27Convert CONFIG_FSL_IFC to KconfigTom Rini
This converts the following to Kconfig: CONFIG_FSL_IFC This is done via select statements to match previous logic. Signed-off-by: Tom Rini <[email protected]>
2021-12-27Convert CONFIG_ENV_SPI_BUS et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_ENV_SPI_BUS CONFIG_ENV_SPI_CS CONFIG_ENV_SPI_MAX_HZ CONFIG_ENV_SPI_MODE As part of this, we use Kconfig to provide the defaults now that were done in include/spi_flash.h. We also in some cases change from using CONFIG_ENV_SPI_FOO to CONFIG_SF_DEFAULT_FOO as those were the values in use anyhow as ENV was not enabled. Signed-off-by: Tom Rini <[email protected]>
2021-12-27Clarify CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW in KconfigTom Rini
This is a "hex" prompt but the default value was given as an int. Switch the default to hex (0x0) and remove the defconfigs that were using the default, but as hex before. Signed-off-by: Tom Rini <[email protected]>
2021-12-27video: mxsfb: fix clk_get_by_name() return value checkGiulio Benetti
If clk_get_by_name() returns 0 it means it executed successfully while now we consider it as an error. So let's check if return value is negative to be an error. Otherwise this prevents "axi" and "disp_axi" to be enabled. Signed-off-by: Giulio Benetti <[email protected]>
2021-12-26video: Show the U-Boot logo by defaultSimon Glass
Enable this for boards with a display, unless they are using the SPLASH feature. This shows a U-Boot logo on boards with a display, which seems like a useful thing. Signed-off-by: Simon Glass <[email protected]>
2021-12-26video: Support showing the U-Boot logoSimon Glass
Show the U-Boot logo by default. This is only 7KB in size so seems like a useful default for boards that enable a display. If SPLASH_SCREEN is enabled, it is not enabled by default, so as not to conflict with that feature. Also disable it for tests, since we don't want to complicate the output. Signed-off-by: Simon Glass <[email protected]>
2021-12-26video: Drop VIDEO_LOGO from cfb_consoleSimon Glass
This driver is obsolete and only used by nokia_rx51. It should be deleted. For now, drop the VIDEO_LOGO code to avoid confusion with the new implementation. Signed-off-by: Simon Glass <[email protected]>
2021-12-26video: Convert CONFIG_VIDEO_LOGO to KconfigSimon Glass
This converts the following to Kconfig: CONFIG_VIDEO_LOGO Note that this option depends on CONFIG_DM_VIDEO now, since cfb_console is deprecated. The only relevant code is now in splash.c Drop the check for DM_VIDEO in that file. Signed-off-by: Simon Glass <[email protected]>
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