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2021-09-28net: update NXP copyright textVladimir Oltean
NXP Legal insists that the following are not fine: - Saying "NXP Semiconductors" instead of "NXP", since the company's registered name is "NXP" - Putting a "(c)" sign in the copyright string - Putting a comma in the copyright string The only accepted copyright string format is "Copyright <year-range> NXP". This patch changes the copyright headers in the networking files that were sent by me, or derived from code sent by me. Signed-off-by: Vladimir Oltean <[email protected]> Reviewed-by: Ramon Fried <[email protected]>
2021-09-28net: dsa: felix: propagate the error code from phy_startup()Vladimir Oltean
Make sure that the link status returned by phy_startup() is propagated to the .start() method of struct eth_ops. Signed-off-by: Vladimir Oltean <[email protected]> Reviewed-by: Ramon Fried <[email protected]> Tested-by: Michael Walle <[email protected]>
2021-09-28net: dsa: felix: call phy_config at .port_probe() timeVladimir Oltean
It is an unfortunate reality that some PHY settings done by U-Boot persist even after the PHY is reset and taken over by Linux, and even more unfortunate that Linux has come to depend on things being set in a certain way. For example, on the NXP LS1028A-RDB, the felix switch ports are connected to a VSC8514 QSGMII PHY. Between the switch port PCS and the PHY, the U-Boot drivers enable in-band auto-negotiation which makes the copper-side negotiated speed and duplex be transmitted from the PHY to the MAC automatically. The PHY driver portion that does this is in vsc8514_config(): /* Enable Serdes Auto-negotiation */ phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS, PHY_EXT_PAGE_ACCESS_EXTENDED3); val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_MAC_SERDES_CON); val = val | MIIM_VSC8574_MAC_SERDES_ANEG; phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8514_MAC_SERDES_CON, val); The point is that in-band autoneg should be turned on in both the PHY and the MAC, or off in both the PHY and the MAC, otherwise the QSGMII link will be broken. And because phy_config() is currently called at .port_enable() time, the result is that ports on which traffic has been sent in U-Boot will have in-band autoneg enabled, and the rest won't. It can be argued that the Linux kernel should not assume one way or another and just reinitialize everything according to what it expects, and that is completely fair. In fact, I've already started an attempt to remove this dependency, although admittedly I am making slow progress at it: https://patchwork.kernel.org/project/netdevbpf/cover/[email protected]/ Nonetheless, the sad reality is that NXP also has, apart from kernel drivers, some user space networking (DPDK), and for some reason, the expectation there is that somebody else initializes the PHYs. The kernel can't do it because the device ownership doesn't belong to the kernel, so what remains is for the bootloader to do it (especially since other drivers generally call phy_config() at probe time). This is a really weak guarantee that might break at any time, but apparently that is enough for some. Since initializing the ports and PHYs at probe time does not break anything, we can just do that. Signed-off-by: Vladimir Oltean <[email protected]> Reviewed-by: Ramon Fried <[email protected]> Tested-by: Michael Walle <[email protected]>
2021-09-28net: dsa: felix: felix_init() can be staticVladimir Oltean
No one is calling this function from outside felix_switch.c. Signed-off-by: Vladimir Oltean <[email protected]> Reviewed-by: Ramon Fried <[email protected]> Tested-by: Michael Walle <[email protected]>
2021-09-28net: tsec: Mark tsec_get_interface as __maybe_unusedRamon Fried
Non DM builds fail with the following error: drivers/net/tsec.c:641:24: error: 'tsec_get_interface' defined but not used [-Werror=unused-function] 641 | static phy_interface_t tsec_get_interface(struct tsec_private *priv) Fix that. Signed-off-by: Ramon Fried <[email protected]>
2021-09-28phy: marvell: cp110: Support SATA invert polarityDenis Odintsov
In commit b24bb99d cp110 configuration initially done in u-boot was removed and delegated to atf firmware as smc call. That commit didn't account for later introduced in d13b740c SATA invert polarity support. This patch adds support of passing SATA invert polarity flags to atf firmware during the smc call. Signed-off-by: Denis Odintsov <[email protected]> Cc: Baruch Siach <[email protected]> Cc: Rabeeh Khoury <[email protected]> Cc: Stefan Roese <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2021-09-28mtd: remove SPEAr flash driver st_smiPatrick Delaunay
Remove the driver st_smic.c used in SPEAr products and the associated config CONFIG_ST_SMI; this driver is no more used in U-Boot after the commit 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr support"). Fixes: 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr support") Signed-off-by: Patrick Delaunay <[email protected]> Reviewed-by: Stefan Roese <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2021-09-28ddr: altera: use KBUILD_BASENAME instead of __FILE__Marek Vasut
The KBUILD_BASENAME contains just the name of the compiled module, in this case 'sequencer', rather than a full path to the compiled file. Use it to prevent pulling the full path into the U-Boot binary, which is useless and annoying. Signed-off-by: Marek Vasut <[email protected]> Cc: Siew Chin Lim <[email protected]> Cc: Simon Goldschmidt <[email protected]> Cc: Tien Fong Chee <[email protected]>
2021-09-28usb: xhci-dwc3: Add support for USB 3.1 controllersMark Kettenis
This adds support for the DWC_sub31 controllers such as those found on Apple's M1 SoC. This version of the controller seems to work fine with the existing driver. Signed-off-by: Mark Kettenis <[email protected]>
2021-09-28usb: ehci-mx6: use phy_type from device treeMatthias Schiffer
Allow using different PHY interfaces for multiple USB controllers. When no value is set in DT, we fall back to CONFIG_MXC_USB_PORTSC for now to stay compatible with current board configurations. This also adds support for the HSIC mode of the i.MX7. Signed-off-by: Markus Niebel <[email protected]> Signed-off-by: Matthias Schiffer <[email protected]>
2021-09-28usb: add support for ULPI/SERIAL/HSIC PHY modesMatthias Schiffer
Import usb_phy_interface enum values and DT match strings from the Linux kernel. Signed-off-by: Markus Niebel <[email protected]> Signed-off-by: Matthias Schiffer <[email protected]>
2021-09-28usb: xhci-dwc3: Add support for clocks/resetsSamuel Holland
Some platforms, like the Allwinner H6, do not have a separate glue layer around the dwc3. Instead, they rely on the clocks/resets/phys referenced from the dwc3 DT node itself. Add support for enabling the clocks/resets referenced from the dwc3 DT node. Signed-off-by: Samuel Holland <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2021-09-28usb: xhci-pci: Move reset logic out of XHCI coreSamuel Holland
Resetting an XHCI controller inside xhci_register undoes any register setup performed by the platform driver. And at least on the Allwinner H6, resetting the XHCI controller also resets the PHY, which prevents the controller from working. That means the controller must be taken out of reset before initializing the PHY, which must be done before calling xhci_register. The logic in the XHCI core was added to support the Raspberry Pi 4 (although this was not mentioned in the commit log!), which uses the xhci-pci platform driver. Move the reset logic to the platform driver, where it belongs, and where it cannot interfere with other platform drivers. This also fixes a failure to call reset_free if xhci_register failed. Fixes: 0b80371b350e ("usb: xhci: Add reset controller support") Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Bin Meng <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2021-09-28phy: sun50i-usb3: Add a driver for the H6 USB3 PHYSamuel Holland
This driver is needed for XHCI to work on the Allwinner H6 SoC. The driver is copied from Linux v5.10. Reviewed-by: Andre Przywara <[email protected]> Signed-off-by: Samuel Holland <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2021-09-28mtd: nand: raw: convert nand_dt_init() to ofnode_xx() interfacePatrice Chotard
nand_dt_init() is still using fdtdec_xx() interface. If OF_LIVE flag is enabled, dt property can't be get anymore. Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue. For doing this, node parameter type must be ofnode. First idea was to convert "node" parameter to ofnode type inside nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode() is not bijective, in case OF_LIVE flag is enabled, it performs an assert(). So, this leads to update nand_chip struct flash_node field from int to ofnode and to update all nand_dt_init() callers. Signed-off-by: Patrice Chotard <[email protected]>
2021-09-28i2c: mvtwsi: Add support for DM clocks and resetsSamuel Holland
The controller may need to have clocks/resets enabled for it to work. Add support for this. Since the clocks/resets are optional on some platforms (per the device tree binding), do not prevent probing the controller if they are missing. Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Heiko Schocher <[email protected]>
2021-09-28i2c: rcar_i2c: Enable configuring SCL rise and fall timesAdam Ford
The Linux i2c driver supports i2c-scl-rising-time-ns, and i2c-scl-falling-time-ns, but U-Boot uses hard-coded values for these values. Update the calculation by fetching them from the device tree if present and use the previous values as the default if they are missing. Signed-off-by: Adam Ford <[email protected]> Reviewed-by: Heiko Schocher <[email protected]>
2021-09-27ti: keystone: Move away from CONFIG_SOC_KEYSTONETom Rini
We have individual SOC symbols for each keystone 2 platform. Use the existing CONFIG_ARCH_KEYSTONE rather than CONFIG_SOC_KEYSTONE to encompass all of the keystone families. Signed-off-by: Tom Rini <[email protected]>
2021-09-27Convert CONFIG_OMAP_EHCI_PHY1_RESET_GPIO et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_OMAP_EHCI_PHY1_RESET_GPIO CONFIG_OMAP_EHCI_PHY2_RESET_GPIO CONFIG_OMAP_EHCI_PHY3_RESET_GPIO To do this, we also introduce CONFIG_HAS_CONFIG_OMAP_EHCI_PHYn_RESET_GPIO options to get setting the GPIO number. Signed-off-by: Tom Rini <[email protected]>
2021-09-27usb: ehci-omap: Drop non-DM_USB legacy codeTom Rini
Now that DM_USB is always enabled, we can drop some legacy code. Signed-off-by: Tom Rini <[email protected]>
2021-09-27ti: keystone: dma: Migrate to KconfigTom Rini
Move the main option for handling drivers/dma/keystone_nav* to Kconfig, and enable it by default. All of the sub-symbols are not configurable, so remove them from the CONFIG namespace. Signed-off-by: Tom Rini <[email protected]>
2021-09-27ti: keystone: Clean up or migrate some NAND related options.Tom Rini
The COFNIG_KEYSTONE_RBL_NAND option is always enabled for the driver on keystone platforms, but not older davinci platforms. Use def_bool for the symbol. For CONFIG_KEYSTONE_NAND_MAX_RBL_PAGE, it's only used within the driver and derived from another symbol, so remove CONFIG from the name. Finally, CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE is a bit more fixed. For now, use the value directly. Long term, as part of DM'ifying NAND, this should come from the device tree. Signed-off-by: Tom Rini <[email protected]>
2021-09-27Convert CONFIG_USB_XHCI_OMAP to KconfigTom Rini
This converts the following to Kconfig: CONFIG_USB_XHCI_OMAP Signed-off-by: Tom Rini <[email protected]>
2021-09-27usb: phy: ti: Remove non-DM PHY codeTom Rini
At this point in time, all platforms that had previously used drivers/usb/phy/omap_usb_phy.c have been migrated to DM and related options. Remove this now unused code and some related unused defines. Signed-off-by: Tom Rini <[email protected]>
2021-09-27keystone2: Move CONFIG_AEMIF_CNTRL_BASE out of CONFIG namespaceTom Rini
This is only used in the aemif driver that is otherwise currently keystone2 centric. Moving forward, if this is applicable to some other platform then such base addresses should be able to be obtained via the device tree. Use KS2_AEMIF_CNTRL_BASE directly now rather than indirectly. Signed-off-by: Tom Rini <[email protected]>
2021-09-27Merge tag 'dm-pull-next-27sep21' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-dm into next Various of-platdata improvements, including CONFIG_OF_REAL
2021-09-27Merge tag 'v2021.10-rc5' into nextTom Rini
Prepare v2021.10-rc5
2021-09-27phy: marvell: cp110: Support SATA invert polarityDenis Odintsov
In commit b24bb99d cp110 configuration initially done in u-boot was removed and delegated to atf firmware as smc call. That commit didn't account for later introduced in d13b740c SATA invert polarity support. This patch adds support of passing SATA invert polarity flags to atf firmware during the smc call. Signed-off-by: Denis Odintsov <[email protected]> Cc: Baruch Siach <[email protected]> Cc: Rabeeh Khoury <[email protected]> Cc: Stefan Roese <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2021-09-25dm: pci: Fix handling of errors when scanning devicePali Rohár
Some PCIe controller's read_config() method support indicating error directly via return value, but some cannot distinguish all-ones (or all-zeros) read response from an error. The current code in pci_bind_bus_devices() interprets all-ones / all-zeros in PCI_VENDOR_ID register as "nothing connected", and continues the cycle, but an error returned via return value breaks the cycle. This is wrong for the PCIe controllers which return this error via return value. Handle all errors when reading PCI_VENDOR_ID the same way. This fixes enumeration of PCI devices for example when there is a PCI bridge connected behind another PCI bridge and not all ports are connected to a device, and the controller (for example Aardvark) translates the UR error (Unsupported Request) as -EOPNOTSUPP. Signed-off-by: Pali Rohár <[email protected]> Signed-off-by: Marek Behún <[email protected]> Reviewed-by: Bin Meng <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2021-09-25sandbox: correct cpu nodesHeinrich Schuchardt
The cpu nodes in arch/sandbox/dts/test.dts should conform to the devicetree specification: * property device_type must be set to "cpu" * the reg property must be provided * the cpu nodes must have an address Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2021-09-25dm: gpio: Add of-platdata supportSimon Glass
Add support for accessing GPIOs using of-plata. This uses the same mechanism as for clocks, but allows use of the xlate() method so that the driver can interpret the parameters. Update the condition for GPIO_HOG so that it is not built into SPL, since it needs SPL_OF_REAL which is not enabled in sandbox_spl. Signed-off-by: Simon Glass <[email protected]>
2021-09-25irq: Tidy up of-platdata irq supportSimon Glass
This function is available but not exported. More generally it does not really work as intended. Reimplement it and add a sandbox test too. Signed-off-by: Simon Glass <[email protected]>
2021-09-25clk: Rename clk_get_by_driver_info()Simon Glass
This is actually a misnomer now, since the phandle info may contain a driver_info index or a udevice index. Rename it to use the word 'phandle', which seems more accurate. Add a comment while we are here. Also add a test for this function. Signed-off-by: Simon Glass <[email protected]>
2021-09-25treewide: Try to avoid the preprocessor with OF_REALSimon Glass
Convert some of these occurences to C code, where it is easy to do. This should help encourage this approach to be used in new code. Signed-off-by: Simon Glass <[email protected]>
2021-09-25mmc: nds32: ftsdc010: Convert to livetreeSimon Glass
Use the livetree API for this driver. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Rick Chen <[email protected]> Reviewed-by: Jaehoon Chung <[email protected]>
2021-09-25treewide: Use OF_REAL instead of !OF_PLATDATASimon Glass
Now that we have a 'positive' Kconfig option, use this instead of the negative one, which is harder to understand. Signed-off-by: Simon Glass <[email protected]>
2021-09-25treewide: Simply conditions with the new OF_REALSimon Glass
Use this new Kconfig to simplify the compilation conditions where appropriate. Signed-off-by: Simon Glass <[email protected]>
2021-09-25treewide: fdt: Move fdt_get_config_... to ofnode_conf_read...Simon Glass
The current API is outdated as it requires a devicetree pointer. Move these functions to use the ofnode API and update this globally. Add some tests while we are here. Correct the call in exynos_dsim_config_parse_dt() which is obviously wrong. Signed-off-by: Simon Glass <[email protected]>
2021-09-24drivers: tpm2: update reset gpio semanticsJorge Ramirez-Ortiz
Use the more generic reset-gpios property name. Signed-off-by: Jorge Ramirez-Ortiz <[email protected]> Acked-by: Michal Simek <[email protected]> Acked-by: Ilias Apalodimas <[email protected]>
2021-09-24mtd: remove SPEAr flash driver st_smiPatrick Delaunay
Remove the driver st_smic.c used in SPEAr products and the associated config CONFIG_ST_SMI; this driver is no more used in U-Boot after the commit 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr support"). Fixes: 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr support") Signed-off-by: Patrick Delaunay <[email protected]> Reviewed-by: Stefan Roese <[email protected]> Reviewed-by: Tom Rini <[email protected]>
2021-09-23pci: Fix configuring io/memory base and limit registers of PCI bridgesPali Rohár
Lower 4 bits of PCI_MEMORY_BASE and PCI_MEMORY_LIMIT registers are reserved and should be zero. So do not set them to non-zero value. Lower 4 bits of PCI_PREF_MEMORY_BASE and PCI_PREF_MEMORY_LIMIT registers contain information if 64-bit memory addressing is supported. So preserve this information when overwriting these registers. Lower 4 bits of PCI_IO_BASE and PCI_IO_LIMIT register contain information if 32-bit io addressing is supported. So preserve this information and do not try to configure 32-bit io addressing (via PCI_IO_BASE_UPPER16 and PCI_IO_LIMIT_UPPER16 registers) when it is unsupported. Signed-off-by: Pali Rohár <[email protected]> Reviewed-by: Stefan Roese <[email protected]>
2021-09-23Merge git://source.denx.de/u-boot-socfpgaTom Rini
Bugfixes for this one socfpga platform
2021-09-22Merge tag 'u-boot-at91-2022.01-a' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-at91 into next First set of u-boot-at91 features for the 2022.01 cycle: This feature set includes : the support for CPU driver for arm926 (sam9x60 device); changes required for OP-TEE boot for sama5d2_xplained and sama5d27_som1_ek boards; QSPI boot configuration for sama5d2_icp; starting to remove old Kconfig unused symbols from config_whitelist.txt (work will take more time); also small fixes and updates in mach, DT, configs, etc.
2021-09-22ddr: altera: use KBUILD_BASENAME instead of __FILE__Marek Vasut
The KBUILD_BASENAME contains just the name of the compiled module, in this case 'sequencer', rather than a full path to the compiled file. Use it to prevent pulling the full path into the U-Boot binary, which is useless and annoying. Signed-off-by: Marek Vasut <[email protected]> Cc: Siew Chin Lim <[email protected]> Cc: Simon Goldschmidt <[email protected]> Cc: Tien Fong Chee <[email protected]>
2021-09-22usb: xhci-dwc3: Add support for USB 3.1 controllersMark Kettenis
This adds support for the DWC_sub31 controllers such as those found on Apple's M1 SoC. This version of the controller seems to work fine with the existing driver. Signed-off-by: Mark Kettenis <[email protected]>
2021-09-22usb: ehci-mx6: use phy_type from device treeMatthias Schiffer
Allow using different PHY interfaces for multiple USB controllers. When no value is set in DT, we fall back to CONFIG_MXC_USB_PORTSC for now to stay compatible with current board configurations. This also adds support for the HSIC mode of the i.MX7. Signed-off-by: Markus Niebel <[email protected]> Signed-off-by: Matthias Schiffer <[email protected]>
2021-09-22usb: add support for ULPI/SERIAL/HSIC PHY modesMatthias Schiffer
Import usb_phy_interface enum values and DT match strings from the Linux kernel. Signed-off-by: Markus Niebel <[email protected]> Signed-off-by: Matthias Schiffer <[email protected]>
2021-09-22usb: xhci-dwc3: Add support for clocks/resetsSamuel Holland
Some platforms, like the Allwinner H6, do not have a separate glue layer around the dwc3. Instead, they rely on the clocks/resets/phys referenced from the dwc3 DT node itself. Add support for enabling the clocks/resets referenced from the dwc3 DT node. Signed-off-by: Samuel Holland <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2021-09-22usb: xhci-pci: Move reset logic out of XHCI coreSamuel Holland
Resetting an XHCI controller inside xhci_register undoes any register setup performed by the platform driver. And at least on the Allwinner H6, resetting the XHCI controller also resets the PHY, which prevents the controller from working. That means the controller must be taken out of reset before initializing the PHY, which must be done before calling xhci_register. The logic in the XHCI core was added to support the Raspberry Pi 4 (although this was not mentioned in the commit log!), which uses the xhci-pci platform driver. Move the reset logic to the platform driver, where it belongs, and where it cannot interfere with other platform drivers. This also fixes a failure to call reset_free if xhci_register failed. Fixes: 0b80371b350e ("usb: xhci: Add reset controller support") Signed-off-by: Samuel Holland <[email protected]> Reviewed-by: Bin Meng <[email protected]> Signed-off-by: Andre Przywara <[email protected]>
2021-09-22phy: sun50i-usb3: Add a driver for the H6 USB3 PHYSamuel Holland
This driver is needed for XHCI to work on the Allwinner H6 SoC. The driver is copied from Linux v5.10. Reviewed-by: Andre Przywara <[email protected]> Signed-off-by: Samuel Holland <[email protected]> Signed-off-by: Andre Przywara <[email protected]>