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AM64 dual mode rings are modeled as pair of Rings objects which has common
configuration and memory buffer, but separate real-time control register
sets for each direction mem2dev (forward) and dev2mem (reverse).
AM64 rings must be requested only using k3_ringacc_request_rings_pair(),
and forward ring must always be initialized/configured. After this any
other Ringacc APIs can be used without any callers changes.
Signed-off-by: Vignesh Raghavendra <[email protected]>
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Update struct ti_sci_msg_rm_udmap_tx_ch_cfg_req to latest ABI to support
AM64x BCDMA Block copy channels.
Signed-off-by: Vignesh Raghavendra <[email protected]>
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Add support for AM64 SoC identification.
Signed-off-by: Lokesh Vutla <[email protected]>
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Attempt to get and enable a vtt regulator if one is provided from the
dts. If we do not find one, continue as not all platforms have this.
Signed-off-by: Nishanth Menon <[email protected]>
Signed-off-by: Lokesh Vutla <[email protected]>
Signed-off-by: Dave Gerlach <[email protected]>
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Introduce support for the AM64 DDRSS controller which uses the 16bit
variation of the controller. This controller shares much functionality
with the existing J721e support, so this patch introduces only the new
code needed for am64 specific support from "_16bit_" files with headers
under "16bit/" include path/.
Also add a CONFIG_K3_AM64_DDRSS option to the choice required for use
with CONFIG_K3_DDRSS to allow selecting AM64 support.
Signed-off-by: Dave Gerlach <[email protected]>
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Introduce a new version of the ddr driver which has the ability to
support different variations of the controller. Also introduce support
for the 32bit variation of the controller which is what was already
supported by the previous version used for J721e and J7200.
Signed-off-by: Dave Gerlach <[email protected]>
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Create a new CONFIG_K3_DDRSS option to select the common parts of the
k3-ddrss driver. Also introduce a choice that depends on the top level
option to select CONFIG_K3_J721E_DDRSS for j721e support, and update
corresponding Kconfig as required.
Signed-off-by: Dave Gerlach <[email protected]>
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Rename the k3-j721e folder under drivers/ram to k3-ddrss in preparation
of introducing additional support for other platforms to the same
driver.
Signed-off-by: Dave Gerlach <[email protected]>
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Use Linux style u32 instead of uint32_t.
Signed-off-by: Dave Gerlach <[email protected]>
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Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <[email protected]>
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Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <[email protected]>
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Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <[email protected]>
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Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <[email protected]>
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Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <[email protected]>
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Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <[email protected]>
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Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <[email protected]>
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Fix the indentation for certain macros to be consistent with the other
macros in the file, as the existing indentation does not make sense in
many places.
Signed-off-by: Dave Gerlach <[email protected]>
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AM64x uses a different thread mapping that existing K3 SoCs, so update
the valid thread ID list to include those used for AM64x.
Also remove the comment identifying the purpose of each thread ID. The
purpose of the thread ID is specified when describing the threads in the
device tree and the same ID can mean different things on different SoCs,
so the comment is not useful.
Signed-off-by: Dave Gerlach <[email protected]>
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Add support for the controller present on the AM642 SoC.
There are instances:
sdhci0: 8bit bus width, max 400 MBps
sdhci1: 4bit bus width, max 100 MBps
Signed-off-by: Dave Gerlach <[email protected]>
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This reverts commit d64b9cdcd475eb7f07b49741ded87e24dae4a5fc.
As pointed by [1] and [2], the reverted patch made every DT 'reg'
property translatable. What the patch was trying to fix was fixed in a
different way from previously submitted patches which instead of
correcting the generic address translation function fixed the issue with
appropriate platform code.
[1] https://patchwork.ozlabs.org/project/uboot/patch/[email protected]/
[2] https://lore.kernel.org/linux-clk/[email protected]/T/
Signed-off-by: Dario Binacchi <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Using the custom TI functions required not only replacing common memory
access functions but also rewriting the routines used to set bypass and
lock states. As for readl() and writel(), they also required the address
of the register to be accessed, a parameter that is hidden by the TI clk
module.
Signed-off-by: Dario Binacchi <[email protected]>
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Replaces the common memory access functions used by the driver with the
ones exported from the TI clk module.
Signed-off-by: Dario Binacchi <[email protected]>
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The clock access functions exported by the clk header use the
struct clk_ti_reg parameter to get the address of the register. This
must also apply to clk_ti_latch(). Changes to TI's clk-mux and
clk-divider drivers prevented the patch from generating compile errors.
Signed-off-by: Dario Binacchi <[email protected]>
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As pointed by [1] and [2], commit
d64b9cdcd4 ("fdt: translate address if #size-cells = <0>") is wrong:
- It makes every 'reg' DT property translatable. It changes the address
translation so that for an I2C 'reg' address you'll get back as reg
the I2C controller address + reg value.
- The quirk must be fixed with platform code.
The clk_ti_get_reg_addr() is the platform code able to make the correct
address translation for the AM33xx clocks registers. Its implementation
was inspired by the Linux Kernel code.
[1] https://patchwork.ozlabs.org/project/uboot/patch/[email protected]/
[2] https://lore.kernel.org/linux-clk/[email protected]/T/
Signed-off-by: Dario Binacchi <[email protected]>
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https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20210502
-------------------
- mx6: fixes for Ventana
- local fixes from maintainer
- imx7d: Ronetix's iMX7-CM
- imx8: Ronetix iMX8MQ-CM
Engicam i.Core MX8M
Compulab iot-gate-imx8
- Fixes i.MX8 documentation
- Fixes phy usage with fec
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As it has been now two years past the migration deadline, it is required
to have migrated. Remove the check from the Makefile and rework some of
the Kconfig logic slightly to get the functional dependencies of DM_MMC
/ BLK right in both the SPL and non-SPL case.
Signed-off-by: Tom Rini <[email protected]>
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The migration deadline for having LIBATA mean that AHCI is also enabled
was v2019.07. As that has long since passed, adjust the Kconfig
dependencies.
Signed-off-by: Tom Rini <[email protected]>
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Adding timeout mechanism to avoid spi driver from stucking
in the while loop in __atcspi200_spi_xfer().
Signed-off-by: Dylan Jhong <[email protected]>
Reviewed-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Rick Chen <[email protected]>
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This uses the newly-added dm_gpio_get_values_as_int_base3 function to
implement a sysinfo device. The revision map is stored in the device tree.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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This has the uclass enforce calling detect() before other methods. This
allows drivers to cache information in detect() and perform (cheaper)
retrieval in the other accessors. This also modifies the only instance
where this sequencing was not followed.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Since 07c9e683a4 ("smbios: Allow a few values to come from sysinfo")
there are common global sysinfo IDs. This patch moved existing IDs above
SYSINFO_ID_USER.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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of_parse_phandle_with_args (called by dev_read_phandle_with_args) does not
support getting the length of a phandle list by using the index -1.
Instead, use dev_count_phandle_with_args which supports exactly this
use-case.
Fixes: 8558217153 ("gpio: Convert to use APIs which support live DT")
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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commit 6ecbe1375671 ("drivers: pci: imx: add imx_pcie_remove function")
attempted to resolve an issue caused by MX6QDL not having a proper
intneral PCIe core reset and thus hanging during kernel init if the
bootloader had enabled PCI.
The issue exists for IMX6Q, IMX6D, IXM6S, and IMX6DL. Fix the case for
IMX6S and IMX6DL getting missed.
This fixes IMX6S and IMX6DL with PCI enabled in U-Boot booting for
Linux v4.11+.
Signed-off-by: Tim Harvey <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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If we fail to probe for whatever reason, we cannot unregister/free the
MII bus unless we registered it with fec_get_miibus. This fixes FECs
sharing an MDIO bus from destroying it, preventing the other FEC from
using it.
Fixes: 6a895d039b ("net: Update eQos driver and FEC driver to use eth phy interfaces")
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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If a phy is disabled, don't use it. This matches Linux's behavior.
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Ramon Fried <[email protected]>
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Add a board_pci_fixup_dev weak function to allow PCI device fixups
during enumeration.
Signed-off-by: Tim Harvey <[email protected]>
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Update the highest subordinate bus number after probing the devices
under the bus for setting up the bridge correctly.
The commit 42f3663a3f67 ("pci: Update to use new sequence numbers")
removed this but it is required if a PCIe bridge is under the bus.
Fixes: 42f3663a3f67 ("pci: Update to use new sequence numbers")
Signed-off-by: Masami Hiramatsu <[email protected]>
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https://source.denx.de/u-boot/custodians/u-boot-dm
buildman environment fix
binman FMAP improvements
minor test improvements and fixes
minor dm improvements
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https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2021.07-rc2
xilinx:
- Enable saving variables based on bootmode
- Cleanup usb dfu setup and wire it up with usb bootmode
- Fix bootscript address logic
- Remove GD references (spi, Versal)
- Enable capsule update
clk:
- Small Kconfig fix
net:
- Fix gmii2rgmii bridge binding
usb:
- Propagate error (dfu gadget)
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gd is not used in this file that's why doesn't make sense to declare it.
Signed-off-by: Michal Simek <[email protected]>
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- mtd: cfi: Fix PPB lock status readout (Marek)
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- Add base support for Marvell OcteonTX2 CN9130 CRB (mostly done
by Kostya)
- Sync Armada 3k/7k/8k SERDES code with Marvell version (misc Marvell
authors)
- pci-aardvark: Fix processing PIO transfers (Pali)
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Add functions to add size of addresses in the device tree using ofnode
references.
If the size is not set, return FDT_SIZE_T_NONE.
Signed-off-by: Chen Guanqiao <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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If there are no nodes or if all nodes are disabled, this function would
return err without setting it first. Fix this by initializing err to
zero.
Fixes: 94f7afdf7e ("dm: core: Ignore disabled devices when binding")
Signed-off-by: Sean Anderson <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Today of_address_to_resource() is called only in
ofnode_read_resource() for livetree support and
fdt_get_resource() is called when livetree is not supported.
The fdt_get_resource() doesn't do the address translation
so when it is required, but the address translation is done
by ofnode_read_resource() caller, for example in
drivers/firmware/scmi/smt.c::scmi_dt_get_smt_buffer() {
...
ret = ofnode_read_resource(args.node, 0, &resource);
if (ret)
return ret;
faddr = cpu_to_fdt32(resource.start);
paddr = ofnode_translate_address(args.node, &faddr);
...
The both behavior should be aligned and the address translation
must be called in fdt_get_resource() and removed for each caller.
Fixes: a44810123f9e ("dm: core: Add dev_read_resource() to read device resources")
Signed-off-by: Patrick Delaunay <[email protected]>
Acked-by: Etienne Carriere <[email protected]>
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The commit 6c993815bbea ("net: phy: xilinx: Be compatible with live OF
tree") change driver behavior to while loop which wasn't correct because
the driver was looping over again and again. The reason was that
ofnode_valid() is taking 0 as correct value.
Fix it by changing while loop to ofnode_for_each_subnode() which is only
loop over available nodes.
Fixes: 6c993815bbea ("net: phy: xilinx: Be compatible with live OF tree")
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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Trying to clear PIO_START register when it is non-zero (which indicates
that previous PIO transfer has not finished yet) causes an External
Abort with SError 0xbf000002.
This bug is currently worked around in TF-A by handling External Aborts
in EL3 and ignoring this particular SError.
This workaround was also discussed at:
https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/?id=3c7dcdac5c50
https://lore.kernel.org/linux-pci/[email protected]/
https://lore.kernel.org/linux-pci/[email protected]/
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/1541
Implement a proper fix to prevent this External Abort. As it is not
possible to cancel a pending PIO transfer, simply do not start a new one
if previous has not finished yet. In this case return an error to the
caller.
In most cases this SError happens when there is no PCIe card connected
or when PCIe link is down. The reason is that in these cases a PIO
transfer takes about 1.44 seconds. For this reason we also increase the
wait timeout in pcie_advk_wait_pio() to 1.5 seconds.
If PIO read transfer for PCI_VENDOR_ID register times out, or if it
isn't possible to read it yet because previous transfer is not finished,
return Completion Retry Status value instead of failing, to give the
caller a chance to send a new read request.
Signed-off-by: Pali Rohár <[email protected]>
Reviewed-by: Marek Behún <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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- Add additional step which enables the Impedance and PLL calibration.
- Enable old squelch detector instead of the new analog squelch detector
circuit and update host disconnect threshold value.
- Update LS TX driver strength coarse and fine adjustment values.
Change-Id: Ifa0a585bfb5ecab0bfa033eed6874ff98b16a7df
Signed-off-by: Grzegorz Jaszczyk <[email protected]>
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In CP115, comphy4 can be configured into SFI port1
(in addition to SFI0). This patch adds the option
described above.
In addition, rename all existing SFI/XFI references:
COMPHY_TYPE_SFI --> COMPHY_TYPE_SFI0
No functional change for exsiting configuration.
Change-Id: If9176222e0080424ba67347fe4d320215b1ba0c0
Signed-off-by: Igal Liberman <[email protected]>
Signed-off-by: Konstantin Porotchkin <[email protected]>
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