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2025-11-07clk: airoha: use CHIP_SCU regmap helperMikhail Kshevetskiy
Use common helper to get CHIP_SCU registers. Signed-off-by: Mikhail Kshevetskiy <[email protected]>
2025-11-07block: typo 'to be write'Heinrich Schuchardt
%s/to be write/to write/ Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2025-11-07virtio: typo 'private date'Heinrich Schuchardt
%s/private date/private data/ Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2025-11-07virtio: typo complaintHeinrich Schuchardt
%s/v1.0 complaint/v1.0 compliant/ Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2025-11-07sound: typos 'to be write', 'writen'Heinrich Schuchardt
%s/to be write/to be written/ %s/writen/written/ Signed-off-by: Heinrich Schuchardt <[email protected]>
2025-11-07sound: all sound devices must depend on CONFIG_SOUNDHeinrich Schuchardt
Clean up the sound Kconfig options to let all sound devices depend on CONFIG_SOUND. Before this patch it was possible to select CONFIG_SOUND_MAX98357A even with CONFIG_SOUND=n. Signed-off-by: Heinrich Schuchardt <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2025-11-07Merge patch series "pwm: put symbols into a menu + use if DM_PWM block ↵Tom Rini
instead of depends on" Quentin Schulz <[email protected]> says: This improves readability in menuconfig by putting PWM symbols under a Kconfig menu. It also groups PWM symbols that depend on DM_PWM together under an if DM_PWM block so that we don't need to always list the dependency in the depends on of the symbol. No intended change in behavior except how it shows in menuconfig. Link: https://lore.kernel.org/r/[email protected]
2025-11-07pwm: fix typo in PWM_MESON help textQuentin Schulz
Reviewed-by: Tom Rini <[email protected]> Signed-off-by: Quentin Schulz <[email protected]>
2025-11-07pwm: put all PWM DM drivers under an if condition on DM_PWMQuentin Schulz
This simplifies the "depends on" since we don't need DM_PWM listed explicitly there as it already is made explicit via the surrounding "if". No intended change in behavior. Reviewed-by: Tom Rini <[email protected]> Signed-off-by: Quentin Schulz <[email protected]>
2025-11-07pwm: make sandbox depend on DM_PWMQuentin Schulz
Since it is registered as a U_CLASS_DRIVER, Sandbox PWM driver is a Driver Model Driver and thus to be usable depends on DM_PWM to be selected. Let's make sure of that via the appropriate Kconfig option. Signed-off-by: Quentin Schulz <[email protected]>
2025-11-07pwm: move all PWM related topics inside a Kconfig menuQuentin Schulz
So it's visually better split from the other subsystems when using menuconfig. Reviewed-by: Tom Rini <[email protected]> Signed-off-by: Quentin Schulz <[email protected]>
2025-11-07mmc: renesas-sdhi: Add R-Car Gen5 supportHai Pham
Add support for R-Car Gen5 SoCs into the driver. The default quirk is identical to previous generation. Signed-off-by: Hai Pham <[email protected]> Signed-off-by: Marek Vasut <[email protected]> # Tweak commit message
2025-11-07mailbox: Allow operation without .recv callbackMarek Vasut
Some shared memory mailboxes may have empty receive operation, because the data are polled by upper layers directly from the shared memory region, and there is no completion interrupt or bit of any sort. Allow empty .recv callback, and if the .recv callback is empty, exit from mbox_recv() right away, because any polling for completion here would be meaningless. Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Alice Guo <[email protected]>
2025-11-07clk: renesas: Isolate R-Car Gen3 driver to Gen3, Gen4 and RZ/G2LMarek Vasut
Isolate Renesas R-Car Gen3 clock driver to R-Car Gen3 and Gen4 and RZ/G2L. The Renesas R-Car Gen5 uses SCMI clock protocol driver instead. This is a preparatory change for R-Car Gen5. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2025-11-07Merge tag 'u-boot-dfu-20251107' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-dfu u-boot-dfu-20251107: CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/28223 Android: * Add bootargs environment to kernel commandline DFU: * Support DFU over PCIe in SPL
2025-11-07Merge tag 'efi-2026-01-rc2' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request efi-2026-01-rc2 CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/28208 Documentation: * bootstd: Describe environment variable extension_overlay_addr environment and remove extension support from TODO list EFI: * Correct the detection of the video mode in the EFI payload app: - Use struct efi_gop_mode_info in the definition of struct efi_entry_gopmode. - In function get_mode_from_entry() use the correct type for the video mode structure. * Use a valid error code as return value in efi_store_memory_map(). * Avoid a memory leak for the variable name in efi_bl_create_block_device(). * Correct the code indentation in efi_uc_stop(). * Correct the description of struct efi_priv. * Fix typos in code comments. Other: * qfw: Add more fields and a heading to qfw list * Fix the support for ACPI pass-through on ARM and RISC-V: Avoid zeroing out the XSDT address * test: provide unit test for 'acpi list' command # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAmkNj/kACgkQxIHbvCwF # GsS8NQ/6Aj+Z54HJTIEfoXssvElLr5ATactrCxszq42i/yy6dLqa2Ym1afG6w1XS # 1ZbCeU/bCXFke5Tsz+x89gEfckUm83oTwngwcID0WR1qn8mWjwR7tM5MuORq8NxU # 7NwLuFs9O/QZihagKdz6hv1/Y+cBwiAYLY16EYVSuUlbLaKQo3QvxwWkqG3jdKWV # Rm58/PolU+2h04MBwP0SxSduX4OyRF/tMOGjf5RGLyqCyj8kIgdu7PvUAPMM+Gps # KemL59V0Bdv8hlF4JknmPz+idtZg2nHIDdNrBZvoxwzwGQeRZ1YXAMruRxZXqDYL # tiuDp6HMv/GfIIGkz14tJtJMdboaAybAnluPWGalx8JQJqJzEPww0R+9s4KKQeWL # mHgRyl6PxVV9p19f79Qq6q6ETwrFDX0YH3pdrGUk3DBa3lDt0UsEAnuW4FvaJ8tx # 3PMrjKAxpxocT0hglsMVnptnfvDEigMsjwH/TWrau83mY+juxFQLjm+U4vye+qCa # 4zXjjLas18+eRcrv2KxU7teakyi1Jp+WbqHq37L26YcQMaLq/RkBc0bTrsreKKLu # jprYFpvc7EJpH2Fd1XWaZ2EnxXcVSJSvrY/iwRQqb6wbwQ6XGtMvSh3IFY8IzAoh # N2Pj78oaYqyL1q/TftuZWhEHo3a0M/HfM4D+oMSHzJtWCb0wZHE= # =OGcS # -----END PGP SIGNATURE----- # gpg: Signature made Fri 07 Nov 2025 12:21:45 AM CST # gpg: using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4 # gpg: Good signature from "Heinrich Schuchardt <[email protected]>" [unknown] # gpg: aka "[jpeg image of size 1389]" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7 6D33 C481 DBBC 2C05 1AC4
2025-11-07Merge tag 'mmc-master-2025-11-07' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-mmc CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/28218 - Disabling FMP on Exynos850 to make eMMC functional when U-Boot is executed during USB boot - Drop extra included errno.h
2025-11-07mmc: exynos_dw_mmc: Disable FMP for Exynos850 chipSam Protsenko
Add DWMCI_QUIRK_DISABLE_FMP flag to Exynos850 driver data to make the driver disable FMP in case of Exynos850 chip. That makes eMMC on Exynos850 functional when U-Boot is executed during USB boot. Signed-off-by: Sam Protsenko <[email protected]> Reviewed-by: Anand Moon <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-11-07mmc: exynos_dw_mmc: Add exynos850 compatibleSam Protsenko
Up until now "samsung,exynos7-dw-mshc-smu" compatible was used for Exynos850 SoC, as it's present in its device tree. But Exynos850 device tree also supports "samsung,exynos850-dw-mshc-smu" compatible string. Add it in compatible ID list in the driver so that it can be matched against this string for Exynos850 device tree. No functional change, as the driver data is just a copy of "samsung,exynos7-dw-mshc-smu" data for now. Signed-off-by: Sam Protsenko <[email protected]> Reviewed-by: Anand Moon <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-11-07mmc: exynos_dw_mmc: Add quirk for disabling FMPSam Protsenko
Add DWMCI_QUIRK_DISABLE_FMP which disables Flash Memory Protector (FMP) during driver's init. It's usually done by early bootloaders, but in some cases (like USB boot) the FMP may be left unconfigured. The issue was observed on Exynos850 SoC (the E850-96 board). Enabling this quirk makes eMMC functional even in such cases. No functional change, as this feature is only added here but not enabled for any chips yet. Signed-off-by: Sam Protsenko <[email protected]> Reviewed-by: Anand Moon <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-11-07mmc: exynos_dw_mmc: Improve coding styleSam Protsenko
Exynos DW MMC glue layer driver have seen a lot of changes recently. Stabilize the coding style. No functional change. Signed-off-by: Sam Protsenko <[email protected]> Reviewed-by: Anand Moon <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-11-07mmc: dw_mmc: Do not export dwmci_send_cmd() and dwmci_set_ios()Sam Protsenko
Do not over-expose the private dw_mmc API. The glue layer drivers at this point shouldn't be aware and shouldn't use the generic dwmci_send_cmd() and dwmci_set_ios() functions. Making those functions public causes a "leaky abstraction" issue. It clutters the public interface of generic dw_mmc driver and possibly leads to improper usage of those functions, so it's a bad design. If struct dm_dwmci_ops has to be extended, do so by copying it first (like it's done for example in snps_dw_mmc driver). That also makes sure the future changes to struct dm_dwmci_ops in dw_mmc driver will be automatically reflected in all extended copies, and avoid code duplication. This effectively reverts commit ef3b16bb8e73 ("mmc: dw_mmc: export dwmci_send_cmd() and dwmci_set_ios()"). No functional change. Fixes: ef3b16bb8e73 ("mmc: dw_mmc: export dwmci_send_cmd() and dwmci_set_ios()") Signed-off-by: Sam Protsenko <[email protected]> Reviewed-by: Anand Moon <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-11-07mmc: exynos_dw_mmc: Extend dm_dwmci_ops without code duplicationSam Protsenko
Instead of extending dm_dwmci_ops by copy-pasting the structure code first, copy the actual structure data with memcpy() and then set the .execute_tuning field. Now if struct dm_dwmci_ops gets modified in future, these changes will be automatically reflected in struct exynos_dwmmc_ops, which prevents possible issues in future. It also avoids code duplication. No functional change, but it can prevent possible isssues in future. Fixes: eda4bd29929c ("mmc: exynos_dw_mmc: add support for MMC HS200 and HS400 modes") Signed-off-by: Sam Protsenko <[email protected]> Reviewed-by: Anand Moon <[email protected]> Signed-off-by: Peng Fan <[email protected]>
2025-11-06serial: make VPL_DM_SERIAL depend on VPL_DMQuentin Schulz
I have a hunch VPL_DM_SERIAL should not be selectable if VPL isn't set as implied by the prefix. Additionally, still based on the prefix, I'm assuming VPL_DM should be a dependency. Since VPL_DM can only be selectable when VPL is enabled, only depend on VPL_DM. This mirrors SPL_DM_SERIAL and TPL_DM_SERIAL so seems right to me. Signed-off-by: Quentin Schulz <[email protected]> Reviewed-by: Tom Rini <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2025-11-06efi: video: fix mode info in payload modeBen Wolsieffer
Currently, the EFI framebuffer is non-functional in payload mode. It always reports: "No video mode configured in EFI!" This is caused by a copy-paste error that replaced "struct efi_entry_gopmode" with "struct efi_gop_mode". Fixes: 88753816cf54 ("efi: video: Move payload code into a function") Signed-off-by: Ben Wolsieffer <[email protected]> Reviewed-by: Heinrich Schuchardt <[email protected]>
2025-11-06qfw/acpi: do not zero out XSDT addressHeinrich Schuchardt
On RISC-V QEMU provides an XSDT table. The RSDP table points to it. We must not zero out this pointer because otherwise no ACPI table can be found. Fixes: 15ca25e31ed5 ("x86: emulation: Support BLOBLIST_TABLES properly") Reviewed-by: Bin Meng <[email protected]> Signed-off-by: Heinrich Schuchardt <[email protected]>
2025-11-06pinctrl: renesas: Add initial R8A78000 R-Car X5H PFC tablesHuy Bui
Add initial pin control tables for the Renesas R-Car X5H R8A78000 SoC. This SoC is the first one which includes custom DRV register handling, different from previous generations due to change in DRV register bit layout. Signed-off-by: Huy Bui <[email protected]> Signed-off-by: Khanh Le <[email protected]> Signed-off-by: Hai Pham <[email protected]> Signed-off-by: Marek Vasut <[email protected]>
2025-11-06pinctrl: renesas: Move drive strength configuration into sh_pfc_soc_operationsHai Pham
The upcoming Renesas R-Car Gen5 uses different mapping of bits in DRV control register, which is incompatible with existing DRV register bit mapping. Add .set_drive_strength callback into sh_pfc_soc_operations and call it from sh_pfc_pinconf_set(), to allow each SoC specific PFC driver to implement replacement .set_drive_strength. Make the current sh_pfc_pinconf_set_drive_strength() non-static, rename it with rcar_ prefix, and pass it as .set_drive_strength for existing PFC drivers. This is a preparatory patch for R-Car Gen5, no functional change. Signed-off-by: Hai Pham <[email protected]> Signed-off-by: Marek Vasut <[email protected]> [Marek: Consistently use .set_drive_strength() and pass exisiting sh_pfc_pinconf_set_drive_strength() as its parameter for all PFC drivers. Rewrite commit message.]
2025-11-06pinctrl: renesas: Show bit position in config writeHai Pham
Show bit position in config write debug log, which is helpful for cases where the p port setting is applied at the exact p bit position. Signed-off-by: Hai Pham <[email protected]> Signed-off-by: Marek Vasut <[email protected]> # Unsplit the string
2025-11-06pinctrl: renesas: Align Kconfig entry indentMarek Vasut
Fix Kconfig entry indent to be always consistently indented with leading tabs, never with leading spaces. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06gpio: renesas: Add R-Car Gen5 supportHuy Bui
Add support for the GPIO controller block in the R-Car Gen5 SoC family. The GPIO controller has a General Input Enable Register (INEN), whose reset state is to have all input disabled. The GPIO controller also has updated offsets for its control registers. U-Boot uses three registers, INDT, POSNEG, INEN, which have updated offsets, those are handled by the driver. Signed-off-by: Huy Bui <[email protected]> Signed-off-by: Hai Pham <[email protected]> Signed-off-by: Marek Vasut <[email protected]> [Marek: - Access Gen5 specific registers via driver data offsets, - Update commit message]
2025-11-06gpio: renesas: Access INDT, POSNEG, INEN registers via match data offsetsMarek Vasut
The Renesas R-Car Gen5 GPIO controller has INDT, POSNEG, INEN registers at different offsets compared to previous generations. Introduce three new entries in struct rcar_gpio_data {} match data to describe these register offsets for each GPIO controller. Update the driver to access these three registers through the match data offsets. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06gpio: renesas: Wrap quirks in struct rcar_gpio_dataMarek Vasut
Wrap the RCAR_GPIO_HAS_INEN quirk in more flexible struct rcar_gpio_data {} in preparation for addition of Renesas R-Car Gen5 GPIO controller support. The Renesas R-Car Gen5 GPIO controller requires more than a single quirk to properly describe it, therefore increase the flexibility and introduce full match data structure, and use it throughout the driver. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06gpio: renesas: Drop unused register macrosMarek Vasut
Remove register macros for registers which are not used by this driver. This makes it easier to get an overview of which registers are really used by the driver. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06gpio: renesas: Drop pfc_offset parsingMarek Vasut
The PFC offset is no longer used directly in the driver since commit fbf26bea3964 ("gpio: renesas: Migrate to pinctrl GPIO accessors") Drop the pfc_offset parsing. Fixes: fbf26bea3964 ("gpio: renesas: Migrate to pinctrl GPIO accessors") Signed-off-by: Marek Vasut <[email protected]>
2025-11-06phy: renesas: Add Multi-Protocol PHY driver for R-Car X5HThanh Quan
Add PHY driver for Multi-Protocol PHY present on Renesas R-Car X5H R8A78000 SoC. Currently, the PHY driver only supports configuring the MPPHY for ethernet operation. Signed-off-by: Thanh Quan <[email protected]> Signed-off-by: Phong Hoang <[email protected]> Signed-off-by: Hai Pham <[email protected]> #Fix License-Identifier Signed-off-by: Marek Vasut <[email protected]> [Marek: Clean up macros, indent, clock and reset handling in probe, rename the driver and add r8a78000- into compatible string, update commit message.]
2025-11-06phy: renesas: Add PCS driver for Renesas R-Car X5H R8A78000Tam Nguyen
Add support for the Ethernet Physical Coding Sublayer (PCS) controller on R-Car Gen5 SoCs, specifically the Renesas R-Car X5H R8A78000. The controller is based on the SERDES infrastructure used in previous R-Car generations, with updates for Gen5 register layout and features. Because majority of this driver is SoC-specific register programming, the majority of this driver is different enough from R8A779F0 SerDes driver to justify its own driver. Deduplication of the remaining bits of code does not yield any improvement. Signed-off-by: Hai Pham <[email protected]> Signed-off-by: Phong Hoang <[email protected]> Signed-off-by: Tam Nguyen <[email protected]> Signed-off-by: Thanh Quan <[email protected]> Signed-off-by: Marek Vasut <[email protected]> [Marek: Add missing clk_bulk_disable() in fail path. Drop always-true aneg_on setting. Reduce poll delay from 100s to 100ms. Use bulk reset operations to finalize reset handling.]
2025-11-06net: rswitch: Add Renesas R-Car X5H Ethernet Switch3 supportMarek Vasut
Add support for the Renesas Ethernet Switch3 (RSW3) controller, present in R-Car Gen5 SoCs such as R-Car X5H (R8A78000). The hardware offset differences are handled via driver match data. The driver newly detects whether the switch prot is connected to xPCS or not, and if so, turns on MIOC bit 3. This is new on R-Car X5H. GWCKSC register is also programmed only on X5H. The rest of the operation is identical to RSwitch2. Signed-off-by: Marek Vasut <[email protected]> Signed-off-by: Tam Nguyen <[email protected]> Signed-off-by: Phong Hoang <[email protected]> Signed-off-by: Thanh Quan <[email protected]> Signed-off-by: Hai Pham <[email protected]>
2025-11-06net: rswitch: Parametrize MPIC_MDC_CLK_SET clock settingMarek Vasut
The MPIC_MDC_CLK clock setting value differs between R-Car S4 and R-Car X5H. Parametrize the value in preparation for R-Car X5H addition into this driver. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06net: rswitch: Parametrize GWDCBAC, FWPBFCSDC, CABPIRM register offsetsMarek Vasut
The GWDCBAC0, GWDCBAC1, FWPBFCSDC, CABPIRM register offsets changed between R-Car S4 and R-Car X5H. Parametrize their offsets in preparation for R-Car X5H addition into this driver. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06net: rswitch: Inline FWRO, CARO, GWRO, TARO, RMRO macrosMarek Vasut
Inline FWRO, CARO, GWRO, TARO, RMRO macros directly into the follow up register macros. FWRO, CARO, GWRO, TARO are already zero, drop them. RMRO is 0x1000, increment all registers which add RMRO by 0x1000 directly. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06net: rswitch: Parametrize forwarding engine CSD register offsetMarek Vasut
The forwarding engine CSD register offset changed between the R-Car S4 and R-Car X5H. Parametrize this offset in preparation for R-Car X5H addition into this driver. Clean up the macro parameter names and make them more obvious. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06net: rswitch: Parametrize port countMarek Vasut
The total port counts differ across variants of this IP in R-Car S4 and R-Car X5H. Parametrize port count in preparation for R-Car X5H addition into this driver. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06net: rswitch: Parametize COMA, ETHA, GWCA offsetsMarek Vasut
The COMA, ETHA, GWCA offsets differ across variants of this IP in R-Car S4 and R-Car X5H. Parametrize these offsets in preparation for R-Car X5H addition into this driver. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06net: rswitch: Add support for split MII and SerDesMarek Vasut
This IP does support operating MII and SerDes via different ports. Currently, the driver assumes that MII and SerDes are always bound together on the same port, but this may not be the case. Implement support for controlling MII and SerDes separately. While the change is extensive, the gist of the change is to pass pointer to the selected port registers to MII or SerDes functions, depending on which port and operations should be done on that port. Each combined ETHA instance contains both MII and SerDes register pointers, which may not point to the same port, and passes those registers to MII and SerDes functions respectively to control the MII or SerDes of each port. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06net: rswitch: Use bulk clock operationsMarek Vasut
The new version of RSwitch3 in Renesas R-Car Gen5 uses multiple clock to supply the IP. Convert the driver to bulk clock API to cater for both single clock of R-Car S4 and multiple clock of R-Car Gen5. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06net: rswitch: Initialize RX DMA descriptor .die_dt field to DT_FEMPTYMarek Vasut
Empty RX DMA descriptor must contain .die_dt field set to DT_FEMPTY, because hardware DMA overwrites this field to non-DT_FEMPTY when data are received, and the .recv callback tests the content of RX descriptor .die_dt field to determine whether hardware did receive any data and updated the .die_dt field, and based on that information, receives a packet or not. Fix the incorrect RX DMA descriptor initialization to assure the .recv callback always works correctly. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06net: rswitch: Drop unused macrosMarek Vasut
Remove macros which are not used in the driver. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06net: rswitch: Switch indent from spaces to tabsMarek Vasut
Fix indent from multiple spaces to tabs, to be consistent with coding style and the rest of the driver. No functional change. Signed-off-by: Marek Vasut <[email protected]>
2025-11-06Revert "power: regulator: Add vin-supply for GPIO and Fixed regulators"Jonas Karlman
Rockchip boards may depend on a working MMC regulator in SPL to successfully load FIT payload from MMC. Typically, these boards only include the vmmc-supply regulator and not its vin-supply in SPL control FDT. The commit f98d812e5353 ("power: regulator: Add vin-supply for GPIO and Fixed regulators") breaks loading FIT from MMC in SPL on some of these boards due to now requiring the vin-supply to be included in the SPL control FDT. The commit also strangely enables any found vin-supply in regulator_common_of_to_plat() and not when a regulator is enabled or as part of regulator_autoset(). Revert the commit to fix FIT loading in SPL on broken boards. If a board needs to have its vin-supply enabled, two options come to mind: - Add regulator-always-on prop to the regulator in the -u-boot.dtsi for any board. - Implement full support for reference counting of regulators and then update the regulator-uclass to enable any found vin-supply when a regulator is enabled. This reverts commit f98d812e5353408ef77a46bad1f1cdc793ff8a03. Reported-by: Dang Huynh <[email protected]> Signed-off-by: Jonas Karlman <[email protected]> Reviewed-by: Dragan Simic <[email protected]>