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T4160 is a subset of T4240. Merge them in config_mpc85xx.h to simplify
the defines. Also move CONFIG_E6500 out of t4qds.h into config_mpc85xx.h.
Signed-off-by: York Sun <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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Added a default RCW(1_28_6_12) and PBI configure file for T4240, so it can use
PBL tool to produce the ramboot image.
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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Add Seagate GoFlex Home support
Start with dockstar configuration
define support for RTC, DATE, SATA and EXT4FS
Signed-off-by: Suriyan Ramasami <[email protected]>
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Signed-off-by: Andre Przywara <[email protected]>
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This adds support for the Cortex-A15-TC2 core tile for the Versatile
Express board by ARM. This is mostly a copy of the A5 support file,
but will be extended later with A15 specific options.
Signed-off-by: Andre Przywara <[email protected]>
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This patch creates a new config for the A5 dual core tile that includes the
generic config for the Versatile Express platform.
The generic config has been modified to provide support for the Extended
Memory Map, as used on the A5 core tile. A5 does not support the legacy
memory map.
Signed-off-by: Ryan Harkin <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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The current ca9x4_ct_vxp platform contains support for a Versatile
Express motherboard with a quad core A9 core tile.
This patch separates the Versatile Express motherboard code and the
A9 specific code, to ease supporting more core tiles in the next
patches.
Andre: merged the first two of Ryan's original patches and did some
checkpatch fixes.
Signed-off-by: Ryan Harkin <[email protected]>
Signed-off-by: Andre Przywara <[email protected]>
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Add sama5d3xek support with following feature
- boot from NAND flash, PMECC support, 4bit ECC @ 512 bytes sector
- boot from SPI flash support
- boot from SD card support
- LCD support
- EMAC support
- USB OHCI support
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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This patch enables gigabyte device for SMDK5250.
Acked-by: Simon Glass <[email protected]>
Signed-off-by: Rajeshwari Shinde <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Enable display support.
Signed-off-by: Fabio Estevam <[email protected]>
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Enable display support.
Signed-off-by: Fabio Estevam <[email protected]>
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The Freescale MPC8220 Power Architecture processors have long reached
EOL; Freescale does not even list these any more on their web site.
Remove the code to avoid wasting maitaining efforts on dead stuff.
Signed-off-by: Wolfgang Denk <[email protected]>
Cc: Andy Fleming <[email protected]>
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Use QSGMII card PHY address as default SGMII card PHY address, QSGMII card
PHY address is variable depends on different slot.
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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1, Implemented board_ft_fman_fixup_port() to fix port for kernel.
2, Implemented fdt_fixup_board_enet() to fix node status of different
slots and interfaces.
3, Adding detection of slot present for XGMII interface.
4, There is no PHY for XFI, so removed related phy address settings.
Signed-off-by: Shengzhou Liu <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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T4160QDS shares the same platform as T4240QDS. T4160 is a low power
version of T4240, with eight e6500 cores, two DDR3 controllers, and
slightly different SerDes protocols.
Signed-off-by: York Sun <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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Separate CONFIG_PPC_T4240 from board config file. Prepare to add more SoC
variants supported on the same board.
Signed-off-by: York Sun <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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T4240 has voltage ID fuse. Read the fuse and configure the voltage
correctly. Core voltage has higher tolerance on over side than below.
Signed-off-by: York Sun <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Roy Zang <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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T4240QDS uses a SST instead of SPANSION SPI flash.
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Andy Fleming <[email protected]>
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powerpc-eldk53-warning-fixes
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We don't use zlib and gzip but do use lzo, so enable this.
Signed-off-by: Simon Glass <[email protected]>
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This is a convenient way of finding out where boottime is going. Enable
it for coreboot.
Signed-off-by: Simon Glass <[email protected]>
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While we don't want PCAT timers for timing, we want timer 2 so that we can
still make a beep. Re-purpose the PCAT driver for this, and enable it in
coreboot.
Signed-off-by: Simon Glass <[email protected]>
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This timer runs at a rate that can be calculated, well over 100MHz. It is
ideal for accurate timing and does not need interrupt servicing.
Tidy up some old broken and unneeded implementations at the same time.
To provide a consistent view of boot time, we use the same time
base as coreboot. Use the base timestamp supplied by coreboot
as U-Boot's base time.
Signed-off-by: Simon Glass <[email protected]>base
Signed-off-by: Simon Glass <[email protected]>
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The gpio spec for bf54x and bf60x differ a lot from the old gpio driver for bf5xx.
A lot of machine macros are used to accomodate both code in one gpio driver.
This patch split the old gpio driver and move new gpio2 support to the generic
gpio driver folder.
- To enable gpio2 driver, macro CONFIG_ADI_GPIO2 should be defined in the board's
config header file.
- The gpio2 driver supports bf54x, bf60x and future ADI processors, while the
older gpio driver supports bf50x, bf51x, bf52x, bf53x and bf561.
- All blackfin specific gpio function names are replaced by the generic gpio APIs.
Signed-off-by: Sonic Zhang <[email protected]>
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- Move blackfin serial driver to the generic driver folder.
- Move blackfin serial headers to blackfin arch head folder.
- Update the include path to blackfin serial header in start up code.
Signed-off-by: Sonic Zhang <[email protected]>
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- Enable hw_watchdog_init() in watchdog.h if CONFIG_HW_WATCHDOG is defined.
- Move blackfin hw watchdog driver to the generic driver folder.
- Call hw_watchdog_init() from blackfin board init code.
- Reuse macro CONFIG_WATCHDOG_TIMEOUT_MSECS
- Update README.watchdog accordingly
Signed-off-by: Sonic Zhang <[email protected]>
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Remove blackfin specific implementation of the generic serial API when
early print macro is defined.
In BFIN_BOOT_BYPASS mode, don't call generic serial_puts, because
early print in bypass mode is running before code binary is relocated
to the link address.
Signed-off-by: Sonic Zhang <[email protected]>
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- Disable NAND driver on bf537-stamp.
- Make MMC_SPI optional.
- Disable LCD driver on bf527-ezkit.
- Enlarge BF609 nor flash reserved size from 256k to 512k bytes.
Signed-off-by: Sonic Zhang <[email protected]>
Signed-off-by: Sonic Zhang <[email protected]>
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Add softswitch_output command for bf609-ezkit to enable softswitches.
Signed-off-by: Bob Liu <[email protected]>
Signed-off-by: Sonic Zhang <[email protected]>
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Define core 1 L1 code sram start address.
Add function to enable core 1 for BF609 and BF561.
Add config macro to allow customer to run core 1 in uboot init code on core 0.
Signed-off-by: Sonic Zhang <[email protected]>
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Enable VIDEO and NAND supports only when the config options is defined.
Signed-off-by: Bob Liu <[email protected]>
Signed-off-by: Sonic Zhang <[email protected]>
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Signed-off-by: Andreas Bießmann <[email protected]>
Acked-by: Bo Shen <[email protected]>
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Signed-off-by: Josh Wu <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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Signed-off-by: Josh Wu <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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Add support for following features:
- nand boot, with PMECC 2bit ECC for 512 bytes sector
- SPI flash boot
- SD card boot
- LCD support
Signed-off-by: Josh Wu <[email protected]>
[fix -Wimplicit-function-declaration for at91_lcd_hw_init()]
Signed-off-by: Andreas Bießmann <[email protected]>
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Conflicts:
drivers/mtd/nand/mxc_nand_spl.c
include/configs/m28evk.h
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The boot parameters passed from SPL to UBOOT
must be saved as a part of uboot's gd data
as early as possible, before we will inadvertently
overwrite it. So adding a arch_cpu_init for the required
Socs to save it.
Signed-off-by: Sricharan R <[email protected]>
[trini: Add igep0033 hunk]
Signed-off-by: Tom Rini <[email protected]>
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The boot parameters are read from individual variables
assigned for each of them. This been corrected and now
they are stored as a part of the global data 'gd'
structure. So read them from 'gd' instead.
Signed-off-by: Sricharan R <[email protected]>
[trini: Add igep0033 hunk]
Signed-off-by: Tom Rini <[email protected]>
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these variables are curently defined in several config files but the
driver doesn't use them and defaults to hardcoded values in
nand_defs.h
It's interesting to be able to change this hardcoded valude when the
hardware is not using the default adress signals to drive ALE and CLE
and two configuration defines already exist for this purpose so use
them.
Signed-off-by: Eric Bénard <[email protected]>
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Several minor updates to the cm-t35 config file.
Signed-off-by: Igor Grinberg <[email protected]>
Tested-by: Nikita Kiryanov <[email protected]>
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Add the flag to allow runtime enviroment variable modifications.
This is being added so that the board-name can be modified at runtime
to indicate either a panda(4430) or a panda-es(4460)
Signed-off-by: Dan Murphy <[email protected]>
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Fix the device tree loading for panda(4430) and panda-es(4460)
Modify the board name if a 4460 panda or panda-es is detected
at run time.
In the findfdt add a check for the panda-es board name and load
the panda-es device tree blob.
Signed-off-by: Dan Murphy <[email protected]>
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Warm reset on OMAP5 freezes when USB cable is connected.
Fix requires PRM_RSTTIME.RSTTIME1 to be programmed
with the time for which reset should be held low for the
voltages and the oscillator to reach stable state.
There are 3 parameters to be considered for calculating
the time, which are mostly board and PMIC dependent.
-1- Time taken by the Oscillator to shut + restart
-2- PMIC OTP times
-3- Voltage rail ramp times, which inturn depends on the
PMIC slew rate and value of the voltage ramp needed.
In order to keep the code in u-boot simple, have a way
for boards to specify a pre computed time directly using
the 'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC'
option. If boards fail to specify the time, use a default
as specified by 'CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC' instead.
Using the default value translates into some ~22ms and should work in
all cases.
However in order to avoid this large delay hiding other bugs,
its recommended that all boards look at their respective data
sheets and specify a pre computed and optimal value using
'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC'
In order to help future board additions to compute this
config option value, add a README at doc/README.omap-reset-time
which explains how to compute the value. Also update the toplevel
README with the additional option and pointers to
doc/README.omap-reset-time.
Signed-off-by: Lokesh Vutla <[email protected]>
[[email protected]: Updated changelog and added the README]
Signed-off-by: Rajendra Nayak <[email protected]>
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As part of a review of a recent patch to add a new AM335x board, Tom
found several duplicate and/or unused #defines.
This patch simply removes them.
The two affected configs have been recompiled to check nothing was
broken (from a compilation point of view !!)
Reported-by: Tom Rini <[email protected]>
Signed-off-by: Mark Jackson <[email protected]>
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Add 'optargs' variable to be set to additional kernel arguments, similar
to omap3*/am3* usage.
Cc: Sricharan R <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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The IGEP COM AQUILA and CYGNUS are industrial processors modules with
following highlights:
o AM3352/AM3354 Texas Instruments processor
o Cortex-A8 ARM CPU
o 3.3 volts Inputs / Outputs use industrial
o 256 MB DDR3 SDRAM / 128 Megabytes FLASH
o MicroSD card reader on-board
o Ethernet controller on-board
o JTAG debug connector available
o Designed for industrial range purposes
Signed-off-by: Enric Balletbo i Serra <[email protected]>
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