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V4H Sparrow Hawk
Switch Retronix R-Car V4H Sparrow Hawk to distro boot command to obtain
generic distro boot capability. The boot scripts now search each of the
SD, NVMe, USB boot devices for either a fitImage with embedded script,
regular boot script, or extlinux.conf, and boot the first one found.
This allows for standardized boot of the device, similar to other such
devices.
There are slight customizations to the distro boot commands, specifically
the PCIe controller is started before USB controller, because the USB
controller is attached to the PCIe controller. Furthermore, USB ethernet
boot is not enabled.
Signed-off-by: Marek Vasut <[email protected]>
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R-Car V4H Sparrow Hawk
Add bootloader update environment to Retronix R-Car V4H Sparrow Hawk.
The "update_loader_from_{mmc,nvme,usb}" script updates U-Boot "flash.bin"
in SPI NOR at offset 0x0 from SD card, NVMe SSD and USB mass storage
device respectively. Each script sets up parameters for the generic
update script "update_loader_from_blk", which can be used to update
the "flash.bin" from any block device. The parameters are these:
- renesas_update_loader_iface ....... Update block device (mmc, nvme, usb, ...)
- renesas_update_loader_dev ......... Update block device number (0, 1, ...)
- renesas_update_loader_part ........ Update block device partition (1, 2, ...)
- renesas_update_loader_filename .... Update file name (flash.bin)
- renesas_update_loader_sf_offset ... SPI NOR target offset (0x0)
Signed-off-by: Marek Vasut <[email protected]>
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V4H Sparrow Hawk
Add PCIe controller firmware handling environment to Retronix R-Car
V4H Sparrow Hawk. The "renesas_rcar_gen4_load_firmware" script is used
to load PCIe controller firmware from SPI NOR offset 0x300000. The
"flash_pcie_fw_to_qspi_from_mmc" script is used to write the firmware
from SD card to SPI NOR offset 0x300000 .
Signed-off-by: Marek Vasut <[email protected]>
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The GIC redistributor base address depends on the part: the 2VM3654
device has 4 APU cores and 3 GIC ITS blocks, which shifts the
redistributor region up compared to the base 8 core / single ITS part.
A single U-Boot binary must therefore pick the right base at runtime
instead of relying on the compile-time GICR_BASE used by the generic
lowlevel_init().
Add a SoC specific lowlevel_init() that reads the PMC TAP IDCODE and
selects GICR_BASE_2VM3654 for the 2VM3654 device, otherwise keeps the
default GICR_BASE. CONFIG_ARMV8_MULTIENTRY is not supported on Versal
Gen 2 so the generic slave handling is intentionally dropped.
Signed-off-by: Michal Simek <[email protected]>
Link: https://patch.msgid.link/4c0dc2b6e29d300db15be0844879ab4d028d98a9.1783493630.git.michal.simek@amd.com
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https://git.u-boot-project.org/u-boot/custodians/u-boot-sh
This includes temporary U-Boot DT ECC carveouts for R-Car Gen5, they
will be dropped from U-Boot DTs once OF_UPSTREAM DTs get re-synced.
This also includes RPC-IF support for R-Car Gen5 and env storage in RPC
HF.
This also includes an update for R-Car Gen5 UFS controller driver.
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Enable RPC and HyperFlash support on R-Car R8A78000 X5H Cortex-M33 RSIP.
RPC is used both to update the HF content, which includes the U-Boot on
RSIP itself and SCP firmware, as well as access the U-Boot environment
for U-Boot on RSIP.
Signed-off-by: Marek Vasut <[email protected]>
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https://git.u-boot-project.org/u-boot/custodians/u-boot-imx
CI: https://git.u-boot-project.org/u-boot/custodians/u-boot-imx/-/pipelines/906
- Fix a boot regression on i.MX7 related to the system counter.
- Add Aquila iMX95 0243 PID4.
- Update phycore_imx8mm DDR timings.
- Add FRDM-IMX95 initial support.
- Handle FCFB header during SPI NOR boot and CST backend selection.
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Add boot support and peripherals like eMMC/SD, UART, I2C, GPIO, ENETC0/1
and PCIE0/1 for iMX95 15x15 FRDM.
Updated doc for build instructions.
Signed-off-by: Lei Xu <[email protected]>
Signed-off-by: Joseph Guo <[email protected]>
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Add U-Boot support for Milk-V Duo 256M.
This board has a different SoC compared to the Milk-V Duo 64M, it uses
the Sophgo SG2002 instead of the Sophgo CV1800B. Both SoCs share many
common IP blocks, so this board reuses the existing cv1800b CPU support.
The board shares the same 'board.c' with Milk-V Duo 64MB (CV1800B), so
use the same file for now.
Link: https://milkv.io/docs/duo/getting-started/duo256m
Signed-off-by: Hiago De Franco <[email protected]>
Acked-by: Leo Yu-Chi Liang <[email protected]>
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The Phytec Tauri L is sold with multiple memory configurations beyond the
base 2 GB variant. To support these alternative capacities seamlessly,
read the physical memory size directly from the EEPROM of the underlying
phyCORE module and apply the appropriate DDR timing parameters at runtime.
Alternatively, a fixed memory configuration can still be enforced via a
dedicated Kconfig option if dynamic detection is not desired.
Note that while U-Boot correctly discovers the full physical memory bank,
the device tree excludes the memory beyond 3 GB (below the 4 GB boundary).
This ensures that U-Boot allocations and early EFI staging buffers remain
safe from 32-bit interconnect DMA limitations inherent to some i.MX8MM
IP blocks.
Signed-off-by: INgo Rah <[email protected]>
Reviewed-by: Gregor Herburger <[email protected]>
Reviewed-by: Benedikt Spranger <[email protected]>
Reviewed-by: Yannic Moog <[email protected]>
Tested-by: Yannic Moog <[email protected]>
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The x960-28YSQ is a 25G/100G layer 3 switch from Allied Telesis.
Signed-off-by: Chris Packham <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
[sr: fix DT file name in MAINTAINERS]
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https://git.u-boot-project.org/u-boot/custodians/u-boot-imx
CI: https://git.u-boot-project.org/u-boot/custodians/u-boot-imx/-/pipelines/749
- Support authenticating signed Mcore container image on i.MX9.
- Support booting CM70, CM71 and CM33 sync cores on i.MX9.
- Add i.MX SNVS RTC driver.
- Detect RAM sizes on Toradex smarc and aquila i.MX95 boards.
- Add support for the Librem5 devkit.
- Subtract half a cycle instead of three quarters of a cycle after DQS
gating calibration on i.MX6.
- Several tqma6 improvements.
- Add product ID support for new Toradex boards.
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https://git.u-boot-project.org/u-boot/custodians/u-boot-rockchip
- Switched to use upstream pinctrl header include,
- Dropped SDHCI DT properties in U-Boot-specific DT for NanoPi R5 as
most are present upstream and those which aren't are breaking devices,
- Fixed ECC strength mismatch between reading and writing on non-0
NAND chips configured as boot medium (nand-is-boot-medium),
- Moved Simon to reviewer for ARM ROCKCHIP,
- Fixed build issue related to GPT capsule support accessing a struct
member only present when CONFIG_PARTITION_TYPE_GUID is set,
- Added support for new devices:
- Anbernic RG-DS
- ROC-RK3588S-PC
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Use alias-based RAM probing to detect different memory configurations
on Toradex Aquila iMX95. The address wrap-around is not linear: address
bits above the module capacity alias back with some low address bits
XORed (bit 32 -> XOR 0xc000), as measured on 4GB and 8GB modules.
During probing, skip the first 256MB, since that region is reserved.
Signed-off-by: Emanuele Ghidoli <[email protected]>
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Use alias-based RAM probing to detect different memory configurations
on Toradex SMARC iMX95. The address wrap-around is not linear: address
bits above the module capacity alias back with some low address bits
XORed (bit 32 -> XOR 0xc000), as measured on 4GB and 8GB modules.
During probing, skip the first 256MB, since that region is reserved.
Signed-off-by: Emanuele Ghidoli <[email protected]>
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Although it has similar naming the Librem 5 Devkit is a completely
different design from the Librem 5 phone. It uses an imx8mq SOM from
Emcraft, a separate HDMI port instead of DisplayPort, different USB-C
chip, panel, etc.
This is based on a Emcraft's SOM documentation, Purism's downstream fork
and the available schematics of the devkit.
Link: https://developer.puri.sm/Librem5/Development_Environment/Boards/imx8.html
Link: https://source.puri.sm/Librem5/dvk-mx8m-bsb
Co-authored-by: Angus Ainslie <[email protected]>
Co-authored-by: Manuel Traut <[email protected]>
Signed-off-by: Manuel Traut <[email protected]>
Tested-by: Manuel Traut <[email protected]>
Signed-off-by: Guido Günther <[email protected]>
[fabio: Removed the arch/arm/dts/Makefile entry that does not apply and
it is not needed as the board uses OF_UPSTREAM]
Signed-off-by: Fabio Estevam <[email protected]>
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The ROC-RK3588S-PC board is an SBC made by Firefly, based on the RK3588S
SoC.
Add support for it.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Link: https://patch.msgid.link/[email protected]
[s/ROC-PC-RK3588S/ROC-RK3588S-PC/ in commit log and diff]
Signed-off-by: Quentin Schulz <[email protected]>
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Enable CONFIG_TIMER_EARLY to allow udelay() calls during
early initialization phases. This is required for proper
timing operations before the full timer driver is available.
Signed-off-by: Raymond Mao <[email protected]>
Signed-off-by: Guodong Xu <[email protected]>
Tested-by: Songsong Zhang <[email protected]>
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Add SPL support featuring debug UART output for early boot
diagnostics on K1 SoC.
Signed-off-by: Raymond Mao <[email protected]>
Signed-off-by: Guodong Xu <[email protected]>
Tested-by: Songsong Zhang <[email protected]>
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Restructure K1 SoC support to handle multiple boards through a single
configuration:
1. Rename bananapi-f3_defconfig to spacemit_k1_defconfig.
2. Move all K1 board files to board/spacemit/k1/.
3. Replace TARGET_BANANAPI_F3 with TARGET_SPACEMIT_K1 and rename the
board's <board>.h header to k1.h.
Eliminates the need for board-specific defconfigs while maintaining
hardware compatibility.
Signed-off-by: Raymond Mao <[email protected]>
Signed-off-by: Guodong Xu <[email protected]>
Link: https://patch.msgid.link/[email protected]
Tested-by: Songsong Zhang <[email protected]>
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Add support for the Anbernic RG-DS dual-screen handheld gaming device.
Link: https://anbernic.com/products/rgds
Signed-off-by: Chris Morgan <[email protected]>
Reviewed-by: Quentin Schulz <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Link: https://patch.msgid.link/[email protected]
[conflict resolution in doc/board/rockchip/rockchip.rst due to commit
b5deaa71fbe5 ("board: rockchip: Add support for 9Tripod X3568 v4")]
Signed-off-by: Quentin Schulz <[email protected]>
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Move the bulk of the board environment from CFG_EXTRA_ENV_SETTINGS in
ls1028ardb.h to board/nxp/ls1028a/ls1028ardb.env. Because the board
directory is shared with ls1028aqds, the file is selected through
CONFIG_ENV_SOURCE_FILE rather than the SYS_BOARD default.
The distro_bootcmd machinery cannot be expressed in a .env file. The
BOOTENV macro expands to environment text with embedded NUL separators,
and the board overrides three distro variables (boot_scripts,
boot_a_script and scan_dev_for_boot_part) that must follow BOOTENV to
take effect. BOOTENV and those three overrides therefore remain in
CFG_EXTRA_ENV_SETTINGS, which is concatenated after the .env text, while
every other variable moves to the .env file.
The resulting default environment is functionally unchanged for both the
ls1028ardb_tfa and ls1028ardb_tfa_SECURE_BOOT defconfigs. This was
verified with an order aware comparison of the default environment before
and after the change. The only difference is that three accidental double
spaces in xspi_bootcmd, sd_bootcmd and emmc_bootcmd collapse to single
spaces, because the preprocessor normalises whitespace in the now
unquoted text, which does not affect command parsing.
Signed-off-by: Aristo Chen <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
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Ryan Chen <[email protected]> says:
AST2700 is the 8th generation of Integrated Remote Management
Processor introduced by ASPEED Technology Inc. It is a Board
Management Controller (BMC) SoC family with a dual-die architecture:
SoC0 ("CPU" die with four ARM Cortex-A35 application cores) and
SoC1 ("IO" die with peripherals) each SoC have its own SCU PLLs,
clock dividers and reset domains.
Link: https://lore.kernel.org/r/[email protected]
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Add initial support for the ASPEED AST2700, an arm64 (Cortex-A35)
Baseboard Management Controller (BMC) SoC. AST2700 is Aspeed's 8th
generation BMC and uses a dual-die architecture: SoC0 (the "CPU"
die) hosts the four Cortex-A35 cores and its own SCU at 0x12c02000,
while SoC1 (the "IO" die) hosts the peripherals and its own SCU at
0x14c02000.
This commit adds:
- ASPEED_AST2700 Kconfig option and the ast2700 mach subdir
(mach Makefile, ast2700/Kconfig, board/aspeed/evb_ast2700/*)
- arm64 MMU map covering the SoC device window and the DRAM
region at 0x4_0000_0000 (up to 8 GiB)
- lowlevel_init.S for early CPU bring-up
- cpu-info: print SoC ID (AST2700/2720/2750 A0/A1/A2 variants)
and reset cause (cold reset, EXT reset, WDT reset)
- board_common: dram_init via UCLASS_RAM, AHBC timeout init
- platform: env_get_location() that selects SPI/eMMC based on
the IO-die HW strap; arch_misc_init() that exposes
${boot_device} and ${verify} to the boot script
- SCU0/SCU1 register layout header (scu_ast2700.h)
- configs/evb-ast2700_defconfig and include/configs/evb_ast2700.h
for the AST2700 EVB board
The defconfig depends on ast2700-evb.dts, which is introduced in
a subsequent patch; this commit must be applied with the
remaining series for evb-ast2700_defconfig to build.
Signed-off-by: Ryan Chen <[email protected]>
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Add initial U-Boot support for Aquila iMX95 SoM.
Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/nxp-imx95
Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit
Signed-off-by: Franz Schnyder <[email protected]>
Reviewed-by: Francesco Dolcini <[email protected]>
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Move the shared environment from CFG_EXTRA_ENV_SETTINGS in
mx6sabre_common.h to a common text environment fragment in
include/env/nxp/mx6sabre_common.env. The mx6sabresd and mx6sabreauto
board environments include this fragment and add their own console
setting, which is the only board specific difference between them. The
eMMC firmware update variables remain guarded by CONFIG_SUPPORT_EMMC_BOOT
inside the fragment. The now unused CONSOLE_DEV defines and the
linux/stringify.h include are dropped.
The generated default environment is unchanged for both boards. This was
verified by comparing the output of scripts/get_default_envs.sh before
and after the change, which produced identical results.
Signed-off-by: Aristo Chen <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Move the board environment from CFG_EXTRA_ENV_SETTINGS in the config
header to board/nxp/mx6ullevk/mx6ullevk.env for better maintainability.
The file is named after CONFIG_SYS_BOARD so it is selected automatically
without setting CONFIG_ENV_SOURCE_FILE. Drop the now unused
linux/stringify.h include.
The generated default environment is unchanged. This was verified by
comparing the output of scripts/get_default_envs.sh before and after the
change, which produced identical results.
Signed-off-by: Aristo Chen <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Move the board environment from CFG_EXTRA_ENV_SETTINGS in the config
header to board/nxp/mx7ulp_evk/mx7ulp_evk.env for better
maintainability. The file is named after CONFIG_SYS_BOARD so it is
selected automatically without setting CONFIG_ENV_SOURCE_FILE.
The generated default environment is unchanged. This was verified by
comparing the output of scripts/get_default_envs.sh before and after the
change, which produced identical results.
Signed-off-by: Aristo Chen <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Currently, the bi_dram[] information is stored in the board info
structure (bd). Because bd is only valid after reserve_board(),
dram_init_banksize() must be called late in the initialization process.
This limitation is problematic, as it forces us to rely on a variety of
bespoke functions to determine board RAM, bank memory sizes, and other
early setup requirements.
By moving bi_dram[] into the global data (gd), we can run it earlier.
This is particularly convenient since boards define their own
dram_init_banksize() routines, which do not always rely on parsing
Device Tree (DT) memory nodes.
Additionally, U-Boot defaults to relocating to the top of the first memory
bank. While boards currently use custom functions to override this
behavior, having the DRAM bank information available earlier in gd makes
relocating to a different bank trivial and standardizes the process.
Reviewed-by: Anshul Dalal <[email protected]>
Tested-by: Michal Simek <[email protected]> # Versal Gen 2 Vek385
Tested-by: Anshul Dalal <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Ilias Apalodimas <[email protected]>
Tested-by: Christophe Leroy (CS GROUP) <[email protected]>
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Use board_get_usable_ram_top() instead of get_effective_memsize() to
set gd->ram_top to something <= 4GiB.
Both board_get_usable_ram_top() and get_effective_memsize() are used to
set gd->ram_top in setup_dest_addr(). However, get_effective_memsize()
also sets gd->bd->bi_dram[0].size in dram_init_banksize(), which is
undesirable.
Prior to commit bddd6bbef3dc ("arm: mediatek: mt7988:
drop dram_init_banksize()"), gd->bd->bi_dram[0].size was overridden in
a board-specific dram_init_banksize() implementation. When that was
removed get_effective_memsize() set gd->bd->bi_dram[0].size to the wrong
value because of CFG_MAX_MEM_MAPPED.
Rather than continue to use an old-style CFG_ option and the potentially
confusing overriding of gd->bd->bi_dram[0].size (it is difficult to see
which order the functions that set it are called), we can just use
board_get_usable_ram_top() to set gd->ram_top to the correct value
instead. This is possible now, thanks to LMB_LIMIT_DMA_BELOW_RAM_TOP
being set by default for 64-bit Mediatek ARM SoCs.
The CFG_MAX_MEM_MAPPED option is removed since it is no longer needed.
The config header and Kconfig option are also removed since that was
the last CFG_ option.
Reported-by: Rudy Andram <[email protected]>
Closes: https://lore.kernel.org/u-boot/[email protected]/
Fixes: bddd6bbef3dc ("arm: mediatek: mt7988: drop dram_init_banksize()")
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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Use board_get_usable_ram_top() instead of get_effective_memsize() to
set gd->ram_top to something <= 4GiB.
Both board_get_usable_ram_top() and get_effective_memsize() are used to
set gd->ram_top in setup_dest_addr(). However, get_effective_memsize()
also sets gd->bd->bi_dram[0].size in dram_init_banksize(), which is
undesirable.
Prior to commit 56183fb025c2 ("arm: mediatek: mt7987: drop
dram_init_banksize()"), gd->bd->bi_dram[0].size was overridden in
a board-specific dram_init_banksize() implementation. When that was
removed get_effective_memsize() set gd->bd->bi_dram[0].size to the wrong
value because of CFG_MAX_MEM_MAPPED.
Rather than continue to use an old-style CFG_ option and the potentially
confusing overriding of gd->bd->bi_dram[0].size (it is difficult to see
which order the functions that set it are called), we can just use
board_get_usable_ram_top() to set gd->ram_top to the correct value
instead. This is possible now, thanks to LMB_LIMIT_DMA_BELOW_RAM_TOP
being set by default for 64-bit Mediatek ARM SoCs.
On mt7987, there is already an implementation of
board_get_usable_ram_top() for other reasons, so it is modified to
also limit ram_top to 4GiB (mt7987 is currently the only thing that
sets CONFIG_MTK_TZ_MOVABLE=y so it is safe to change this here without
unintentional side-effects).
The CFG_MAX_MEM_MAPPED option is removed since it is no longer needed.
The config header and Kconfig option are also removed since that was
the last CFG_ option.
Fixes: 56183fb025c2 ("arm: mediatek: mt7987: drop dram_init_banksize()")
Link: https://patch.msgid.link/[email protected]
Signed-off-by: David Lechner <[email protected]>
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Prepare v2026.07-rc5
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Bastien Curutchet <[email protected]> says:
This series aims to add back the omap4 support. This support was removed
by commit b0ee3fe642c ("arm: ti: Remove omap4 platform support") because
at that moment, none of the OMAP4-based boards had done the migration to
DM_I2C.
My use case is an old product based on the Variscite's omap4 system on
module. I needed to upgrade U-Boot on it for security reasons. I think
that this work could benefit to other people who may have same kind of
product to maintain.
Patch 1 to 3 remove the omap's clock driver dependency to the AM33xx
as it is also present in omap4 platforms. I tested these changes on the
beaglebone black to ensure I didn't break the AM33xx case.
Patch 4 & 5 revert the deletion of the omap4 support. The revert makes
checkpatch.pl angry. I fixed quite a lots of warnings already but it
remains two kinds of warnings:
- CamelCase on timings structure, I left the CamelCase because IMHO it's
more readable this way.
- #ifdef CONFIG_XYZ shouldn't be used anymore. I left one of this because
I didn't find a clean way to get rid of it.
Patch 6 adds support for the Variscite's system on module. This system on
module is supported by the Linux project through
ti/omap/omap4-var-som-om44.dtsi
Link: https://lore.kernel.org/r/[email protected]
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This include file isn't used since the omap4 support has been dropped.
Since this support is about to be reintroduced, this file is going to be
used again. The upcoming support is minimal and doesn't include network,
therefore leaving PXE and DHCP in the BOOT_TARGET_DEVICES list would lead
to build errors.
Remove PXE and DHCP from the list of BOOT_TARGET_DEVICES.
Remove the LEGACY_MMC macros and the findfdt script that looks for
no-longer supported boards.
Remove the empty #ifdef XPL_BUILD
Signed-off-by: Bastien Curutchet <[email protected]>
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Bind the DBSC5 DRAM controller driver on boot in board_early_init_r(),
which brings up the DBSC5 DRAM controller and its PHY and which enables
access to DRAM present on this system.
Add default boot command which loads additional bootloader components
from HF and UFS storage into SRAM and DRAM, and starts those components
on SCP and AP core 0. The system is then capable of reaching U-Boot on
the AP core 0. Specifically, the following components are loaded:
- SCP firmware, 384 kiB from HF offset 0x4c0000 to SCP STCM
- TFA BL31, 256 kiB from UFS0 offset 0x5000 * 4 kiB sectors to DRAM 0x8c200000
- TEE, 2 MiB from UFS0 offset 0x5200 * 4 kiB sectors to DRAM 0x8c400000
- U-Boot, 1 MiB from UFS0 offset 0x7200 * 4 kiB sectors to DRAM 0x8c300000
- IPL parameters table is generated at DRAM address 0x8c100000
Enable pstore command support to allow dumping kernel console from
pstore/ramoops, which is convenient for debugging. Use as follows:
=> pstore set 0x80000000 0x10000 0x400 0x8000 0 0 0
=> pstore display console
Signed-off-by: Marek Vasut <[email protected]>
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Enable vidconsole for the am335x-evm board.
Reviewed-by: Kory Maincent <[email protected]>
Signed-off-by: Markus Schneider-Pargmann (TI) <[email protected]>
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mach-axiado AX3005 SCM3005 board, a quad-core ARM Cortex-A53 (ARMv8/ARM64) platform."
Siu Ming Tong <[email protected]> says:
Patch 1 adds the device tree files: an SoC-level DTSI describing
GIC-v3, Cadence/Zynq UART, a fixed reference clock, and spin-table
secondary CPU boot, plus a board-level DTS setting the console to
uart3 at 115200 baud with 2 GB DRAM at 0x80000000.
Patch 2 adds mach-axiado to support Axiado SoC-based boards, Kconfig
plumbing (AXIADO_AX3005 and TARGET_SCM3005), defconfig, board source
with ft_board_setup() and a MAINTAINERS entry.
Tested on SCM3005 EVK hardware
Link: https://lore.kernel.org/r/[email protected]
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Introduce mach-axiado to support Axiado SoC-based boards. This adds
the platform Kconfig and build infrastructure, along with initial
SCM3005 board support using the AX3005 SoC.
Introduces AXIADO_AX3005, which selects ARM64, driver
model, GIC-v3, and Zynq UART. TARGET_SCM3005 selects ARCH_AXIADO,
allowing future SoC variants to share the platform configuration.
Secondary cores use spin-table boot. ft_board_setup() corrects
the cpu-release-addr in the FDT, which arch_fixup_fdt() overwrites
with the post-relocation address.
Add U-Boot board support for the Axiado AX3005 based targets, a quad-core
ARM Cortex-A53 (ARMv8) platform.
Tested-by: Siu Ming Tong <[email protected]>
Signed-off-by: Karthikeyan Mitran <[email protected]>
Signed-off-by: Siu Ming Tong <[email protected]>
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Add board support for the Freebox Nodebox 10G based on the Marvell
Armada 8040 SoC. This board features:
- Quad-core ARMv8 AP806 with dual CP110 companions
- eMMC storage via Xenon SDHCI controller
- 1G SGMII Ethernet on CP0 lane 5
- I2C buses for peripheral access
- NS16550 UART console at 115200 baud
The implementation includes:
- Device tree for the Nodebox 10G hardware
- Dedicated board directory (board/freebox/nbx10g/)
- Board-specific Kconfig and defconfig
The U-Boot comphy bindings (phy-type/phy-speed) differ from the
mainline Linux PHY framework bindings used by phy-mvebu-cp110-comphy,
so U-Boot and the kernel each have their own device tree.
Signed-off-by: Vincent Jardin <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Add the Allied Telesis x220 board. There are a number of other variants
with the same CPU block that are sold under some different brand names
but the x220 was first.
The x220 uses the AlleyCat3 switch chip with integrated ARMv7 CPU.
Because of this it is reliant on a binary blob for the DDR training. In
upstream u-boot this is replaced by an empty file.
Signed-off-by: Chris Packham <[email protected]>
Reviewed-by: Stefan Roese <[email protected]>
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Prepare v2026.07-rc4
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Add configure_capsule_updates() supporting MMC, SD and QSPI/OSPI
boot modes for DFU string generation. Add set_dfu_alt_info() for
FWU multi-bank mode to generate DFU alt info from NOR flash MTD
partitions. Add XILINX_BOOT_IMAGE_GUID for the capsule updatable
firmware image.
Signed-off-by: Padmarao Begari <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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The TQMa6UL[L]x is a family of SoMs based on the i.MX6UL[L] SoCs.
They are available either with board connectors or as LGA packages
with solder balls. Add Support for the SoM and its combination with
our MBa6ULx carrier board. For use with the MBa6ULx carrier board,
the LGA variant is soldered onto an adapter board.
Signed-off-by: Nora Schiffer <[email protected]>
Signed-off-by: Max Merchel <[email protected]>
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The watchdog base addresses are now obtained from the devicetree via
ofnode_* functions. Remove the hardcoded macro definitions as they are
no longer needed.
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
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Caleb Ethridge <[email protected]> says:
This series performs a general cleanup of the default U-boot environment
for sc5xx boards, stemming from the decision to no longer store the
environment in the SPI flash. The environments for each board have been
edited to contain the minimum number of commands needed for all supported
boot modes to avoid confusion, and the default boot command synced to spi
for all boards that support it. The filesystem for the SPI flash has also
been changed from jffs2 to ubifs.
A bug with the Ethernet reset line on the sc594 has been fixed, and the
sc573 has been renamed from the EZKIT to the EZLITE to match the name of the
publically available board. EZKIT was only used internally before release.
Preliminary binman support for sc5xx boards has been removed as it was unused
and full support never added.
Link: https://lore.kernel.org/r/[email protected]
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Rename the SC573 EZKIT board to EZLITE across the device tree,
defconfig, board file, and related Kconfig/Makefile entries to
match with release naming. EZKIT was used internally before the
official product release.
Signed-off-by: Caleb Ethridge <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
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Add support for the Geist board based on the Renesas R8A779MD (M3Le) SoC, a
register-compatible variant of the R8A77965 (M3N) with reduced peripherals.
The Geist board design references the Renesas Salvator-X/XS boards, adapting
their configuration for the R8A779MD SoC.
The board will be switched to OF_UPSTREAM once the DTs land in upstream.
Signed-off-by: Huy Bui <[email protected]>
Signed-off-by: Nguyen Tran <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
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Following commit 4300f9f4c5d7 ("board: st: stm32mp25: support dynamic
A/B bank bootup"), this patch enables automatic detection of the active
A/B bank on STM32MP15 platforms by retrieving partition GUIDs from FWU
metadata.
This ensures the system correctly identifies the bootable partitions
even in multi-bank scenarios, falling back to a standard bootable flag
scan if the UUIDs are missing.
To enable A/B bank bootup on STM32MP15 boards, add the following Kconfig
options to the stm32mp15[_basic]_defconfig:
CONFIG_FWU_MULTI_BANK_UPDATE=y
CONFIG_FWU_MDATA=y
CONFIG_FWU_NUM_BANKS=2
CONFIG_FWU_NUM_IMAGES_PER_BANK=3
CONFIG_CMD_FWU_METADATA=y
CONFIG_FWU_MDATA_V2=y
Signed-off-by: Dario Binacchi <[email protected]>
Reviewed-by: Patrice Chotard <[email protected]>
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This series from James Hilliard <[email protected]> converts the
static flags list for the environment to be configured via Kconfig and
updates the documentation.
Link: https://lore.kernel.org/r/[email protected]
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