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This included some changes to common files:
* Add 8568 processor SVR to various places
* Add support for setting the qe bus-frequency value in the dts
* Add the 8568MDS target to the Makefile
Signed-off-by: Andy Fleming <[email protected]>
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Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349E-mITX and MPC8349E-mITX-GP.
This allows ddr->sdram_clk_cntl to be properly initialized. This is necessary
on some ITX boards, notably those with a revision 3.1 CPU.
Also change spd_sdram() in cpu/mpc83xx/spd_sdram.c to not write anything into
ddr->sdram_clk_cntl if CFG_DDR_SDRAM_CLK_CNTL is not defined.
Signed-off-by: Timur Tabi <[email protected]>
Acked-by: Michael Benedict <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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Signed-off-by: Stefan Roese <[email protected]>
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Signed-off-by: Ed Swarthout <[email protected]>
Signed-off-by: Jon Loeliger <[email protected]>
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The PCI I/O space mapping for Freescale MPC8540ADS board was broken by commit
52c7a68b8d587ebcf5a6b051b58b3d3ffa377ddc which failed to update the #define's
describing the local address window used for the PCI I/O space accesses -- fix
this and carry over the necessary changes into the MPC8560ADS code since the
PCI I/O space mapping was also broken for this board (by the earlier commit
087454609e47295443af793a282cddcd91a5f49c). Add the comments clarifying how
the PCI I/O space must be mapped to all the MPC85xx board config. headers.
Signed-off-by: Sergei Shtylyov <[email protected]>
board/mpc8540ads/init.S | 4 ++--
board/mpc8560ads/init.S | 4 ++--
include/configs/MPC8540ADS.h | 5 ++---
include/configs/MPC8541CDS.h | 2 +-
include/configs/MPC8548CDS.h | 2 +-
include/configs/MPC8560ADS.h | 8 ++++----
6 files changed, 12 insertions(+), 13 deletions(-)
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This patch disables MPC8548CDS 2T_TIMING for DDR by default.
Signed-off-by:Ebony Zhu <[email protected]>
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Enable PCI function and add PEX & rapidio memory map on MPC8548CDS
board.
Signed-off-by: Roy Zang <[email protected]>
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Signed-off-by: Scott Wood <[email protected]>
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Signed-off-by: Stefan Roese <[email protected]>
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Signed-off-by: Detlev Zundel <[email protected]>
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G2 core reference manual says decrementer and time base
are decreasing/increasing once every 4 bus clock cycles.
Lets fix it, so time in Linux won't run twice as fast
Signed-off-by: Domen Puncer <[email protected]>
Acked-by: Grant Likely <[email protected]>
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Previous versions used full wait states for the chip select #1 which
is connected to the Xilinix SystemACE controller on the AMCC Katmai
evaluation board. This leads to really slow access and therefore low
performance. This patch now sets up the chip select a lot faster
resulting in much better read/write performance of the Linux driver.
Signed-off-by: Stefan Roese <[email protected]>
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Set up the portmux for the MMC interface and enable the MMC driver
along with support for DOS partitions, ext2 and FAT filesystems.
Signed-off-by: Haavard Skinnemoen <[email protected]>
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Implement MACB initialization for AVR32 and ATSTK1000, and turn
everything on, including the MACB driver.
Signed-off-by: Haavard Skinnemoen <[email protected]>
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Include the imi, imls and jffs commands sets by default on ATSTK1000.
Also define CONFIG_BOOTARGS to something more useful, define
CONFIG_BOOTCOMMAND and enable autoboot by default.
Signed-off-by: Haavard Skinnemoen <[email protected]>
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Relocate the u-boot image into SDRAM like everyone else does. This
means that we can handle much larger .data and .bss than we used to.
Signed-off-by: Haavard Skinnemoen <[email protected]>
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Rewrite the resource management code (i.e. I/O memory, clock gating,
gpio) so it doesn't depend on any global state. This is necessary
because this code is heavily used before relocation to RAM, so we
can't write to any global variables.
As an added bonus, this makes u-boot's memory footprint a bit smaller,
although some functionality has been left out; all clocks are enabled
all the time, and there's no checking for gpio line conflicts.
Signed-off-by: Haavard Skinnemoen <[email protected]>
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* Make IDE timeout configurable through ide_reset_timeout variable.
* Use Newline as "password" string
* Use just a single partition in NAND flash
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With this new base address of the Xilinx SystemACE controller
the Linux driver will be easier to adapt, since it can now be
mapped via the "normal" ioremap() call.
Signed-off-by: Stefan Roese <[email protected]>
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Modifications to the existing code to support the new fdt command.
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With the updated 44x DDR2 driver the Yucca board now supports
ECC generation and checking.
Signed-off-by: Stefan Roese <[email protected]>
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Signed-off-by: Stefan Roese <[email protected]>
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Reset support
BSP autoconfig support
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Signed-off-by: Stefan Roese <[email protected]>
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This patch cleans up all the open issue of the preliminary
Acadia support.
Signed-off-by: Stefan Roese <[email protected]>
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Also fixes some commmand for 8641 HPCN ramboot case.
Signed-off-by: Jason Jin <[email protected]>
Signed-off-by: Jon Loeliger <[email protected]>
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Signed-off-by: Stefan Roese <[email protected]>
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This patch adds support for the new AMCC Acadia eval board.
Please note that this Acadia/405EZ support is still in a beta stage.
Still lot's of cleanup needed but we need a preliminary release now.
Signed-off-by: Stefan Roese <[email protected]>
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