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The kernel can now use DT to reserve memory carveouts and
these areas are now the default for drivers that need reserved
memory, so reserving more here is unneeded and any memory reserved
this way will be wasted.
Signed-off-by: Andrew F. Davis <[email protected]>
Reviewed-by: Lokesh Vutla <[email protected]>
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This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.
Signed-off-by: Yuan Yao <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Yuan Yao <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Yuan Yao <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Enable QSPI flash related configure options.
Signed-off-by: Yuan Yao <[email protected]>
Reviewed-by: York Sun <[email protected]>
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When QSPI is enabled, NOR flash and QIXIS can't be accessed
through IFC due to pin mux. Enable I2C QIXIS access and I2C
early init to read the sysclk and ddrclk.
Signed-off-by: Yuan Yao <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The NOR flash related configure options appear in ls2080aqds.h and
ls2080ardb.h, and the two files both includ ls2080a_common.h.
This patch remove the duplicated options in ls2080a_common.h.
Signed-off-by: Yuan Yao <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Since the SRAM C corruption issue is now resolved on Allwinner
A64, it is possible to move the stack top to the address 0x1A000
on both A64 and A80. The boot ROM can load SPL binaries with
up to 32 KiB size on A64 (the 24 KiB SPL size limitation only
affects A10/A20), and this patch also ensures the availability
of 8 KiB stack.
Signed-off-by: Siarhei Siamashka <[email protected]>
Acked-by: Hans de Goede <[email protected]>
Signed-off-by: Hans de Goede <[email protected]>
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In the draco CPU board family, etamin is a new variant
with bigger flash and more RAM. Due to new flash that
uses larger pages (4K) some changes are necessary because
it impacts the MTD partition layout and the ubi mount
parameters.
Signed-off-by: Samuel Egli <[email protected]>
Signed-off-by: Heiko Schocher <[email protected]>
[trini: Move BOOTDELAY into defconfig, just always be 3 now]
Signed-off-by: Tom Rini <[email protected]>
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From: Samuel Egli <[email protected]>
Signed-off-by: Heiko Schocher <[email protected]>
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U-Boot SPL 2016.03-rc3-00019-g6dfb4c2-dirty (Mar 09 2016 - 07:40:06)
SHC C3-Sample
MPU reference clock runs at 6 MHz
Setting MPU clock to 594 MHz
Enabling Spread Spectrum of 18 permille for MPU
Trying to boot from MMC
reading u-boot.img
reading u-boot.img
U-Boot 2016.03-rc3-00019-g6dfb4c2-dirty (Mar 09 2016 - 07:05:35 +0100)
Watchdog enabled
I2C: ready
DRAM: 512 MiB
reloc off 1f783000
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
Net: cpsw
U-Boot#
Signed-off-by: Heiko Schocher <[email protected]>
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move CONFIG_BOOTDELAY into a Kconfig option. Used for this
purpose the moveconfig.py tool in tools.
Signed-off-by: Heiko Schocher <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
Acked-by: Viresh Kumar <[email protected]>
Acked-by: Igor Grinberg <[email protected]>
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Unlike NAND, eMMC can be re-written without erasing.
Signed-off-by: Masahiro Yamada <[email protected]>
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The Boot ROM on PH1-LD11/LD20 exports built-in APIs to load images
from an eMMC device. They are useful to reduce the memory footprint
of SPL, rather than compiling the whole MMC framework.
Signed-off-by: Masahiro Yamada <[email protected]>
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This adds support for IS1 board. Pretty usual socfpga board,
256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two
additional ethernet ports connected to the FPGA.
Signed-off-by: Pavel Machek <[email protected]>
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Add missing ${partnum} to set rootdev correctly when
booting from USB or MMC.
Signed-off-by: Kimmo Surakka <[email protected]>
[Rebased against v2016.05 and adjusted the variable name]
Signed-off-by: Andrew Shadura <[email protected]>
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The SATA support is only useful for development and shouldn't be enabled
in production, so it has to be disabled in U-boot by default.
Signed-off-by: Andrew Shadura <[email protected]>
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The network support is only useful for development and shouldn't be enabled
in production, so it has to be disabled in U-boot by default.
Signed-off-by: Andrew Shadura <[email protected]>
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The USB support is only useful for development and shouldn't be enabled
in production, so it has to be disabled in U-boot by default.
Signed-off-by: Andrew Shadura <[email protected]>
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The kernel already knows how to initialise the display, and initialising
the display from U-boot is only useful for debugging and isn't necessary
in production, so no need to have it enabled in U-boot by default.
Signed-off-by: Andrew Shadura <[email protected]>
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Signed-off-by: Tom Rini <[email protected]>
Conflicts:
configs/peach-pi_defconfig
configs/peach-pit_defconfig
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Avoid use of hard coded mmcdev value, use bootpart
instead, so finduuid works based on bootpart set
for a specific platform.
Signed-off-by: Ravi Babu <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Now that all Keystone2 dts file names are changed in Linux kernel, reflect the
same in evn variables inorder to find the right dtb file.
Signed-off-by: Lokesh Vutla <[email protected]>
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There is new strider cpu flavor with DisplayPort video.
Signed-off-by: Dirk Eibach <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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There is a new strider console flavor with DisplayPort
video.
Signed-off-by: Dirk Eibach <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Modified:
configs/ls1012afrdm_qspi_defconfig
configs/ls1012aqds_qspi_defconfig
configs/ls1012ardb_qspi_defconfig
include/configs/ls1012afrdm.h
include/configs/ls1012aqds.h
include/configs/ls1012ardb.h
Signed-off-by: Tom Rini <[email protected]>
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Nand and QSPI are not defined now but this will be extended.
Based on selected bootmode boot_targets are rewritten.
Patch also contains detection if variables are saved. If yes don't
rewrite boot_targets variable.
Also move variable setup to the end of file because SCSI needs to be
defined before others macros are using it.
Signed-off-by: Michal Simek <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
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When the CONFIG_BOOTP_SERVERIP option is set, we ignore all
dhcp values for the tftp server and use our own serverip and
file name instead.
This is usually not what we want and I doubt it's set for a
good reason on ZynqMP. It definitely hurts if we want to support
uEFI PXE boot on it. So just remove the option for now.
Signed-off-by: Alexander Graf <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Simplify zcu102 board file by moving CONFIG_AHCI enabling to common
file.
Signed-off-by: Michal Simek <[email protected]>
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zc1751-dc4 contains four GEMs.
Signed-off-by: Michal Simek <[email protected]>
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Phys are available on zc1751-dc4 that's why enable them.
Signed-off-by: Michal Simek <[email protected]>
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Simplify board file by enabling CMD_NAND via Kconfig.
Signed-off-by: Michal Simek <[email protected]>
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Create an entry for "config USB_XHCI_DWC3" in Kconfig and
switch over to it for all boards.
Signed-off-by: Masahiro Yamada <[email protected]>
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Move CONFIG_USB_XHCI to defconfig files for all boards, renaming it
into CONFIG_USB_XHCI_HCD.
As commented in the help of "config USB_XHCI" entry, this has been
a TODO for a long time; now CONFIG_USB_XHCI_HCD and CONFIG_USB_XHCI
have been unified in favor of the former.
Note:
Some boards define CONFIG_USB_XHCI in their headers without
CONFIG_USB, which does not meet the "depends on" in Kconfig.
I added CONFIG_USB=y for those boards when converting.
Otherwise, they would fail to build.
Signed-off-by: Masahiro Yamada <[email protected]>
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These Blackfin boards are the last ones that define CONFIG_USB in
their headers.
Signed-off-by: Masahiro Yamada <[email protected]>
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QorIQ LS1012A FREEDOM (LS1012AFRDM) is a high-performance
development platform, with a complete debugging environment.
The LS1012AFRDM board supports the QorIQ LS1012A processor and is
optimized to support the high-bandwidth DDR3L memory and
a full complement of high-speed SerDes ports.
Signed-off-by: Shengzhou Liu <[email protected]>
Signed-off-by: Calvin Johnson <[email protected]>
Signed-off-by: Pratiyush Mohan Srivastava <[email protected]>
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
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QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance
development platform, with a complete debugging environment.
The LS1012ARDB board supports the QorIQ LS1012A processor and is
optimized to support the high-bandwidth DDR3L memory and
a full complement of high-speed SerDes ports.
Signed-off-by: Calvin Johnson <[email protected]>
Signed-off-by: Pratiyush Mohan Srivastava <[email protected]>
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
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QorIQ LS1012A Development System (LS1012AQDS) is a high-performance
development platform, with a complete debugging environment.
The LS1012AQDS board supports the QorIQ LS1012A processor and is
optimized to support the high-bandwidth DDR3L memory and
a full complement of high-speed SerDes ports.
Signed-off-by: Calvin Johnson <[email protected]>
Signed-off-by: Pratiyush Mohan Srivastava <[email protected]>
Signed-off-by: Abhimanyu Saini <[email protected]>
Signed-off-by: Prabhakar Kushwaha <[email protected]>
Reviewed-by: York Sun <[email protected]>
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This fixes the last remaining libgcc warning, where the symbol was
defined twice.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Tom Rini <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Before this patch, when booting from MMC (no filesystem), the SPL
loaded U-Boot from a fixed offset.
It will now load U-Boot from an offset of 256kB (which is 4 times the
padded SPL image) in the third partition.
This behaviour is similar to what the vendor SPL (based on
U-Boot 2013.01) does, and allows to directly 'dd' the
u-boot-with-spl.sfp file to the A2 partition.
Signed-off-by: Sylvain Lesne <[email protected]>
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Somehow the sr1500 is missing this comma in the CONFIG_BOOTARGS
definition. This patch adds it to.
Signed-off-by: Stefan Roese <[email protected]>
Reported-by: Pavel Machek <[email protected]>
Cc: Pavel Machek <[email protected]>
Cc: Marek Vasut <[email protected]>
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Enable both features to reduce the SPL size by 6 kiB.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Pavel Machek <[email protected]>
Cc: Stefan Roese <[email protected]>
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Add support for board based on the popular Altera Cyclone V SoC.
This board has the following properties:
- 1 GiB of DRAM
- 1 Gigabit ethernet
- 1 USB gadget port
- 1 USB host port with an on-board hub
- 2 QSPI NORs connected to the Cadence QSPI core
- Multiple I2C EEPROMs and one I2C temperature sensor
Signed-off-by: Marek Vasut <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Chin Liang See <[email protected]>
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V2: Update the defconfig as per Tom's request
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P2771-0000 is a P3310 CPU board married to a P2597 I/O board. The
combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB micro-B
port, Ethernet, USB3 host port, SATA, PCIe, and two GPIO expansion
headers.
Currently, due to U-Boot's level of support for Tegra186, the only
features supported by U-Boot are the console UART and the on-board eMMC.
Additional features will be added over time.
U-Boot has so far been tested by replacing the kernel image on the device
with a U-Boot binary. It is anticipated that U-Boot will eventually
replace the CCPLEX bootloader binary, as on previous chips. This hasn't
yet been tested.
Signed-off-by: Stephen Warren <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Tom Warren <[email protected]>
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