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This target is ARMv7-M therefore can only build for Thumb,
but it did not #define CONFIG_SYS_THUMB_BUILD, so the U-Boot
code did not know it had to build for Thumb(2), not ARM.
This patch is binary-invariant: builds of stm32f429-discovery
with and without this patch were compared and found to differ
only by their U-Boot version strings.
Signed-off-by: Albert ARIBAUD <[email protected]>
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Trim CONFIG_SYS_MEMTEST_END location.
CONFIG_SYS_MONITOR_LEN
Reserving 256k for U-Boot at: d7fc0000
CONFIG_ENV_SIZE
CONFIG_SYS_MALLOC_LEN
Reserving 256k for malloc() at: d7f80000
0x10000 for the rest
Reserving 68 Bytes for Board Info at: d7f7ffbc
Reserving 208 Bytes for Global Data at: d7f7feec
Reserving 12000 Bytes for FDT at: d7f7d00c
Stack
Signed-off-by: Thomas Chou <[email protected]>
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Trim CONFIG_SYS_MALLOC_LEN size, because CONFIG_ENV_SIZE
is included to total memory allocation in common.h,
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Chin Liang See <[email protected]>
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Remove CONFIG_SYS_INIT_SP macro, as the initial stack is set to
below the u-boot code.
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Marek Vasut <[email protected]>
Reviewed-by: Chin Liang See <[email protected]>
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Remove CONFIG_SYS_MALLOC_BASE macro, as it is not used by
the generic board.
Signed-off-by: Thomas Chou <[email protected]>
Reviewed-by: Chin Liang See <[email protected]>
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Clean up macros that do not need a value as suggested by
Marek.
Signed-off-by: Thomas Chou <[email protected]>
Tested-by: Marek Vasut <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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Use dram bank in board info, so that it displays correct
memory values in bdinfo command.
Signed-off-by: Thomas Chou <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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This board runs a P5020 or P5040 chip, and utilizes
an EEPROM with similar formatting to the Freescale P5020DS.
Large amounts of this code were developed by
Adrian Cox <adrian at humboldt dot co dot uk>
Signed-off-by: Andy Fleming <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Update this driver to use driver model and change all users.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Production boards should not use CONFIG_OF_EMBED. Fix this for the Zybo
boards.
The image to use now becomes u-boot-dtb.bin.
For example, the .bif file should contain a line like:
[load = 0x04000000,startup=0x04000000]/path/to/u-boot-dtb.bin
instead of:
[load = 0x04000000,startup=0x04000000]/path/to/u-boot.bin
When device tree is enabled we need to load u-boot-dtb.img. Change the
settings so that SPL does the right thing.
Signed-off-by: Simon Glass <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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Enable CONFIG_SYS_I2C_ZYNQ only if it has either I2C0 or I2C1
enabled in a board config.This fixes the issue of i2c error
during board init if board specific doesnt have either I2C0
or I2C1.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
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This adds support to update firmware on qspi flash using DFU.
On device:
=> setenv dfu_alt_info ${dfu_alt_info_qspi}
=> dfu 0 sf 0:0
On host:
$ sudo dfu-util -l
$ sudo dfu-util -D MLO -a MLO
$ sudo dfu-util -D u-boot.img -a u-boot.img
Signed-off-by: Vignesh R <[email protected]>
Reviewed-by: Tom Rini <[email protected]>
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Signed-off-by: Daniel Gorsulowski <[email protected]>
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On T1040D4RDB board, u-boot fails to connect port FM1@DTSEC3 to
the Ethernet PHY because the wrong PHY address is used. Also,
T1040D4RDB supports SGMII on one port only.
Signed-off-by: Codrin Ciubotariu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Yangbo Lu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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This commit adds additional file with implementation of board
detection code for Odroid-XU3/XU4.
The detection depends on compatible found in fdt:
- "samsung,exynos5" - uses Exynos5 generic code
- "samsung,odroidxu3" - try detect XU3 revision
There are few revisions of Odroid XU3/XU4, each can be detected
by checking the value of channel 9 of built-in ADC:
Rev ADC Board
0.1 0 XU3 0.1
0.2 372 XU3 0.2 | XU3L - no DISPLAYPORT
0.3 1280 XU4 0.1
The detection code depends on the ADC+10% value.
Implementation of functions:
- set_board_type() - read ADC and set type
- get_board_rev() - returns board revision: 1..3
- get_board_type() - returns board type string
Additional functions with return values of bool:
- board_is_generic() - true if found compatible "samsung,exynos5"
but not "samsung,odroidxu3"
- board_is_odroidxu3() - true if found compatible "samsung,odroidxu3"
and one of XU3 revision.
- board_is_odroidxu4() - true if found compatible "samsung,odroidxu3"
and XU4 revision.
After I2C controller init, the get_board_type() can check
if the XU3 board is a "Lite" variant, by probing chip
0x40 on I2C0 (INA231 - exists only on non-lite).
This is useful for setting fdt file name at misc_init_r().
Enabled configs:
- CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- CONFIG_ODROID_REV_AIN
- CONFIG_REVISION_TAG
- CONFIG_BOARD_TYPES
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Simon Glass <[email protected]>
Tested-by: Anand Moon <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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As sama5 board has 32k sram size, so the at91bootstrap and spl for sama5
boards is bigger than 16k (0x4000). That will overlap the U-Boot
environment. So I move environment to 0x6000. And reduce its size as
well.
Following shows the size of the spl binaries (v2015.04 vs v2015.07):
% ls v2015.04/*spi*spl.bin -l | awk '{print $5,$(NF)}'
15540 v2015.04/at91sam9n12ek_spiflash_defconfig_u-boot-spl.bin
15704 v2015.04/at91sam9x5ek_spiflash_defconfig_u-boot-spl.bin
16064 v2015.04/sama5d3xek_spiflash_defconfig_u-boot-spl.bin
16304 v2015.04/sama5d4ek_spiflash_defconfig_u-boot-spl.bin
16304 v2015.04/sama5d4_xplained_spiflash_defconfig_u-boot-spl.bin
% ls v2015.07/*spi*spl.bin -l | awk '{print $5,$(NF)}'
16136 v2015.07/at91sam9n12ek_spiflash_defconfig_u-boot-spl.bin
16300 v2015.07/at91sam9x5ek_spiflash_defconfig_u-boot-spl.bin
16664 v2015.07/sama5d3xek_spiflash_defconfig_u-boot-spl.bin
16904 v2015.07/sama5d4ek_spiflash_defconfig_u-boot-spl.bin
16904 v2015.07/sama5d4_xplained_spiflash_defconfig_u-boot-spl.bin
The gcc version is: gcc 4.7.3 (Ubuntu/Linaro 4.7.3-12ubuntu1)
Signed-off-by: Josh Wu <[email protected]>
Reviewed-by: Andreas Bießmann <[email protected]>
Acked-by: Bo Shen <[email protected]>
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As more features are added for SD boot on LS1021A QDS board,
the size of U-Boot is larger. CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS
needs to be adjusted to a suitable value.
Starting address of the malloc pool used in SPL needs to be
adjusted too, or it will occupy the address u-boot loads.
Signed-off-by: Alison Wang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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I2C1 can work on ls102xa rev2.0 SD boot, so add
ID EEPROM for SD boot.
Signed-off-by: Yuan Yao <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Add secure boot support for mx7dsabresd target board
Signed-off-by: Adrian Alonso <[email protected]>
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Rework unified section macro select via Kconfig option
instead of macro definition in mx7_common header file.
Signed-off-by: Adrian Alonso <[email protected]>
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Add i.MX6DQP-Sabresd board support:
1. set fdt_file according to board_rev which is set at runtime.
2. Add mx6dqp_ddr_ioregs and calibration value for this board.
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Fabio Estevam <[email protected]>
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This macro is not needed, since gd->ram_size is assigned value using
function imx_ddr_size().
Signed-off-by: Peng Fan <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Fabio Estevam <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
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add FIT image support for the flea3 board.
Signed-off-by: Heiko Schocher <[email protected]>
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Linux only boots IMX.51-based boards with device tree, so this board
would benefit from supporting it.
Signed-off-by: Damien Riegel <[email protected]>
Cc: Stefano Babic <[email protected]>
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As 3G/1G user/kernel memory split is used on LS1021A, the Linux kernel
fails to access the device tree blob on boot. The reason is that u-boot
relocates the device tree blob into high memory when booting the kernel
and the kernel is unable to access the blob.
To avoid this issue, fdt_high is set to the value of 0xffffffff. The
device tree blob will not get relocated and is still in low memory to
make it accessible to the kernel.
For the same reason, initrd_high is set to the value of 0xffffffff too.
Signed-off-by: Alison Wang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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After the secondary cores enter U-Boot, use CONFIG_ARMV8_MULTIENTRY to
make secondary cores excute in spin loop.
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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This patch adds esdhc support for ls1043ardb.
Signed-off-by: Yangbo Lu <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Signed-off-by: Gong Qianyu <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Shaohui Xie <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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LS1043ARDB Specification:
-------------------------
Memory subsystem:
* 2GByte DDR4 SDRAM (32bit bus)
* 128 Mbyte NOR flash single-chip memory
* 512 Mbyte NAND flash
* 16 Mbyte high-speed SPI flash
* SD connector to interface with the SD memory card
Ethernet:
* XFI 10G port
* QSGMII with 4x 1G ports
* Two RGMII ports
PCIe:
* PCIe2 (Lanes C) to mini-PCIe slot
* PCIe3 (Lanes D) to PCIe slot
USB 3.0: two super speed USB 3.0 type A ports
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Li Yang <[email protected]>
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: York Sun <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
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There are two LS series processors are built on ARMv8 Layersacpe
architecture currently, LS2085A and LS1043A. They are based on
ARMv8 core although use different chassis, so create fsl-layerscape
to refactor the common code for the LS series processors which also
paves the way for adding LS1043A platform.
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Config Security Level Register is different between different SoCs,
so put the CSL register definition into the arch specific directory.
Signed-off-by: Mingkai Hu <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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For most PPC platforms, they will call the first get_clocks() in
init_sequence_f[] as they define CONFIG_PPC. CONFIG_SYS_FSL_CLK is
then defined to call the second get_clocks(), which should be
redundant for PPC.
Signed-off-by: Gong Qianyu <[email protected]>
Reviewed-by: York Sun <[email protected]>
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To support on board Aquantia's PHY AQR405.
Signed-off-by: Shaohui Xie <[email protected]>
Reviewed-by: York Sun <[email protected]>
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This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: Stefan Roese <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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This board has not compiled for me for quite some time due to size
constraints, remove.
Cc: John Otken <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Signed-off-by: Stefan Roese <[email protected]>
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As QSPI and IFC are pin-multiplexed on LS1021A, only IFC is supported in
SD boot now. For the customer's demand, QSPI needs to be supported in SD
boot too.
This patch adds QSPI or IFC support in SD boot according to the
corresponding defconfig. For detail, ls1021atwr_sdcard_ifc_defconfig is
used to support IFC in SD boot and ls1021atwr_sdcard_qspi_defconfig is
used to support QSPI in SD boot.
Signed-off-by: Alison Wang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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The address of uboot changed, so change qe ucode
Signed-off-by: Zhao Qiang <[email protected]>
Reviewed-by: York Sun <[email protected]>
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This will allow OF-based earlycon to be used once the appropriate
aliases are added to the device tree and kernel support is fixed.
Signed-off-by: Scott Wood <[email protected]>
Reviewed-by: York Sun <[email protected]>
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Define CONFIG_SYS_SPI_ARGS_OFFS, CONFIG_SYS_SPI_ARGS_SIZE
and CONFIG_SYS_SPI_KERNEL_OFFS which will be used in SPL
spi mode. These macros defines the device tree offset, size
and the kernel image offset in flash respectively.
Signed-off-by: Siva Durga Prasad Paladugu <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
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