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Since MX6 is Cortex-A9 r2p10, enable software workaround
for errata 794072 and 761320.
Signed-off-by: Nitin Garg <[email protected]>
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Clock Manager driver will be called to reconfigure all the
clocks setting based on user input. The input are passed to
Preloader through handoff files
Signed-off-by: Chin Liang See <[email protected]>
Cc: Albert Aribaud <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Wolfgang Denk <[email protected]>
CC: Pavel Machek <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Acked-by: Pavel Machek <[email protected]>
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Conflicts:
arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
Signed-off-by: Stefano Babic <[email protected]>
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This change enables automatically uuid generation by command gpt.
In case of updating partitions layout user don't need to care about
generate uuid manually.
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Minkyu Kang <[email protected]>
Cc: Piotr Wilczek <[email protected]>
Cc: Stephen Warren <[email protected]>
Cc: Lukasz Majewski <[email protected]>
Cc: [email protected]
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The u-boot's image TEXT_BASE needs to be changed to 0x43e00000 from 0x78100000.
This change provides compatibility with other trats2 (RD_PQ) devices
(http://download.tizen.org/releases/system/).
Signed-off-by: Lukasz Majewski <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Signed-off-by: Stefano Babic <[email protected]>
CC: Fabio Estevam <[email protected]>
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The DRAM size can be easily detected at runtime on i.MX53. Implement
such detection on M53EVK and adjust the rest of the macros accordingly
to use the detected values.
An important thing to note here is that we had to override the function
for trimming the effective DRAM address, get_effective_memsize(). That
is because the function uses CONFIG_MAX_MEM_MAPPED as the upper bound of
the available DRAM and we don't have gd->bd->bi_dram[0].size set up at
the time the function is called, thus we cannot put this into the macro
CONFIG_MAX_MEM_MAPPED . Instead, we use custom override where we use the
size of the first DRAM block which we just detected.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
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Fix memory access slowness on i.MX53 M53EVK board. Let us inspect the
issue: First of all, the i.MX53 CPU has two memory banks mapped at
0x7000_0000 and 0xb000_0000 and each of those can hold up to 1GiB of
DRAM memory. Notice that the memory area is not continuous. On M53EVK,
each of the banks contain 512MiB of DRAM, which makes a total of 1GiB
of memory available to the system.
The problem is how the relocation of U-Boot is treated on i.MX53 . The
U-Boot is placed at the ((start of first DRAM partition) + (gd->ram_size)) .
This in turn poses a problem, since in our case, the gd->ram_size is 1GiB,
the first DRAM bank starts at 0x7000_0000 and contains 512MiB of memory.
Thus, with this algorithm, U-Boot is placed at offset:
0x7000_0000 + 1GiB - sizeof(u-boot and some small margin)
This is past the DRAM available in the first bank on M53EVK, but is still
within the address range of the first DRAM bank. Because of the memory
wrap-around, the data can still be read and written to this area, but the
access is much slower.
There were two ideas how to solve this problem, first was to map both of
the available DRAM chunks next to one another by using MMU, second was to
define CONFIG_VERY_BIG_RAM and CONFIG_MAX_MEM_MAPPED to size of the memory
in the first DRAM bank. We choose the later because it turns out the former
is not applicable afterall. The former cannot be used in case Linux kernel
was loaded into the second DRAM bank area, which would be remapped and one
would try booting the kernel, since at some point before the kernel is started,
the MMU would be turned off, which would destroy the mapping and hang the
system.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
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The DRAM size can be easily detected at runtime on i.MX53. Implement
such detection on MX53QSB and adjust the rest of the macros accordingly
to use the detected values.
An important thing to note here is that we had to override the function
for trimming the effective DRAM address, get_effective_memsize(). That
is because the function uses CONFIG_MAX_MEM_MAPPED as the upper bound of
the available DRAM and we don't have gd->bd->bi_dram[0].size set up at
the time the function is called, thus we cannot put this into the macro
CONFIG_MAX_MEM_MAPPED . Instead, we use custom override where we use the
size of the first DRAM block which we just detected.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
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Fix memory access slowness on i.MX53 MX53QSB board. Let us inspect the
issue: First of all, the i.MX53 CPU has two memory banks mapped at
0x7000_0000 and 0xb000_0000 and each of those can hold up to 1GiB of
DRAM memory. Notice that the memory area is not continuous. On MX53QSB,
each of the banks contain 512MiB of DRAM, which makes a total of 1GiB
of memory available to the system.
The problem is how the relocation of U-Boot is treated on i.MX53 . The
U-Boot is placed at the ((start of first DRAM partition) + (gd->ram_size)) .
This in turn poses a problem, since in our case, the gd->ram_size is 1GiB,
the first DRAM bank starts at 0x7000_0000 and contains 512MiB of memory.
Thus, with this algorithm, U-Boot is placed at offset:
0x7000_0000 + 1GiB - sizeof(u-boot and some small margin)
This is past the DRAM available in the first bank on MX53QSB, but is still
within the address range of the first DRAM bank. Because of the memory
wrap-around, the data can still be read and written to this area, but the
access is much slower.
There were two ideas how to solve this problem, first was to map both of
the available DRAM chunks next to one another by using MMU, second was to
define CONFIG_VERY_BIG_RAM and CONFIG_MAX_MEM_MAPPED to size of the memory
in the first DRAM bank. We choose the later because it turns out the former
is not applicable afterall. The former cannot be used in case Linux kernel
was loaded into the second DRAM bank area, which would be remapped and one
would try booting the kernel, since at some point before the kernel is started,
the MMU would be turned off, which would destroy the mapping and hang the
system.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Wolfgang Denk <[email protected]>
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Add support for PCIe on MX6 SabreSDP board and enable the support
in the config file.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Liu Ying <[email protected]>
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Use of PCIe on SABRE Lite and Nitrogen6x boards
is atypical and requires the use of custom daughter
boards.
Use in U-Boot is even rarer, so this patch removes it from
the standard configuration.
Signed-off-by: Eric Nelson <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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CONFIG_BOOT_INTERNAL is not used anywhere, so let's remove it.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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Add yet another OCOTP driver for this i.MX family. This time, it's a driver for
the OCOTP variant found in the i.MX23 and i.MX28. This version of OCOTP is too
different from the i.MX6 one that I could not use the mxc_ocotp.c driver without
making it into a big pile of #ifdef . This driver implements the regular fuse
command interface, but due to the IP blocks' limitation, we support only READ
and PROG functions.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
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When using HAB, there are additional special requirements on the placement of
U-Boot and the U-Boot SPL in memory. To fullfill these, this patch moves the
U-Boot binary a little further from the begining of the DRAM, so the HAB CST
and IVT can be placed in front of the U-Boot binary. This is necessary, since
both the U-Boot and the IVT must be contained in single CST signature. To
make things worse, the IVT must be concatenated with one more entry at it's
end, that is the length of the entire CST signature, IVT and U-Boot binary
in memory. By placing the blocks in this order -- CST, IVT, U-Boot, we can
easily align them all and then produce the length field as needed.
As for the SPL, on i.MX23/i.MX28, the SPL size is limited to 32 KiB, thus
we place the IVT at 0x8000 offset, CST right past IVT and claim the size
is correct. The HAB library accepts this setup.
Finally, to make sure the vectoring in SPL still works even after moving
the SPL from 0x0 to 0x1000, we add a small function which copies the
vectoring code and tables to 0x0. This is fine, since the vectoring code
is position independent.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Stefano Babic <[email protected]>
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Since RTC-Clock is needed on all B&R boards, the OSC will be enabled
wihtin SPL-stage.
Signed-off-by: Hannes Petermaier <[email protected]>
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On the boards this target supports this option is either non possible
without hardware mods (Beaglebone White/Black) or not supported due to
board design. Drop this and regain some space.
Signed-off-by: Tom Rini <[email protected]>
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This allows to use exynos random number generator by enabling configs:
- CONFIG_EXYNOS_ACE_SHA
- CONFIG_LIB_HW_RAND
Signed-off-by: Przemyslaw Marczak <[email protected]>
Acked-by: Lukasz Majewski <[email protected]>
cc: Piotr Wilczek <[email protected]>
cc: Minkyu Kang <[email protected]>
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New configs:
- CONFIG_LIB_RAND - to enable implementation of rand library in lib/rand.c
- CONFIG_LIB_HW_RAND - to enable hardware based implementations of lib rand
Other changes:
- add CONFIG_LIB_RAND to boards configs which needs rand()
- put only one rand.o dependency in lib/Makefile
CONFIG_LIB_HW_RAND should be defined for drivers which implements rand library
(declared in include/common.h):
- void srand(unsigned int seed)
- unsigned int rand(void)
- unsigned int rand_r(unsigned int *seedp)
Signed-off-by: Przemyslaw Marczak <[email protected]>
Cc: Michael Walle <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Masahiro Yamada <[email protected]>
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Trivial merge conflict, needed to manually remove
local_info as per commit 41364f0f.
Conflicts:
board/samsung/common/board.c
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as the siemens boards use dfu for updating a nand ubi partition
add DFU_MANIFEST_POLL_TIMEOUT to them, so dfu host waits after
complete transfer of the new image for DFU_MANIFEST_POLL_TIMEOUT
ms before sending again an usb request. So the board have enough
time to erase rest of the nand sectors.
Signed-off-by: Heiko Schocher <[email protected]>
Reviewed-by: Lukasz Majewski <[email protected]>
Cc: Kyungmin Park <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Tom Rini <[email protected]>
Cc: Pantelis Antoniou <[email protected]>
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As Simon Glass requested it, here's a patch that enables
CONFIG_CMD_LZMADEC in sandbox.
Signed-off-by: Patrice Bouchand <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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CONFIG_LEON is already defined in
arch/sparc/cpu/{leon2,leon3}/config.mk.
Remove the redundant definition in board header files.
All leon3 boards define CONFIG_LEON3 in board header files.
Move the definition to arch/sparc/cpu/leon3/config.mk.
CONFIG_LEON2 can be move to arch/sparc/cpu/leon2/config.mk
as well.
Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Daniel Hellstrom <[email protected]>
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Enable the Chrome OS EC emulation for sandbox along with LCD, sound
expanded GPIOs and a few other options to make this work correctly.
Reviewed-by: Simon Glass <[email protected]>
Tested-by: Che-Liang Chiou <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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The i2s code is in fact Samsung-specific, but there might be other
implementation. Move this code into its own file. This makes it slightly
more obviously how to adjust the code to support another SoC, when someone
takes this task on.
Also drop non-FDT support, since it isn't used on Exynos 5.
Tested-by: Che-Liang Chiou <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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The current 4MB size is a little small for some tests, so increase it.
Reviewed-by: Hung-ying Tyan <[email protected]>
Signed-off-by: Simon Glass <[email protected]>
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Changes:
- update partitions layout
- update dfu entities
to be consistent with Tizen images for trats/trats2
Signed-off-by: Przemyslaw Marczak <[email protected]>
Acked-by: Łukasz Majewski <[email protected]>
cc: Piotr Wilczek <[email protected]>
cc: Minkyu Kang <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Pull out "$(SRCTREE)/" from CONFIG_SYS_KWD_CONFIG
and push it into the top Makefile.
Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Michael Walle <[email protected]>
Cc: Simon Guinot <[email protected]>
Cc: Dave Purdy <[email protected]>
Cc: Stefan Herbrechtsmeier <[email protected]>
Cc: Luka Perkov <[email protected]>
Cc: Valentin Longchamp <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Siddarth Gore <[email protected]>
Cc: Prafulla Wadaskar <[email protected]>
Cc: Eric Cooper <[email protected]>
Cc: Suriyan Ramasami <[email protected]>
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Pull out "$(SRCTREE)/" from CONFIG_SYS_FSL_PBL_PBI
and CONFIG_SYS_FSL_PBL_RCW and push it into the top Makefile.
Signed-off-by: Masahiro Yamada <[email protected]>
Cc: York Sun <[email protected]>
Cc: Poonam Aggrwal <[email protected]>
Cc: Valentin Longchamp <[email protected]>
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enabling CONFIG_MACB makes other locations in the stamp config file
enable network related commands (actually prevents disabling them)
enable USB ethernet support by activating generic support as well as
Asix and Moschip ethernet adapters
Signed-off-by: Gerhard Sittig <[email protected]>
Acked-by: Andreas Bießman <[email protected]>
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enable support for the Moschip USB ethernet adapter for those boards
which previously had support for "all other" USB ethernet adapters
(that's Asix _and_ SMSC) enabled -- which applies to harmony, m53evk,
mx53loco, nitrogen6x, omap3_beagle
Signed-off-by: Gerhard Sittig <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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adjust the harmony and omap3_beagle board configs to make
their CONFIG_USB_ETHER_* items appear in alphabetical order
Signed-off-by: Gerhard Sittig <[email protected]>
Acked-by: Simon Glass <[email protected]>
Acked-by: Marek Vasut <[email protected]>
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Patch a7e36fc9 (mtd: nand: omap: remove unused #defines from common
omap_gpmc.h) removed some MTD related defines. Including
GPMC_NAND_ECC_LP_x8_LAYOUT. But this define is also needed for the
memory controller configuration (only the x8 defines are needed,
the x16 defines are the default). Without it the NAND subsystem is
not configured correctly and booting into U-Boot does not work.
Signed-off-by: Stefan Roese <[email protected]>
Cc: Pekon Gupta <[email protected]>
Cc: Nikita Kiryanov <[email protected]>
Cc: Igor Grinberg <[email protected]>
Cc: Tom Rini <[email protected]>
Acked-by: Igor Grinberg <[email protected]>
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When using the am335x_evm_nor target one is generally expecting to be
used in an environment when you want to program the NOR and not a
"deployment" type target. In addition this only supports the Beaglebone
White with the memory cape and NOR module installed, which precludes the
presence of SPI flash. Drop SPI as we were getting close to the binary
limit in some cases and slightly over with other toolchains.
Signed-off-by: Tom Rini <[email protected]>
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This patch enables to run Trats2 board on device tree.
Signed-off-by: Piotr Wilczek <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This patch enables to run Trats board on device tree.
Signed-off-by: Piotr Wilczek <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
CC: Lukasz Majewski <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This patch enables to run Universal board on device tree.
Signed-off-by: Piotr Wilczek <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Acked-by: Przemyslaw Marczak <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This patch enables to run Origen board on device tree.
Uart, DRAM and MMC init functions are removed as their
generic replacements form the common board file are used.
The config file is modified to contain only board specific options.
Signed-off-by: Piotr Wilczek <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Cc: Chander Kashyap <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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This patch adds common dtsi file and config header for all
Exynos 4 based boards.
Patch additionaly adds board specific (weak) functions for
board_early_init_f and board_power_init functions.
Signed-off-by: Piotr Wilczek <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Signed-off-by: Minkyu Kang <[email protected]>
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Allow the boot of a device tree mainline kernel by aligning the environment
variables with other FSL boards.
Tested NFS boot of a dt 3.14-rc5 kernel.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Otavio Salvador <[email protected]>
Acked-by: Stefano Babic <[email protected]>
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Gateworks Ventana is a product family based on the i.MX6. This
patch adds support for all boards in the Ventana family. Where
possible, data from the boards EEPROM is used to determine various
details about the board at runtime.
Signed-off-by: Tim Harvey <[email protected]>
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CONFIG_SYS_HZ must be always 1000, but M5271EVB.h defines it
as 1000000 and idmr.h defines it as (50000000 / 64).
When compiling these two boards, a warning message is displayed:
time.c:14:2: warning: #warning "CONFIG_SYS_HZ must be 1000
and should not be defined by platforms" [-Wcpp]
There are no board maintainers for them so this commit just
deletes them.
Signed-off-by: Masahiro Yamada <[email protected]>
Cc: Jason Jin <[email protected]>
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Add NAND SPL boot support with hardware PMECC.
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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Add SPI SPL boot support for sama5d3xek board.
Signed-off-by: Bo Shen <[email protected]>
Signed-off-by: Andreas Bießmann <[email protected]>
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Add sama5d3 Xplained board support which use Atmel SAMA5D36 SoC.
Now it supports boot from NAND flash and SD/MMC card.
Features support:
- NAND flash
- SD/MMC card
- Two USB hosts
- Ethernet (one GMAC, one EMAC)
Signed-off-by: Bo Shen <[email protected]>
[reorder boards.cfg]
Signed-off-by: Andreas Bießmann <[email protected]>
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