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2025-10-17clk: at91: remove default values for PMC_PLL_ACRManikandan Muralidharan
Remove default values for PMC PLL Analog Control Register(ACR) as the values are specific for each SoC and PLL, so load them from PLL characteristics structure Signed-off-by: Manikandan Muralidharan <[email protected]> Signed-off-by: Varshini Rajendran <[email protected]>
2020-09-22clk: at91: add pre-requisite headers for AT91 clock architectureClaudiu Beznea
Add pre-requisite headers for AT91 clock architecture. These are based on already present files on Linux and will be used by following commits for AT91 CCF clock drivers. Signed-off-by: Claudiu Beznea <[email protected]>
2019-07-19clk: sifive: Sync-up WRPLL library with upstream LinuxAnup Patel
Now that SiFive clock driver is merged in upstream Linux, we sync-up WRPLL library used by SiFive clock driver with upstream Linux sources. Signed-off-by: Anup Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-07-19clk: sifive: Factor-out PLL library as separate moduleAnup Patel
To match SiFive clock driver with latest Linux, we factor-out PLL library as separate module under drivers/clk/analogbits. Signed-off-by: Anup Patel <[email protected]> Reviewed-by: Bin Meng <[email protected]>