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In order to not rely on common.h providing a number of common includes,
cleanup what we include directly in order to be able to drop common.h
later.
Signed-off-by: Tom Rini <[email protected]>
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The kmtegr1 board is out of maintenance and can be removed. As it is the
only board in the tree using MPC8309 the support for this CPU is dropped
completely.
Signed-off-by: Holger Brunck <[email protected]>
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As no platforms override this value, set it for all mpc83xx platforms.
Cc: Mario Six <[email protected]>
Cc: Wolfgang Denk <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
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Update the comment here to refer to PCI_CONFIG_ADDRESS rather than
CONFIG_ADDRESS.
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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This board has not been converted to CONFIG_DM_PCI by the deadline and is
also missing conversion to CONFIG_DM. Remove it. As this is the last
ARCH_MPC8315 platform, remove that support as well.
Signed-off-by: Tom Rini <[email protected]>
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This macro is only used (tested for existence) in mpc83xx.c, which
unconditionally includes mpc83xx.h where it is unconditionally
defined. Removing it makes the remaining code easier to read.
Signed-off-by: Rasmus Villemoes <[email protected]>
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Replace CONFIG_MPC837x with a proper CONFIG_ARCH_MPC837X Kconfig option.
Signed-off-by: Mario Six <[email protected]>
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Replace CONFIG_MPC836* with proper CONFIG_ARCH_MPC836* Kconfig options.
Signed-off-by: Mario Six <[email protected]>
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Replace CONFIG_MPC834* with proper CONFIG_ARCH_MPC834* Kconfig options.
Signed-off-by: Mario Six <[email protected]>
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Replace CONFIG_MPC832* with proper CONFIG_ARCH_MPC832* Kconfig options.
Signed-off-by: Mario Six <[email protected]>
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Replace CONFIG_MPC833* with proper CONFIG_ARCH_MPC833* Kconfig options.
Signed-off-by: Mario Six <[email protected]>
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Replace CONFIG_MPC830* with proper CONFIG_ARCH_MPC830* Kconfig options.
Signed-off-by: Mario Six <[email protected]>
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Add a RAM driver for the MPC83xx architecture.
Reviewed-by: Simon Glass <[email protected]>
Signed-off-by: Mario Six <[email protected]>
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.
In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.
This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.
Signed-off-by: Tom Rini <[email protected]>
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Remove duplicated SDRAM_INTERVAL_BSTOPRE from mpc83xx.h,
which has been defined in fsl_ddr_sdram.h
Signed-off-by: Shengzhou Liu <[email protected]>
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Signed-off-by: Wolfgang Denk <[email protected]>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <[email protected]>
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This processor, though very similar to other members of the
PowerQUICC II Pro family (namely 8308, 8360 and 832x), provides
yet another feature set than any supported sibling.
Signed-off-by: Gerlando Falauto <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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Introduce a new configuration token CONFIG_MPC830x to be shared among
mpc8308 and mpc8309. Define it for existing 8308 boards, and refactor
existing common code so to make future introduction of 8309 simpler.
Signed-off-by: Gerlando Falauto <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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Signed-off-by: Joe Hershberger <[email protected]>
Cc: Joe Hershberger <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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Signed-off-by: Heiko Schocher <[email protected]>
Added its mask, too, for intra-file consistency.
Signed-off-by: Kim Phillips <[email protected]>
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Signed-off-by: Heiko Schocher <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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Signed-off-by: Andre Schwarz <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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Use SPMR instead of HRCWL when calculating clocks as HCRWL
may be changed and the CPU will not pick up all changes
until there is a POR. u-boot will think SPMF has changed and get
the clocks wrong.
Signed-off-by: Joakim Tjernlund <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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This change lays the groundwork for the BOOTFLAG_* flags being removed.
This change has the small affect of delaying 100ms on PCI initialization
after a warm boot as opposed to the optimal 1ms on some boards.
Signed-off-by: Peter Tyser <[email protected]>
included the mpc8308_p1m board.
Signed-off-by: Kim Phillips <[email protected]>
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This patch adds defines to set supported fields in System I/O
Configuration Registers High and Low on Freescale MPC8308 CPU.
Signed-off-by: Ilya Yanok <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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This patch adds basic support for Freescale MPC8308 CPU. Serial ports,
NOR flash and integrated Ethernet controllers are supported.
PCI Express is also supported. eSDHC, NAND and USB may work but aren't
tested (using ULPI PHY requires additional patch).
Signed-off-by: Ilya Yanok <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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This patch changed the SICRL_USBDR define to reflect the 4 different bit
settings for this two-bit field. The four different options are '00', '01',
'10', and '11'. This patch also corrects the config file for SIMPC8313 and
MPC8313ERDB for the appropriate fields. This change only affects the MPC8313
cpu.
Signed-off-by: Ron Madrid <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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Signed-off-by: Heiko Schocher <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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Signed-off-by: Peter Tyser <[email protected]>
Reviewed-by: Ira W. Snyder <[email protected]>
Tested-by: Ira W. Snyder <[email protected]>
Acked-by: Kim Phillips <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
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Use the standard lowercase "x" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors
Signed-off-by: Peter Tyser <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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Signed-off-by: Heiko Schocher <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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Signed-off-by: Andy Fleming <[email protected]>
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This patch adds support for MPC83xx PCI-E controllers in Root Complex
mode.
The patch is based on Tony Li and Dave Liu work[1].
Though unlike the original patch, by default we don't register PCI-E
buses for use in U-Boot, we only configure the controllers for future
use in other OSes (Linux). This is done because we don't have enough
of spare BATs to map all the PCI-E regions.
To actually use PCI-E in U-Boot, users should explicitly define
CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And
only then U-Boot will able to access PCI-E, but at the cost of disabled
address translation.
[1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html
Signed-off-by: Tony Li <[email protected]>
Signed-off-by: Anton Vorontsov <[email protected]>
Acked-by: Dave Liu <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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When running a system with 2 or more MPC8349EMDS boards in PCI agent mode,
the boards will lock up the PCI bus by scanning against each other.
The boards lock against each other by trying to access the PCI bus before
clearing their configuration lock bit. Both boards end up in a loop,
sending and receiving "Target Not Ready" messages forever.
When running in PCI agent mode, the scanning now takes place after the
boards have cleared their configuration lock bit.
Also, add a missing declaration to the mpc83xx.h header file, fixing a
build warning.
Signed-off-by: Ira W. Snyder <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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Signed-off-by: Heiko Schocher <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
85xx can share them.
Signed-off-by: Jason Jin <[email protected]>
Signed-off-by: Haiying Wang <[email protected]>
Signed-off-by: Scott Wood <[email protected]>
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We'll use these masks to parse TSEC modes out of HRCWH.
Signed-off-by: Anton Vorontsov <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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Fixed typo from CONIFG_MPC837X to CONFIG_MPC837X
Signed-off-by: Nobuhiro Iwamatsu <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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devices
This patch adds elements to the 83xx sysconf structure and #define values that are used
by mpc83xx family devices.
Signed-off-by: Nick Spence <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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Note that with older board revisions, NAND boot may only work after a
power-on reset, and not after a warm reset. I don't have a newer board
to test on; if you have a board with a 33MHz crystal, please let me know
if it works after a warm reset.
Signed-off-by: Scott Wood <[email protected]>
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Delete the crypto node if not on an E-processor. If on 8360 or 834x family,
check rev and up-rev crypto node (to SEC rev. 2.4 property values)
if on an 'EA' processor, e.g. MPC8349EA.
Signed-off-by: Kim Phillips <[email protected]>
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This patch moves Freescale Localbus defines out of mpc83xx.h, so we could
use it on MPC85xx and MPC86xx processors.
Signed-off-by: Anton Vorontsov <[email protected]>
Acked-by: Andy Fleming <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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Signed-off-by: Tor Krill <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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in the spirit of commit 1ced121600b2060ab2ff9f0fddd9421fd70a0dc6,
85xx's "Update SVR numbers to expand support", simplify SPRIDR processing
and processor ID display. Add REVID_{MAJ,MIN}OR macros to make
REVID dependent code simpler. Also added PARTID_NO_E and IS_E_PROCESSOR
convenience macros.
Signed-off-by: Kim Phillips <[email protected]>
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Current DDR setup easily causes memory corruption, this patch fixes it.
Also fix TIMING_CFG0_MRS_CYC definition.
Signed-off-by: Anton Vorontsov <[email protected]>
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The following changes are based on kernel UCC ethernet performance:
1. Make the CSB bus pipeline depth as 4, and enable the repeat mode
2. Optimize transactions between QE and CSB. Added CFG_SPCR_OPT
switch to enable this setting.
The following changes are based on the App Note AN3369 and
verified to improve memory latency using LMbench:
3. CS0_CONFIG[AP_n_EN] is changed from 1 to 0
4. CS0_CONFIG[ODT_WR_CONFIG] set to 1. Was a reserved setting
previously.
5. TIMING_CFG_1[WRREC] is changed from 3clks to 2clks (based on
Twr=15ns, and this was already the setting in DDR_MODE)
6. TIMING_CFG_1[PRETOACT] is changed from 3clks to 2clks. (based on
Trp=15ns)
7. TIMING_CFG_1[ACTTOPRE] is changed from 9clks to 6clks. (based on
Tras=40ns)
8. TIMING_CFG_1[ACTTORW] is changed from 3clks to 2clks. (based on
Trcd=15ns)
9. TIMING_CFG_1[REFREC] changed from 21 clks to 11clks. (based on
Trfc=75ns)
10. TIMING_CFG_2[FOUR_ACT] is changed from 10 clks to 7clks. (based
on Tfaw=50ns)
11. TIMING_CFG_2[ADD_LAT] and DDR_MODE[AL] changed from 0 to 1 (based
on CL=3 and WL=2).
Signed-off-by: Michael Barkowski <[email protected]>
Acked-by: Kim Phillips <[email protected]>
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The commit 9e89647889cd4b5ada5b5e7cad6cbe55737a08d7
will cause the mpc8315erdb board can't boot up.
The patch fix that bug, and remove the duplicated #ifdef
CFG_SPCR_TSECEP code and clean the SCCR_TSEC2 for
MPC8313E processor.
Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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System registers that are modified are the Arbiter Configuration
Register (ACR), the System Priority Control Register (SPCR), and the
System Clock Configuration Register (SCCR).
Signed-off by: Michael F. Reiss <[email protected]>
Signed-off by: Joe D'Abbraccio <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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According to the latest user manual of MPC8315E,
1) The SVCOD of HRCWL is different than 837x
2) The SCCR has changes
Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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The SPCR about TSEC priority is wrong.
Signed-off-by: Michael Barkowski <[email protected]>
Signed-off-by: Joe D'Abbraccio <Joe.D'[email protected]>
Signed-off-by: Dave Liu <[email protected]>
Signed-off-by: Kim Phillips <[email protected]>
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