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The existing K1 reset driver (drivers/reset/reset-spacemit-k1.c) binds
via DT of_match against a top-level reset-controller node, but kernel
mainline DT for K1 has no such node: the mpmu, apbc, apmu and apbc2
syscons each spawn their own reset device as an auxiliary of the
clock controller. The legacy driver therefore cannot consume it.
Add a new reset driver at drivers/reset/spacemit/reset-spacemit-k1.c
bound by name from each per-syscon clock driver via
device_bind_driver_to_node(), without DT of_match, mirroring the
kernel's auxiliary-device pattern.
To keep the series bisectable, this driver coexists link-cleanly with
the legacy spacemit,k1-reset driver during the transition. A
follow-up patch that switches the K1 build to
dts/upstream/src/riscv/spacemit/ will drop the legacy driver.
Signed-off-by: Guodong Xu <[email protected]>
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The K1 SoC exposes four clock providers in the kernel mainline DT: one
PLL controller ("spacemit,k1-pll") and three syscon clock nodes
("spacemit,k1-syscon-{mpmu,apbc,apmu}"). Register a separate
U_BOOT_DRIVER for each.
The controllers register clocks into a single CCF namespace, and a clock
in one controller may parent off a clock owned by another, so a
controller must register only after the controllers that own its parents
have probed. Each probe forces its parent controllers up by driver:
MPMU <- PLL
APMU <- PLL, MPMU
APBC <- PLL, MPMU, APMU
Signed-off-by: Junhui Liu <[email protected]>
Signed-off-by: Raymond Mao <[email protected]>
Signed-off-by: Guodong Xu <[email protected]>
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