summaryrefslogtreecommitdiff
path: root/include
AgeCommit message (Collapse)Author
2024-08-19Merge patch series "clk: mediatek: mt7986: clk migration for OF_UPSTREAM"Tom Rini
Christian Marangi <[email protected]> says: These are all the required patches to migrate clk and correctly support OF_UPSTREAM. This will align the clk index to upstream to support the same clk implementation with downstream and upstream DTS.
2024-08-19clk: mediatek: mt7986: rename CK to CLKChristian Marangi
Rename each entry from CK to CLK to match the include in upstream kernel linux. Signed-off-by: Christian Marangi <[email protected]> Tested-by: Frank Wunderlich <[email protected]>
2024-08-19clk: mediatek: mt7986: replace infracfg ID with upstream linuxChristian Marangi
Replace infracfg clk ID with upstream linux version. The same format is used here with the factor first, then mux and then gates. To correctly reference the gates in clk_gate function, define the gates_offs value in clk_tree now that they are at an offset from mux and factor. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7986: move INFRA_TRNG_CK to the bottom of the listChristian Marangi
Move INFRA_TRNG_CK to the bottom of the list to have a 1:1 match with upstream linux clock ID. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7986: comment out CK_TOP_A_TUNER as not usedChristian Marangi
Comment out CK_TOP_A_TUNER as not used and not defined in upstream kernel linux. This is to permit support of OF_UPSTREAM and have a 1:1 match with upstream linux clock ID. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7986: drop 1/1 spurious factor for topckgenChristian Marangi
Now that we can have advanced parent handling for mux, we can drop spurious topckgen 1/1 factor. This is in preparation to make the clk ID match the ID in upstream include for mt7986. Drop the factor entry from mt7986-clk.h and reference to them in mt7981.dtsi. Muxes and gates are updated to reference the apmixed clk following how it's done in upstream kernel linux. Add relevant clk type flag in clk_tree for apmixed. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7986: reorder TOPCKGEN factor IDChristian Marangi
Reorder TOPCKGEN factor ID to put TOP_FACTOR first and then PLL. This is to match how it's done in upstream kernel linux and in preparation for OF_UPSTREAM support. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7986: rename TOPCKGEN factor clock to upstream namingChristian Marangi
Rename TOPCKGEN factor clock to upstream neaming. Upstream kernel linux reference the factor clock for apmixedpll with the "pll" suffix. Align the naming to the upstream naming format in preparation for OF_UPSTREAM support. Also rename rtc clock to drop the CB_ as upstream doesn't have that. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7986: fix typo for infra_i2c0_ckChristian Marangi
Fix a typo for infra_i2c0_ck where 0 was misspelled as O. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7986: add missing entry for IPCIE_PIPE_CK infra gateChristian Marangi
Add missing entry for IPCIE_PIPE_CK infra gate clock. Renumber the clock order to match the expected offset in the gate array. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7986: drop 1/1 infracfg spurious factorChristian Marangi
Now that we can have advanced parent handling for mux, we can drop spurious infracfg 1/1 factor. This is in preparation to make the clk ID match the ID in upstream include for mt7986. Drop the factor entry from mt7986-clk.h and reference to them in mt7981.dtsi. Muxes and gates are updated to reference the topckgen clk following how it's done in upstream kernel linux. Add relevant clk type flag in clk_tree for infracfg and topckgen. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7986: rename 66M_MCK to SYSAXI_D2Christian Marangi
Upstream kernel linux clock include use SYSAXI_D2 instead of 66M_MCK. Rename this clock to the upstream kernel in preparation for support of OF_UPSTREAM. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7986: rename CB_CKSQ_40M to TOP_XTALChristian Marangi
Upstream kernel linux clock include use TOP_XTAL instead of CB_CKSQ_40M. Rename this clock to the upstream kernel in preparation for support of OF_UPSTREAM. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19Merge patch series "clk: mediatek: mt7988: clk migration for OF_UPSTREAM"Tom Rini
Christian Marangi <[email protected]> says: These are all the required patches to migrate clk and correctly support OF_UPSTREAM. This will align the clk index to upstream to support the same clk implementation with downstream and upstream DTS.
2024-08-19clk: mediatek: mt7988: rename CK to CLKChristian Marangi
Rename each entry from CK to CLK to match the include in upstream kernel linux. Signed-off-by: Christian Marangi <[email protected]> Tested-by: Frank Wunderlich <[email protected]>
2024-08-19clk: mediatek: mt7988: replace clock ID with upstream linuxChristian Marangi
Replace infracfg clk ID with upstream linux version. The same format is used here with the factor first, then mux and then gates. To correctly reference the gates in clk_gate function, define the gates_offs value in clk_tree now that they are at an offset from mux and factor. Drop any comment that reference the clock ID as we now have a 1:1 match with upstream kernel linux. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7988: comment out infracfg clk not definedChristian Marangi
Comment out infracfg clk not defined in upstream kernel linux clock ID include. These clock are not used and can be safely commented. Keep them just to have a reference of their existence. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7988: drop 1/1 spurious factor for topckgenChristian Marangi
Now that we can have advanced parent handling for mux, we can drop spurious topckgen 1/1 factor. This is in preparation to make the clk ID match the ID in upstream include for mt7988. Drop the factor entry from mt7988-clk.h and reference to them in mt7988.dtsi. Muxes and gates are updated to reference the apmixed clk following how it's done in upstream kernel linux. Add relevant clk type flag in clk_tree for apmixed and topckgen. Also move TOP_XTAL to the fixed clock table following how it's done in upstream linux kernel. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7988: reorder TOPCKGEN factor IDChristian Marangi
Reorder TOPCKGEN factor ID to put TOP_FACTOR first and then PLL. This is to match how it's done in upstream kernel linux and in preparation for OF_UPSTREAM support. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7988: rename TOPCKGEN factor clock to upstream namingChristian Marangi
Rename TOPCKGEN factor clock to upstream neaming. Upstream kernel linux reference the factor clock for apmixedpll with the "pll" suffix. Align the naming to the upstream naming format in preparation for OF_UPSTREAM support. Also rename rtc clock to drop the CB_ as upstream doesn't have that. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7988: drop 1/1 infracfg spurious factorChristian Marangi
Now that we can have advanced parent handling for mux, we can drop spurious infracfg 1/1 factor. This is in preparation to make the clk ID match the ID in upstream include for mt7988. Drop the factor entry from mt7988-clk.h and reference to them in mt7988.dtsi. Muxes and gates are updated to reference the topckgen clk following how it's done in upstream kernel linux. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7988: move INFRA_PCIE_PERI_26M_CK_Px clock at topChristian Marangi
Move INFRA_PCIE_PERI_26M_CK_Px clock at top of the infracfg gates in preparation for support of OF_UPSTREAM to have a 1:1 match with upstream clock ID. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7988: rename TOP_CK_NPU_SEL_CM_TOPS_SEL to TOP_NPU_SELChristian Marangi
Upstream kernel linux clock include use TOP_NPU_SEL instead of TOP_CK_NPU_SEL_CM_TOPS_SEL. Rename this clock to the upstream kernel in preparation for support of OF_UPSTREAM. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7988: rename TOP_DA_SELM_XTAL_SEL to TOP_DA_SELChristian Marangi
Upstream kernel linux clock include use TOP_DA_SEL instead of TOP_DA_SELM_XTAL_SEL. Rename this clock to the upstream kernel in preparation for support of OF_UPSTREAM. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7988: rename CB_CKSQ_40M to TOP_XTALChristian Marangi
Upstream kernel linux clock include use TOP_XTAL instead of CB_CKSQ_40M. Rename this clock to the upstream kernel in preparation for support of OF_UPSTREAM. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19Merge patch series "clk: mediatek: mt7981: clk migration for OF_UPSTREAM"Tom Rini
Christian Marangi <[email protected]> says: These are all the required patches to migrate clk and correctly support OF_UPSTREAM. This will align the clk index to upstream to support the same clk implementation with downstream and upstream DTS.
2024-08-19clk: mediatek: mt7981: rename CK to CLKChristian Marangi
Rename each entry from CK to CLK to match the include in upstream kernel linux. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7981: replace infracfg ID with upstream linuxChristian Marangi
Replace infracfg clk ID with upstream linux version. Add some missing clk for PWM3 and for PCIe. The same format is used here with the factor first, then mux and then gates. To correctly reference the gates in clk_gate function, define the gates_offs value in clk_tree now that they are at an offset from mux and factor. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7981: drop 1/1 spurious factorChristian Marangi
Now that we can have advanced parent handling for mux, we can drop spurious infracfg 1/1 factor. This is in preparation to make the clk ID match the ID in upstream include for mt7981. Drop the factor entry from mt7981-clk.h and reference to them in mt7981.dtsi. Muxes and gates are updated to reference the topckgen clk following how it's done in upstream kernel linux. Add relevant clk type flag in clk_tree for infracfg and topckgen. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7981: fix typo for infra_i2c0_ckChristian Marangi
Fix a typo for infra_i2c0_ck where 0 was misspelled as O. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19clk: mediatek: mt7981: add missing clock for infra_ipcie_pipeChristian Marangi
Add missing clock for infra_ipcie_pipe to make PCIe correctly work. This clock is a parent of the fixed clock from topckgen cb_cksq_40m. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19Merge patch series "clk: mediatek: mt7623: clk migration for OF_UPSTREAM"Tom Rini
Christian Marangi <[email protected]> says: These are all the required patches to migrate clk and correctly support OF_UPSTREAM. This will align the clk index to upstream to support the same clk implementation with downstream and upstream DTS.
2024-08-19clk: mediatek: mt7623: define id_offs_map and import clk ID from upstreamChristian Marangi
Define id_offs_map and use clk ID form upstream linux kernel to have a 1:1 match for the TOPCKGEN clock and permit usage of OF_UPSTREAM with upstream dtsi. For all the gate clock, the clk ID starts from 1 instead of zero. Define an additional clock tree for them and set the .gates_offs to 1 to account for this. Signed-off-by: Christian Marangi <[email protected]>
2024-08-19mmc: exynos_dw_mmc: Move quirks from struct dwmci_host to chip dataSam Protsenko
host->quirks field is only used internally in exynos_dw_mmc.c driver. To avoid cluttering the scope of struct dwmci_host, move quirks field into Exynos driver's chip data, where it can be statically defined. No functional change. Signed-off-by: Sam Protsenko <[email protected]> Signed-off-by: Minkyu Kang <[email protected]>
2024-08-19mmc: exynos_dw_mmc: Refactor fixed CIU clock dividerSam Protsenko
Some chips like Exynos4412 have fixed internal CIU clock divider. Instead of reading it from non-standard "div" dts property, store its value in the driver internally, in static chip data associated with corresponding compatible. This makes it possible to avoid using host->div for storing it, so the latter can be removed safely. Also create a helper function called exynos_dwmmc_get_ciu_div() for getting the current div value: in case the fixed div is provided in the chip data it will be used, otherwise the current div value is being read from CLKSEL register. The insights for this change were taken from dw_mmc-exynos.c driver in Linux kernel. No functional change. Signed-off-by: Sam Protsenko <[email protected]> Signed-off-by: Minkyu Kang <[email protected]>
2024-08-19mmc: dw_mmc: Improve coding styleSam Protsenko
Fix most of checkpatch warnings and other obvious style issues. No functional change. Signed-off-by: Sam Protsenko <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Signed-off-by: Minkyu Kang <[email protected]>
2024-08-19mmc: dw_mmc: Fix kernel-doc comments in dwmmc.hSam Protsenko
Rework kernel-doc comments in dwmmc.h header so it's actually possible to generate a proper documentation from it usin scripts/kernel-doc script, with no errors. No functional change. Signed-off-by: Sam Protsenko <[email protected]> Signed-off-by: Minkyu Kang <[email protected]>
2024-08-19mmc: dw_mmc: Replace fifoth_val property with fifo-depthSam Protsenko
Replace fifoth_val property with its fifo-depth counterpart in all DW MMC drivers. fifo-depth is a common property used in upstream Linux kernel. The FIFOTH register value will be calculated using fifo-depth value in DW MMC core (dw_mmc.c). This change reduces code duplication in platform drivers, and pulls common FIFOTH register value calculation into core dw_mmc driver where it belongs. No functional change. Signed-off-by: Sam Protsenko <[email protected]> Signed-off-by: Minkyu Kang <[email protected]>
2024-08-19mmc: dw_mmc: Add support for 64-bit IDMACSam Protsenko
Some DW MMC blocks (e.g. those on modern Exynos chips) support 64-bit DMA addressing mode. 64-bit DW MMC variants differ from their 32-bit counterparts: - the register layout is a bit different (because there are additional IDMAC registers present for storing upper part of 64-bit addresses) - DMA descriptor structure is bigger and different from 32-bit one Introduce all necessary changes to enable support for 64-bit DMA capable DW MMC blocks. Next changes were made: 1. Check which DMA address mode is supported in current IP-core version. HCON register (bit 27) indicates whether it's 32-bit or 64-bit addressing. Add boolean .dma_64bit_address field to struct dwmci_host and store the result there. dwmci_init_dma() function is introduced for doing so, which is called on driver's init. 2. Add 64-bit DMA descriptor (struct dwmci_idmac64) and use it in dwmci_prepare_desc() in case if .dma_64bit_address field is true. A new dwmci_set_idma_desc64() function was added for populating that descriptor. 3. Add registers for 64-bit DMA capable blocks. To make the access to IDMAC registers universal between 32-bit / 64-bit cases, a new struct dwmci_idmac_regs (and corresponding host->regs field) was introduced, which abstracts the hardware by being set to appropriate offset constants on init. All direct calls to IDMAC registers were correspondingly replaced by accessing host->regs. 4. Allocate and use 64-bit DMA descriptors buffer in case when IDMAC is 64-bit capable. Extract all the code (except for the IDMAC descriptors buffer allocation) from dwmci_send_cmd() to dwmci_send_cmd_common(), so that it's possible to keep IDMAC buffer (either 32-bit or 64-bit) on stack during send_cmd routine. The insights for this implementation were taken from Linux kernel DW MMC driver. Signed-off-by: Sam Protsenko <[email protected]> Signed-off-by: Minkyu Kang <[email protected]>
2024-08-19mmc: dw_mmc: Move struct idmac to dw_mmc.cSam Protsenko
struct idmac is only used in dw_mmc.c, so move it there from dwmmc.h to avoid cluttering the interface in the header. No functional change. Signed-off-by: Sam Protsenko <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Signed-off-by: Minkyu Kang <[email protected]>
2024-08-19mmc: dw_mmc: Remove unused version field from struct dwmci_hostSam Protsenko
Nobody seems to use it, so just remove it. No functional change. Signed-off-by: Sam Protsenko <[email protected]> Reviewed-by: Quentin Schulz <[email protected]> Signed-off-by: Minkyu Kang <[email protected]>
2024-08-15compiler: Ensure __builtin_*_overflow() supportRichard Weinberger
Both gcc and clang support this for a long time. Make sure the feature is present. Signed-off-by: Richard Weinberger <[email protected]>
2024-08-15bootstage: Fix out-of-bounds read in reloc_bootstage()Richard Weinberger
bootstage_get_size() returns the total size of the data structure including associated records. When copying from gd->bootstage, only the allocation size of gd->bootstage must be used. Otherwise too much memory is copied. This bug caused no harm so far because gd->new_bootstage is always large enough and reading beyond the allocation length of gd->bootstage caused no problem due to the U-Boot memory layout. Fix by using the correct size and perform the initial copy directly in bootstage_relocate() to have the whole relocation process in the same function. Signed-off-by: Richard Weinberger <[email protected]> Reviewed-by: Simon Glass <[email protected]>
2024-08-15ext4: Improve feature checkingRichard Weinberger
Evaluate the filesystem incompat and ro_compat bit fields to judge whether the filesystem can be read or written. For the read side only a scary warning is shown so far. I'd love to abort mounting too, but I fear this will break some setups where the driver works by chance. Signed-off-by: Richard Weinberger <[email protected]>
2024-08-13tqma6: Convert to PMIC and I2C driver modelFabio Estevam
Currently, the power_init_board() function is not executed because CONFIG_POWER_LEGACY is not selected. Convert to PMIC driver model, which allows removing board I2C code in favor of the I2C driver model. Signed-off-by: Fabio Estevam <[email protected]>
2024-08-13tools: imx8image: add upower image supportGary Bisson
Part of the upower management was included in a previous commit [1]. This patch only adds the bits required to properly parse a config file that would include the binary as follows: IMAGE PWR upower.bin [1] 6ec65c8558f (tools: image: support i.MX93) Signed-off-by: Gary Bisson <[email protected]> Reviewed-by: Peng Fan <[email protected]>
2024-08-13i2c: Remove CFG_SYS_I2C_DIRECT_BUSSimon Glass
Now that this is always 1, remove it and the associated dead code. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Heiko Schocher <[email protected]>
2024-08-13i2c: Remove CFG_SYS_I2C_MAX_HOPSSimon Glass
Now that this is always 0, remove it and the associated dead code. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Heiko Schocher <[email protected]>
2024-08-13i2c: Drop i2c_get_bus_num_fdt() and i2c_reset_port_fdt()Simon Glass
These functions are 11 years old and are only used by one board. Drop them. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Heiko Schocher <[email protected]>
2024-08-13i2c: Drop CFG_SYS_MAX_I2C_BUSSimon Glass
Only one board uses this option and it is very old. Let's drop it. Signed-off-by: Simon Glass <[email protected]> Reviewed-by: Heiko Schocher <[email protected]>