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// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2010,2011
* Vladimir Khusainov, Emcraft Systems, [email protected]
*
* (C) Copyright 2015
* Kamil Lulko, <[email protected]>
*/
#include <cpu_func.h>
#include <irq_func.h>
#include <asm/io.h>
#include <asm/armv7m.h>
#include <spl.h>
/*
* This is called right before passing control to
* the Linux kernel point.
*/
int cleanup_before_linux(void)
{
if (!CONFIG_IS_ENABLED(LIB_BOOTM) && !CONFIG_IS_ENABLED(LIB_BOOTZ))
return 0;
/*
* this function is called just before we call linux
* it prepares the processor for linux
*
* disable interrupt and turn off caches etc ...
*/
disable_interrupts();
/*
* turn off D-cache
* dcache_disable() in turn flushes the d-cache
* MPU is still enabled & can't be disabled as the u-boot
* code might be running in sdram which by default is not
* executable area.
*/
dcache_disable();
/* invalidate to make sure no cache line gets dirty between
* dcache flushing and disabling dcache */
invalidate_dcache_all();
icache_disable();
invalidate_icache_all();
return 0;
}
/*
* Perform the low-level reset. ARMv7M only.
*/
#if IS_ENABLED(CONFIG_CPU_V7M)
void reset_cpu(void)
{
/*
* Perform reset but keep priority group unchanged.
*/
writel((V7M_AIRCR_VECTKEY << V7M_AIRCR_VECTKEY_SHIFT)
| (V7M_SCB->aircr & V7M_AIRCR_PRIGROUP_MSK)
| V7M_AIRCR_SYSRESET, &V7M_SCB->aircr);
}
#endif
void spl_perform_arch_fixups(struct spl_image_info *spl_image)
{
if (IS_ENABLED(CONFIG_XPL_BUILD))
spl_image->entry_point |= 0x1;
}
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