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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2020 PHYTEC Messtechnik GmbH
* Author: Teresa Remmet <[email protected]>
*/
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
#include <asm/mach-imx/boot_mode.h>
#include <env.h>
#include <init.h>
#include <fdt_support.h>
#include <jffs2/load_kernel.h>
#include <miiphy.h>
#include <mtd_node.h>
#include "../common/imx8m_som_detection.h"
#define EEPROM_ADDR 0x51
#define EEPROM_ADDR_FALLBACK 0x59
int ft_board_setup(void *blob, struct bd_info *bd)
{
u8 spi = phytec_get_imx8m_spi(NULL);
/* Do nothing if no SPI is populated */
if (!spi)
return 0;
static const struct node_info nodes[] = {
{ "jedec,spi-nor", MTD_DEV_TYPE_NOR, },
};
fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
return 0;
}
static int setup_fec(void)
{
struct iomuxc_gpr_base_regs *gpr =
(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
/* Use 125M anatop REF_CLK1 for ENET1, not from external */
clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
return 0;
}
int board_init(void)
{
int ret = phytec_eeprom_data_setup_fallback(NULL, 0,
EEPROM_ADDR, EEPROM_ADDR_FALLBACK);
if (ret)
printf("%s: EEPROM data init failed\n", __func__);
setup_fec();
return 0;
}
int board_mmc_get_env_dev(int devno)
{
return devno;
}
int board_late_init(void)
{
u8 spi = phytec_get_imx8m_spi(NULL);
if (spi != 0 && spi != PHYTEC_EEPROM_INVAL)
env_set("spiprobe", "sf probe");
switch (get_boot_device()) {
case SD2_BOOT:
env_set_ulong("mmcdev", 1);
if (!env_get("boot_targets"))
env_set("boot_targets", "mmc1 mmc2 usb ethernet");
break;
case MMC3_BOOT:
env_set_ulong("mmcdev", 2);
break;
case USB_BOOT:
printf("Detect USB boot. Will enter fastboot mode!\n");
if (!strcmp(env_get("bootcmd"), env_get_default("bootcmd")))
env_set("bootcmd", "fastboot 0; bootflow scan -lb;");
break;
default:
break;
}
return 0;
}
int board_phys_sdram_size(phys_size_t *size)
{
if (!size)
return -EINVAL;
*size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE + PHYS_SDRAM_2_SIZE);
return 0;
}
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