1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
|
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple T7000 "A8" SoC
*
* Other names: H7P, "Fiji"
*
* Copyright (c) 2022, Konrad Dybcio <[email protected]>
* Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
/ {
interrupt-parent = <&aic>;
#address-cells = <2>;
#size-cells = <2>;
clkref: clock-ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "clkref";
};
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "apple,typhoon";
reg = <0x0 0x0>;
cpu-release-addr = <0 0>; /* To be filled in by loader */
performance-domains = <&cpufreq>;
operating-points-v2 = <&typhoon_opp>;
enable-method = "spin-table";
device_type = "cpu";
next-level-cache = <&l2_cache>;
i-cache-size = <0x10000>;
d-cache-size = <0x10000>;
};
cpu1: cpu@1 {
compatible = "apple,typhoon";
reg = <0x0 0x1>;
cpu-release-addr = <0 0>; /* To be filled in by loader */
performance-domains = <&cpufreq>;
operating-points-v2 = <&typhoon_opp>;
enable-method = "spin-table";
device_type = "cpu";
next-level-cache = <&l2_cache>;
i-cache-size = <0x10000>;
d-cache-size = <0x10000>;
};
l2_cache: l2-cache {
compatible = "cache";
cache-level = <2>;
cache-unified;
cache-size = <0x100000>;
};
};
typhoon_opp: opp-table {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <300000000>;
opp-level = <1>;
clock-latency-ns = <300>;
};
opp02 {
opp-hz = /bits/ 64 <396000000>;
opp-level = <2>;
clock-latency-ns = <50000>;
};
opp03 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <3>;
clock-latency-ns = <29000>;
};
opp04 {
opp-hz = /bits/ 64 <840000000>;
opp-level = <4>;
clock-latency-ns = <29000>;
};
opp05 {
opp-hz = /bits/ 64 <1128000000>;
opp-level = <5>;
clock-latency-ns = <36000>;
};
typhoon_opp06: opp06 {
opp-hz = /bits/ 64 <1392000000>;
opp-level = <6>;
clock-latency-ns = <42000>;
status = "disabled"; /* Not available on N102 */
};
typhoon_opp07: opp07 {
opp-hz = /bits/ 64 <1512000000>;
opp-level = <7>;
clock-latency-ns = <49000>;
status = "disabled"; /* J96 and J97 only */
};
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
nonposted-mmio;
ranges;
cpufreq: performance-controller@202220000 {
compatible = "apple,t7000-cluster-cpufreq", "apple,s5l8960x-cluster-cpufreq";
reg = <0x2 0x02220000 0 0x1000>;
#performance-domain-cells = <0>;
};
serial0: serial@20a0c0000 {
compatible = "apple,s5l-uart";
reg = <0x2 0x0a0c0000 0x0 0x4000>;
reg-io-width = <4>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 158 IRQ_TYPE_LEVEL_HIGH>;
/* Use the bootloader-enabled clocks for now. */
clocks = <&clkref>, <&clkref>;
clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart0>;
status = "disabled";
};
serial6: serial@20a0d8000 {
compatible = "apple,s5l-uart";
reg = <0x2 0x0a0d8000 0x0 0x4000>;
reg-io-width = <4>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 164 IRQ_TYPE_LEVEL_HIGH>;
/* Use the bootloader-enabled clocks for now. */
clocks = <&clkref>, <&clkref>;
clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart6>;
status = "disabled";
};
i2c0: i2c@20a110000 {
compatible = "apple,t7000-i2c", "apple,i2c";
reg = <0x2 0x0a110000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 174 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@20a111000 {
compatible = "apple,t7000-i2c", "apple,i2c";
reg = <0x2 0x0a111000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 175 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@20a112000 {
compatible = "apple,t7000-i2c", "apple,i2c";
reg = <0x2 0x0a112000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 176 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c2>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c3: i2c@20a113000 {
compatible = "apple,t7000-i2c", "apple,i2c";
reg = <0x2 0x0a113000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 177 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
power-domains = <&ps_i2c3>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pmgr: power-management@20e000000 {
compatible = "apple,t7000-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0xe000000 0 0x24000>;
};
wdt: watchdog@20e027000 {
compatible = "apple,t7000-wdt", "apple,wdt";
reg = <0x2 0x0e027000 0x0 0x1000>;
clocks = <&clkref>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH>;
};
aic: interrupt-controller@20e100000 {
compatible = "apple,t7000-aic", "apple,aic";
reg = <0x2 0x0e100000 0x0 0x100000>;
#interrupt-cells = <3>;
interrupt-controller;
power-domains = <&ps_aic>;
};
dwi_bl: backlight@20e200010 {
compatible = "apple,t7000-dwi-bl", "apple,dwi-bl";
reg = <0x2 0x0e200010 0x0 0x8>;
power-domains = <&ps_dwi>;
status = "disabled";
};
pinctrl: pinctrl@20e300000 {
compatible = "apple,t7000-pinctrl", "apple,pinctrl";
reg = <0x2 0x0e300000 0x0 0x100000>;
power-domains = <&ps_gpio>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl 0 0 208>;
apple,npins = <208>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 62 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 63 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 64 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 65 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 66 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 67 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 68 IRQ_TYPE_LEVEL_HIGH>;
i2c0_pins: i2c0-pins {
pinmux = <APPLE_PINMUX(97, 1)>,
<APPLE_PINMUX(96, 1)>;
};
i2c1_pins: i2c1-pins {
pinmux = <APPLE_PINMUX(139, 1)>,
<APPLE_PINMUX(138, 1)>;
};
i2c2_pins: i2c2-pins {
pinmux = <APPLE_PINMUX(65, 1)>,
<APPLE_PINMUX(64, 1)>;
};
i2c3_pins: i2c3-pins {
pinmux = <APPLE_PINMUX(87, 1)>,
<APPLE_PINMUX(86, 1)>;
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&aic>;
interrupt-names = "phys", "virt";
/* Note that A8 doesn't actually have a hypervisor (EL2 is not implemented). */
interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
};
};
#include "t7000-pmgr.dtsi"
|
