blob: a535163fd1946f0aef1cdb66169dae84cfb37518 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
*
* Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
*/
#ifndef __MX6ULLEVK_CONFIG_H
#define __MX6ULLEVK_CONFIG_H
#include <asm/arch/imx-regs.h>
#include <linux/sizes.h>
#include "mx6_common.h"
#include <asm/mach-imx/gpio.h>
#define PHYS_SDRAM_SIZE SZ_512M
#define CFG_MXC_UART_BASE UART1_BASE
/* MMC Configs */
#ifdef CONFIG_FSL_USDHC
#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
#define CFG_SYS_FSL_USDHC_NUM 2
#endif
/* Miscellaneous configurable options */
/* Physical Memory Map */
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define CFG_SYS_SDRAM_BASE PHYS_SDRAM
#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
/* environment organization */
#ifdef CONFIG_CMD_NET
#define CFG_FEC_ENET_DEV 1
#endif
#endif
|