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| author | Barry Golden <[email protected]> | 2020-06-10 13:53:10 -0700 |
|---|---|---|
| committer | GitHub <[email protected]> | 2020-06-10 13:53:10 -0700 |
| commit | 824684c664fb8a574b2a79ca0602229c85c562af (patch) | |
| tree | d6c5672b08304327f16d91fa70b8dc5d67f010e3 | |
| parent | 5f79744859170d03e72c236ff099e21cc3e949ff (diff) | |
Updated comment text to meet bias-free communication guidance.
For more information, see https://docs.microsoft.com/style-guide/bias-free-communication.
| -rw-r--r-- | tools/sdv/samples/SDV-FailDriver-STORPORT/driver/lsi_u3.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tools/sdv/samples/SDV-FailDriver-STORPORT/driver/lsi_u3.c b/tools/sdv/samples/SDV-FailDriver-STORPORT/driver/lsi_u3.c index 786994bf..3ce17bf1 100644 --- a/tools/sdv/samples/SDV-FailDriver-STORPORT/driver/lsi_u3.c +++ b/tools/sdv/samples/SDV-FailDriver-STORPORT/driver/lsi_u3.c @@ -1243,7 +1243,7 @@ Return Value: // Enable data phase mismatch processing internal to 1010 WRITE_SIOP_UCHAR( CCNTL0, CCNTL0_DISABLE_PIPE_REQ + CCNTL0_ENA_PM_JUMP); - // Disable 64-bit slave cycles + // Disable 64-bit subordinate cycles WRITE_SIOP_UCHAR( CCNTL1, 0x10); // Set phase mismatch jump registers WRITE_SIOP_ULONG( PMJAD1, DeviceExtension->PhaseMisJump1Phys); |